xref: /llvm-project/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-rotate.ll (revision 24bb180e8aeae95cb830e5c3da73e750edaa139f) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
2; RUN: llc -mtriple=riscv32 -mattr=+v,+zvfh -verify-machineinstrs < %s | FileCheck %s -check-prefixes=CHECK,RV32
3; RUN: llc -mtriple=riscv64 -mattr=+v,+zvfh -verify-machineinstrs < %s | FileCheck %s -check-prefixes=CHECK,RV64
4; RUN: llc -mtriple=riscv32 -mattr=+v,+zvfh,+zvkb -verify-machineinstrs < %s | FileCheck %s -check-prefixes=ZVKB-V
5; RUN: llc -mtriple=riscv64 -mattr=+v,+zvfh,+zvkb -verify-machineinstrs < %s | FileCheck %s -check-prefixes=ZVKB-V
6; RUN: llc -mtriple=riscv32 -mattr=+zve32x,+zvfh,+zvkb,+zvl64b -verify-machineinstrs < %s | FileCheck %s -check-prefixes=ZVKB-ZVE32X
7; RUN: llc -mtriple=riscv64 -mattr=+zve32x,+zvfh,+zvkb,+zvl64b -verify-machineinstrs < %s | FileCheck %s -check-prefixes=ZVKB-ZVE32X
8
9define <8 x i1> @shuffle_v8i1_as_i8_1(<8 x i1> %v) {
10; CHECK-LABEL: shuffle_v8i1_as_i8_1:
11; CHECK:       # %bb.0:
12; CHECK-NEXT:    vsetivli zero, 1, e8, mf8, ta, ma
13; CHECK-NEXT:    vsrl.vi v8, v0, 1
14; CHECK-NEXT:    vsll.vi v9, v0, 7
15; CHECK-NEXT:    vor.vv v0, v9, v8
16; CHECK-NEXT:    ret
17;
18; ZVKB-V-LABEL: shuffle_v8i1_as_i8_1:
19; ZVKB-V:       # %bb.0:
20; ZVKB-V-NEXT:    vsetivli zero, 1, e8, mf8, ta, ma
21; ZVKB-V-NEXT:    vror.vi v0, v0, 1
22; ZVKB-V-NEXT:    ret
23;
24; ZVKB-ZVE32X-LABEL: shuffle_v8i1_as_i8_1:
25; ZVKB-ZVE32X:       # %bb.0:
26; ZVKB-ZVE32X-NEXT:    vsetivli zero, 1, e8, mf4, ta, ma
27; ZVKB-ZVE32X-NEXT:    vror.vi v0, v0, 1
28; ZVKB-ZVE32X-NEXT:    ret
29  %shuffle = shufflevector <8 x i1> %v, <8 x i1> poison, <8 x i32> <i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0>
30  ret <8 x i1> %shuffle
31}
32
33define <8 x i1> @shuffle_v8i1_as_i8_2(<8 x i1> %v) {
34; CHECK-LABEL: shuffle_v8i1_as_i8_2:
35; CHECK:       # %bb.0:
36; CHECK-NEXT:    vsetivli zero, 1, e8, mf8, ta, ma
37; CHECK-NEXT:    vsrl.vi v8, v0, 2
38; CHECK-NEXT:    vsll.vi v9, v0, 6
39; CHECK-NEXT:    vor.vv v0, v9, v8
40; CHECK-NEXT:    ret
41;
42; ZVKB-V-LABEL: shuffle_v8i1_as_i8_2:
43; ZVKB-V:       # %bb.0:
44; ZVKB-V-NEXT:    vsetivli zero, 1, e8, mf8, ta, ma
45; ZVKB-V-NEXT:    vror.vi v0, v0, 2
46; ZVKB-V-NEXT:    ret
47;
48; ZVKB-ZVE32X-LABEL: shuffle_v8i1_as_i8_2:
49; ZVKB-ZVE32X:       # %bb.0:
50; ZVKB-ZVE32X-NEXT:    vsetivli zero, 1, e8, mf4, ta, ma
51; ZVKB-ZVE32X-NEXT:    vror.vi v0, v0, 2
52; ZVKB-ZVE32X-NEXT:    ret
53  %shuffle = shufflevector <8 x i1> %v, <8 x i1> poison, <8 x i32> <i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1>
54  ret <8 x i1> %shuffle
55}
56
57define <8 x i1> @shuffle_v8i1_as_i8_3(<8 x i1> %v) {
58; CHECK-LABEL: shuffle_v8i1_as_i8_3:
59; CHECK:       # %bb.0:
60; CHECK-NEXT:    vsetivli zero, 1, e8, mf8, ta, ma
61; CHECK-NEXT:    vsrl.vi v8, v0, 3
62; CHECK-NEXT:    vsll.vi v9, v0, 5
63; CHECK-NEXT:    vor.vv v0, v9, v8
64; CHECK-NEXT:    ret
65;
66; ZVKB-V-LABEL: shuffle_v8i1_as_i8_3:
67; ZVKB-V:       # %bb.0:
68; ZVKB-V-NEXT:    vsetivli zero, 1, e8, mf8, ta, ma
69; ZVKB-V-NEXT:    vror.vi v0, v0, 3
70; ZVKB-V-NEXT:    ret
71;
72; ZVKB-ZVE32X-LABEL: shuffle_v8i1_as_i8_3:
73; ZVKB-ZVE32X:       # %bb.0:
74; ZVKB-ZVE32X-NEXT:    vsetivli zero, 1, e8, mf4, ta, ma
75; ZVKB-ZVE32X-NEXT:    vror.vi v0, v0, 3
76; ZVKB-ZVE32X-NEXT:    ret
77  %shuffle = shufflevector <8 x i1> %v, <8 x i1> poison, <8 x i32> <i32 3, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2>
78  ret <8 x i1> %shuffle
79}
80
81define <8 x i1> @shuffle_v8i1_as_i8_4(<8 x i1> %v) {
82; CHECK-LABEL: shuffle_v8i1_as_i8_4:
83; CHECK:       # %bb.0:
84; CHECK-NEXT:    vsetivli zero, 1, e8, mf8, ta, ma
85; CHECK-NEXT:    vsrl.vi v8, v0, 4
86; CHECK-NEXT:    vsll.vi v9, v0, 4
87; CHECK-NEXT:    vor.vv v0, v9, v8
88; CHECK-NEXT:    ret
89;
90; ZVKB-V-LABEL: shuffle_v8i1_as_i8_4:
91; ZVKB-V:       # %bb.0:
92; ZVKB-V-NEXT:    vsetivli zero, 1, e8, mf8, ta, ma
93; ZVKB-V-NEXT:    vror.vi v0, v0, 4
94; ZVKB-V-NEXT:    ret
95;
96; ZVKB-ZVE32X-LABEL: shuffle_v8i1_as_i8_4:
97; ZVKB-ZVE32X:       # %bb.0:
98; ZVKB-ZVE32X-NEXT:    vsetivli zero, 1, e8, mf4, ta, ma
99; ZVKB-ZVE32X-NEXT:    vror.vi v0, v0, 4
100; ZVKB-ZVE32X-NEXT:    ret
101  %shuffle = shufflevector <8 x i1> %v, <8 x i1> poison, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3>
102  ret <8 x i1> %shuffle
103}
104
105define <8 x i1> @shuffle_v8i1_as_i8_5(<8 x i1> %v) {
106; CHECK-LABEL: shuffle_v8i1_as_i8_5:
107; CHECK:       # %bb.0:
108; CHECK-NEXT:    vsetivli zero, 1, e8, mf8, ta, ma
109; CHECK-NEXT:    vsrl.vi v8, v0, 5
110; CHECK-NEXT:    vsll.vi v9, v0, 3
111; CHECK-NEXT:    vor.vv v0, v9, v8
112; CHECK-NEXT:    ret
113;
114; ZVKB-V-LABEL: shuffle_v8i1_as_i8_5:
115; ZVKB-V:       # %bb.0:
116; ZVKB-V-NEXT:    vsetivli zero, 1, e8, mf8, ta, ma
117; ZVKB-V-NEXT:    vror.vi v0, v0, 5
118; ZVKB-V-NEXT:    ret
119;
120; ZVKB-ZVE32X-LABEL: shuffle_v8i1_as_i8_5:
121; ZVKB-ZVE32X:       # %bb.0:
122; ZVKB-ZVE32X-NEXT:    vsetivli zero, 1, e8, mf4, ta, ma
123; ZVKB-ZVE32X-NEXT:    vror.vi v0, v0, 5
124; ZVKB-ZVE32X-NEXT:    ret
125  %shuffle = shufflevector <8 x i1> %v, <8 x i1> poison, <8 x i32> <i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3, i32 4>
126  ret <8 x i1> %shuffle
127}
128
129define <8 x i1> @shuffle_v8i1_as_i8_6(<8 x i1> %v) {
130; CHECK-LABEL: shuffle_v8i1_as_i8_6:
131; CHECK:       # %bb.0:
132; CHECK-NEXT:    vsetivli zero, 1, e8, mf8, ta, ma
133; CHECK-NEXT:    vsrl.vi v8, v0, 6
134; CHECK-NEXT:    vsll.vi v9, v0, 2
135; CHECK-NEXT:    vor.vv v0, v9, v8
136; CHECK-NEXT:    ret
137;
138; ZVKB-V-LABEL: shuffle_v8i1_as_i8_6:
139; ZVKB-V:       # %bb.0:
140; ZVKB-V-NEXT:    vsetivli zero, 1, e8, mf8, ta, ma
141; ZVKB-V-NEXT:    vror.vi v0, v0, 6
142; ZVKB-V-NEXT:    ret
143;
144; ZVKB-ZVE32X-LABEL: shuffle_v8i1_as_i8_6:
145; ZVKB-ZVE32X:       # %bb.0:
146; ZVKB-ZVE32X-NEXT:    vsetivli zero, 1, e8, mf4, ta, ma
147; ZVKB-ZVE32X-NEXT:    vror.vi v0, v0, 6
148; ZVKB-ZVE32X-NEXT:    ret
149  %shuffle = shufflevector <8 x i1> %v, <8 x i1> poison, <8 x i32> <i32 6, i32 7, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5>
150  ret <8 x i1> %shuffle
151}
152
153define <8 x i1> @shuffle_v8i1_as_i8_7(<8 x i1> %v) {
154; CHECK-LABEL: shuffle_v8i1_as_i8_7:
155; CHECK:       # %bb.0:
156; CHECK-NEXT:    vsetivli zero, 1, e8, mf8, ta, ma
157; CHECK-NEXT:    vsrl.vi v8, v0, 7
158; CHECK-NEXT:    vadd.vv v9, v0, v0
159; CHECK-NEXT:    vor.vv v0, v9, v8
160; CHECK-NEXT:    ret
161;
162; ZVKB-V-LABEL: shuffle_v8i1_as_i8_7:
163; ZVKB-V:       # %bb.0:
164; ZVKB-V-NEXT:    vsetivli zero, 1, e8, mf8, ta, ma
165; ZVKB-V-NEXT:    vror.vi v0, v0, 7
166; ZVKB-V-NEXT:    ret
167;
168; ZVKB-ZVE32X-LABEL: shuffle_v8i1_as_i8_7:
169; ZVKB-ZVE32X:       # %bb.0:
170; ZVKB-ZVE32X-NEXT:    vsetivli zero, 1, e8, mf4, ta, ma
171; ZVKB-ZVE32X-NEXT:    vror.vi v0, v0, 7
172; ZVKB-ZVE32X-NEXT:    ret
173  %shuffle = shufflevector <8 x i1> %v, <8 x i1> poison, <8 x i32> <i32 7, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6>
174  ret <8 x i1> %shuffle
175}
176
177define <8 x i8> @shuffle_v8i8_as_i16(<8 x i8> %v) {
178; CHECK-LABEL: shuffle_v8i8_as_i16:
179; CHECK:       # %bb.0:
180; CHECK-NEXT:    vsetivli zero, 4, e16, mf2, ta, ma
181; CHECK-NEXT:    vsrl.vi v9, v8, 8
182; CHECK-NEXT:    vsll.vi v8, v8, 8
183; CHECK-NEXT:    vor.vv v8, v8, v9
184; CHECK-NEXT:    ret
185;
186; ZVKB-V-LABEL: shuffle_v8i8_as_i16:
187; ZVKB-V:       # %bb.0:
188; ZVKB-V-NEXT:    vsetivli zero, 4, e16, mf2, ta, ma
189; ZVKB-V-NEXT:    vrev8.v v8, v8
190; ZVKB-V-NEXT:    ret
191;
192; ZVKB-ZVE32X-LABEL: shuffle_v8i8_as_i16:
193; ZVKB-ZVE32X:       # %bb.0:
194; ZVKB-ZVE32X-NEXT:    vsetivli zero, 4, e16, m1, ta, ma
195; ZVKB-ZVE32X-NEXT:    vrev8.v v8, v8
196; ZVKB-ZVE32X-NEXT:    ret
197  %shuffle = shufflevector <8 x i8> %v, <8 x i8> poison, <8 x i32> <i32 1, i32 0, i32 3, i32 2, i32 5, i32 4, i32 7, i32 6>
198  ret <8 x i8> %shuffle
199}
200
201define <8 x i8> @shuffle_v8i8_as_i32_8(<8 x i8> %v) {
202; CHECK-LABEL: shuffle_v8i8_as_i32_8:
203; CHECK:       # %bb.0:
204; CHECK-NEXT:    vsetivli zero, 2, e32, mf2, ta, ma
205; CHECK-NEXT:    vsrl.vi v9, v8, 8
206; CHECK-NEXT:    vsll.vi v8, v8, 24
207; CHECK-NEXT:    vor.vv v8, v8, v9
208; CHECK-NEXT:    ret
209;
210; ZVKB-V-LABEL: shuffle_v8i8_as_i32_8:
211; ZVKB-V:       # %bb.0:
212; ZVKB-V-NEXT:    vsetivli zero, 2, e32, mf2, ta, ma
213; ZVKB-V-NEXT:    vror.vi v8, v8, 8
214; ZVKB-V-NEXT:    ret
215;
216; ZVKB-ZVE32X-LABEL: shuffle_v8i8_as_i32_8:
217; ZVKB-ZVE32X:       # %bb.0:
218; ZVKB-ZVE32X-NEXT:    vsetivli zero, 2, e32, m1, ta, ma
219; ZVKB-ZVE32X-NEXT:    vror.vi v8, v8, 8
220; ZVKB-ZVE32X-NEXT:    ret
221  %shuffle = shufflevector <8 x i8> %v, <8 x i8> poison, <8 x i32> <i32 1, i32 2, i32 3, i32 0, i32 5, i32 6, i32 7, i32 4>
222  ret <8 x i8> %shuffle
223}
224
225define <8 x i8> @shuffle_v8i8_as_i32_16(<8 x i8> %v) {
226; CHECK-LABEL: shuffle_v8i8_as_i32_16:
227; CHECK:       # %bb.0:
228; CHECK-NEXT:    vsetivli zero, 2, e32, mf2, ta, ma
229; CHECK-NEXT:    vsrl.vi v9, v8, 16
230; CHECK-NEXT:    vsll.vi v8, v8, 16
231; CHECK-NEXT:    vor.vv v8, v8, v9
232; CHECK-NEXT:    ret
233;
234; ZVKB-V-LABEL: shuffle_v8i8_as_i32_16:
235; ZVKB-V:       # %bb.0:
236; ZVKB-V-NEXT:    vsetivli zero, 2, e32, mf2, ta, ma
237; ZVKB-V-NEXT:    vror.vi v8, v8, 16
238; ZVKB-V-NEXT:    ret
239;
240; ZVKB-ZVE32X-LABEL: shuffle_v8i8_as_i32_16:
241; ZVKB-ZVE32X:       # %bb.0:
242; ZVKB-ZVE32X-NEXT:    vsetivli zero, 2, e32, m1, ta, ma
243; ZVKB-ZVE32X-NEXT:    vror.vi v8, v8, 16
244; ZVKB-ZVE32X-NEXT:    ret
245  %shuffle = shufflevector <8 x i8> %v, <8 x i8> poison, <8 x i32> <i32 2, i32 3, i32 0, i32 1, i32 6, i32 7, i32 4, i32 5>
246  ret <8 x i8> %shuffle
247}
248
249define <8 x i8> @shuffle_v8i8_as_i32_24(<8 x i8> %v) {
250; CHECK-LABEL: shuffle_v8i8_as_i32_24:
251; CHECK:       # %bb.0:
252; CHECK-NEXT:    vsetivli zero, 2, e32, mf2, ta, ma
253; CHECK-NEXT:    vsrl.vi v9, v8, 24
254; CHECK-NEXT:    vsll.vi v8, v8, 8
255; CHECK-NEXT:    vor.vv v8, v8, v9
256; CHECK-NEXT:    ret
257;
258; ZVKB-V-LABEL: shuffle_v8i8_as_i32_24:
259; ZVKB-V:       # %bb.0:
260; ZVKB-V-NEXT:    vsetivli zero, 2, e32, mf2, ta, ma
261; ZVKB-V-NEXT:    vror.vi v8, v8, 24
262; ZVKB-V-NEXT:    ret
263;
264; ZVKB-ZVE32X-LABEL: shuffle_v8i8_as_i32_24:
265; ZVKB-ZVE32X:       # %bb.0:
266; ZVKB-ZVE32X-NEXT:    vsetivli zero, 2, e32, m1, ta, ma
267; ZVKB-ZVE32X-NEXT:    vror.vi v8, v8, 24
268; ZVKB-ZVE32X-NEXT:    ret
269  %shuffle = shufflevector <8 x i8> %v, <8 x i8> poison, <8 x i32> <i32 3, i32 0, i32 1, i32 2, i32 7, i32 4, i32 5, i32 6>
270  ret <8 x i8> %shuffle
271}
272
273define <8 x i8> @shuffle_v8i8_as_i64_8(<8 x i8> %v) {
274; CHECK-LABEL: shuffle_v8i8_as_i64_8:
275; CHECK:       # %bb.0:
276; CHECK-NEXT:    vsetivli zero, 8, e8, mf2, ta, ma
277; CHECK-NEXT:    vslidedown.vi v9, v8, 1
278; CHECK-NEXT:    vslideup.vi v9, v8, 7
279; CHECK-NEXT:    vmv1r.v v8, v9
280; CHECK-NEXT:    ret
281;
282; ZVKB-V-LABEL: shuffle_v8i8_as_i64_8:
283; ZVKB-V:       # %bb.0:
284; ZVKB-V-NEXT:    vsetivli zero, 1, e64, m1, ta, ma
285; ZVKB-V-NEXT:    vror.vi v8, v8, 8
286; ZVKB-V-NEXT:    ret
287;
288; ZVKB-ZVE32X-LABEL: shuffle_v8i8_as_i64_8:
289; ZVKB-ZVE32X:       # %bb.0:
290; ZVKB-ZVE32X-NEXT:    vsetivli zero, 8, e8, m1, ta, ma
291; ZVKB-ZVE32X-NEXT:    vslidedown.vi v9, v8, 1
292; ZVKB-ZVE32X-NEXT:    vslideup.vi v9, v8, 7
293; ZVKB-ZVE32X-NEXT:    vmv.v.v v8, v9
294; ZVKB-ZVE32X-NEXT:    ret
295  %shuffle = shufflevector <8 x i8> %v, <8 x i8> poison, <8 x i32> <i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0>
296  ret <8 x i8> %shuffle
297}
298
299define <8 x i8> @shuffle_v8i8_as_i64_16(<8 x i8> %v) {
300; CHECK-LABEL: shuffle_v8i8_as_i64_16:
301; CHECK:       # %bb.0:
302; CHECK-NEXT:    vsetivli zero, 8, e8, mf2, ta, ma
303; CHECK-NEXT:    vslidedown.vi v9, v8, 2
304; CHECK-NEXT:    vslideup.vi v9, v8, 6
305; CHECK-NEXT:    vmv1r.v v8, v9
306; CHECK-NEXT:    ret
307;
308; ZVKB-V-LABEL: shuffle_v8i8_as_i64_16:
309; ZVKB-V:       # %bb.0:
310; ZVKB-V-NEXT:    vsetivli zero, 1, e64, m1, ta, ma
311; ZVKB-V-NEXT:    vror.vi v8, v8, 16
312; ZVKB-V-NEXT:    ret
313;
314; ZVKB-ZVE32X-LABEL: shuffle_v8i8_as_i64_16:
315; ZVKB-ZVE32X:       # %bb.0:
316; ZVKB-ZVE32X-NEXT:    vsetivli zero, 8, e8, m1, ta, ma
317; ZVKB-ZVE32X-NEXT:    vslidedown.vi v9, v8, 2
318; ZVKB-ZVE32X-NEXT:    vslideup.vi v9, v8, 6
319; ZVKB-ZVE32X-NEXT:    vmv.v.v v8, v9
320; ZVKB-ZVE32X-NEXT:    ret
321  %shuffle = shufflevector <8 x i8> %v, <8 x i8> poison, <8 x i32> <i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1>
322  ret <8 x i8> %shuffle
323}
324
325define <8 x i8> @shuffle_v8i8_as_i64_24(<8 x i8> %v) {
326; CHECK-LABEL: shuffle_v8i8_as_i64_24:
327; CHECK:       # %bb.0:
328; CHECK-NEXT:    vsetivli zero, 8, e8, mf2, ta, ma
329; CHECK-NEXT:    vslidedown.vi v9, v8, 3
330; CHECK-NEXT:    vslideup.vi v9, v8, 5
331; CHECK-NEXT:    vmv1r.v v8, v9
332; CHECK-NEXT:    ret
333;
334; ZVKB-V-LABEL: shuffle_v8i8_as_i64_24:
335; ZVKB-V:       # %bb.0:
336; ZVKB-V-NEXT:    vsetivli zero, 1, e64, m1, ta, ma
337; ZVKB-V-NEXT:    vror.vi v8, v8, 24
338; ZVKB-V-NEXT:    ret
339;
340; ZVKB-ZVE32X-LABEL: shuffle_v8i8_as_i64_24:
341; ZVKB-ZVE32X:       # %bb.0:
342; ZVKB-ZVE32X-NEXT:    vsetivli zero, 8, e8, m1, ta, ma
343; ZVKB-ZVE32X-NEXT:    vslidedown.vi v9, v8, 3
344; ZVKB-ZVE32X-NEXT:    vslideup.vi v9, v8, 5
345; ZVKB-ZVE32X-NEXT:    vmv.v.v v8, v9
346; ZVKB-ZVE32X-NEXT:    ret
347  %shuffle = shufflevector <8 x i8> %v, <8 x i8> poison, <8 x i32> <i32 3, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2>
348  ret <8 x i8> %shuffle
349}
350
351define <8 x i8> @shuffle_v8i8_as_i64_32(<8 x i8> %v) {
352; CHECK-LABEL: shuffle_v8i8_as_i64_32:
353; CHECK:       # %bb.0:
354; CHECK-NEXT:    vsetivli zero, 8, e8, mf2, ta, ma
355; CHECK-NEXT:    vslidedown.vi v9, v8, 4
356; CHECK-NEXT:    vslideup.vi v9, v8, 4
357; CHECK-NEXT:    vmv1r.v v8, v9
358; CHECK-NEXT:    ret
359;
360; ZVKB-V-LABEL: shuffle_v8i8_as_i64_32:
361; ZVKB-V:       # %bb.0:
362; ZVKB-V-NEXT:    vsetivli zero, 1, e64, m1, ta, ma
363; ZVKB-V-NEXT:    vror.vi v8, v8, 32
364; ZVKB-V-NEXT:    ret
365;
366; ZVKB-ZVE32X-LABEL: shuffle_v8i8_as_i64_32:
367; ZVKB-ZVE32X:       # %bb.0:
368; ZVKB-ZVE32X-NEXT:    vsetivli zero, 8, e8, m1, ta, ma
369; ZVKB-ZVE32X-NEXT:    vslidedown.vi v9, v8, 4
370; ZVKB-ZVE32X-NEXT:    vslideup.vi v9, v8, 4
371; ZVKB-ZVE32X-NEXT:    vmv.v.v v8, v9
372; ZVKB-ZVE32X-NEXT:    ret
373  %shuffle = shufflevector <8 x i8> %v, <8 x i8> poison, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3>
374  ret <8 x i8> %shuffle
375}
376
377define <8 x i8> @shuffle_v8i8_as_i64_40(<8 x i8> %v) {
378; CHECK-LABEL: shuffle_v8i8_as_i64_40:
379; CHECK:       # %bb.0:
380; CHECK-NEXT:    vsetivli zero, 8, e8, mf2, ta, ma
381; CHECK-NEXT:    vslidedown.vi v9, v8, 5
382; CHECK-NEXT:    vslideup.vi v9, v8, 3
383; CHECK-NEXT:    vmv1r.v v8, v9
384; CHECK-NEXT:    ret
385;
386; ZVKB-V-LABEL: shuffle_v8i8_as_i64_40:
387; ZVKB-V:       # %bb.0:
388; ZVKB-V-NEXT:    vsetivli zero, 1, e64, m1, ta, ma
389; ZVKB-V-NEXT:    vror.vi v8, v8, 40
390; ZVKB-V-NEXT:    ret
391;
392; ZVKB-ZVE32X-LABEL: shuffle_v8i8_as_i64_40:
393; ZVKB-ZVE32X:       # %bb.0:
394; ZVKB-ZVE32X-NEXT:    vsetivli zero, 8, e8, m1, ta, ma
395; ZVKB-ZVE32X-NEXT:    vslidedown.vi v9, v8, 5
396; ZVKB-ZVE32X-NEXT:    vslideup.vi v9, v8, 3
397; ZVKB-ZVE32X-NEXT:    vmv.v.v v8, v9
398; ZVKB-ZVE32X-NEXT:    ret
399  %shuffle = shufflevector <8 x i8> %v, <8 x i8> poison, <8 x i32> <i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3, i32 4>
400  ret <8 x i8> %shuffle
401}
402
403define <8 x i8> @shuffle_v8i8_as_i64_48(<8 x i8> %v) {
404; CHECK-LABEL: shuffle_v8i8_as_i64_48:
405; CHECK:       # %bb.0:
406; CHECK-NEXT:    vsetivli zero, 8, e8, mf2, ta, ma
407; CHECK-NEXT:    vslidedown.vi v9, v8, 6
408; CHECK-NEXT:    vslideup.vi v9, v8, 2
409; CHECK-NEXT:    vmv1r.v v8, v9
410; CHECK-NEXT:    ret
411;
412; ZVKB-V-LABEL: shuffle_v8i8_as_i64_48:
413; ZVKB-V:       # %bb.0:
414; ZVKB-V-NEXT:    vsetivli zero, 1, e64, m1, ta, ma
415; ZVKB-V-NEXT:    vror.vi v8, v8, 48
416; ZVKB-V-NEXT:    ret
417;
418; ZVKB-ZVE32X-LABEL: shuffle_v8i8_as_i64_48:
419; ZVKB-ZVE32X:       # %bb.0:
420; ZVKB-ZVE32X-NEXT:    vsetivli zero, 8, e8, m1, ta, ma
421; ZVKB-ZVE32X-NEXT:    vslidedown.vi v9, v8, 6
422; ZVKB-ZVE32X-NEXT:    vslideup.vi v9, v8, 2
423; ZVKB-ZVE32X-NEXT:    vmv.v.v v8, v9
424; ZVKB-ZVE32X-NEXT:    ret
425  %shuffle = shufflevector <8 x i8> %v, <8 x i8> poison, <8 x i32> <i32 6, i32 7, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5>
426  ret <8 x i8> %shuffle
427}
428
429define <8 x i8> @shuffle_v8i8_as_i64_56(<8 x i8> %v) {
430; CHECK-LABEL: shuffle_v8i8_as_i64_56:
431; CHECK:       # %bb.0:
432; CHECK-NEXT:    vsetivli zero, 8, e8, mf2, ta, ma
433; CHECK-NEXT:    vslidedown.vi v9, v8, 7
434; CHECK-NEXT:    vslideup.vi v9, v8, 1
435; CHECK-NEXT:    vmv1r.v v8, v9
436; CHECK-NEXT:    ret
437;
438; ZVKB-V-LABEL: shuffle_v8i8_as_i64_56:
439; ZVKB-V:       # %bb.0:
440; ZVKB-V-NEXT:    vsetivli zero, 1, e64, m1, ta, ma
441; ZVKB-V-NEXT:    vror.vi v8, v8, 56
442; ZVKB-V-NEXT:    ret
443;
444; ZVKB-ZVE32X-LABEL: shuffle_v8i8_as_i64_56:
445; ZVKB-ZVE32X:       # %bb.0:
446; ZVKB-ZVE32X-NEXT:    vsetivli zero, 8, e8, m1, ta, ma
447; ZVKB-ZVE32X-NEXT:    vslidedown.vi v9, v8, 7
448; ZVKB-ZVE32X-NEXT:    vslideup.vi v9, v8, 1
449; ZVKB-ZVE32X-NEXT:    vmv.v.v v8, v9
450; ZVKB-ZVE32X-NEXT:    ret
451  %shuffle = shufflevector <8 x i8> %v, <8 x i8> poison, <8 x i32> <i32 7, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6>
452  ret <8 x i8> %shuffle
453}
454
455define <8 x i16> @shuffle_v8i16_as_i32(<8 x i16> %v) {
456; CHECK-LABEL: shuffle_v8i16_as_i32:
457; CHECK:       # %bb.0:
458; CHECK-NEXT:    vsetivli zero, 4, e32, m1, ta, ma
459; CHECK-NEXT:    vsrl.vi v9, v8, 16
460; CHECK-NEXT:    vsll.vi v8, v8, 16
461; CHECK-NEXT:    vor.vv v8, v8, v9
462; CHECK-NEXT:    ret
463;
464; ZVKB-V-LABEL: shuffle_v8i16_as_i32:
465; ZVKB-V:       # %bb.0:
466; ZVKB-V-NEXT:    vsetivli zero, 4, e32, m1, ta, ma
467; ZVKB-V-NEXT:    vror.vi v8, v8, 16
468; ZVKB-V-NEXT:    ret
469;
470; ZVKB-ZVE32X-LABEL: shuffle_v8i16_as_i32:
471; ZVKB-ZVE32X:       # %bb.0:
472; ZVKB-ZVE32X-NEXT:    vsetivli zero, 4, e32, m2, ta, ma
473; ZVKB-ZVE32X-NEXT:    vror.vi v8, v8, 16
474; ZVKB-ZVE32X-NEXT:    ret
475  %shuffle = shufflevector <8 x i16> %v, <8 x i16> poison, <8 x i32> <i32 1, i32 0, i32 3, i32 2, i32 5, i32 4, i32 7, i32 6>
476  ret <8 x i16> %shuffle
477}
478
479define <8 x i16> @shuffle_v8i16_as_i64_16(<8 x i16> %v) {
480; RV32-LABEL: shuffle_v8i16_as_i64_16:
481; RV32:       # %bb.0:
482; RV32-NEXT:    vsetivli zero, 2, e32, mf2, ta, ma
483; RV32-NEXT:    vmv.v.i v9, 0
484; RV32-NEXT:    li a0, 48
485; RV32-NEXT:    li a1, 63
486; RV32-NEXT:    vwsubu.vx v10, v9, a0
487; RV32-NEXT:    vsetvli zero, zero, e64, m1, ta, ma
488; RV32-NEXT:    vmv.v.x v9, a0
489; RV32-NEXT:    vand.vx v10, v10, a1
490; RV32-NEXT:    vand.vx v9, v9, a1
491; RV32-NEXT:    vsrl.vv v10, v8, v10
492; RV32-NEXT:    vsll.vv v8, v8, v9
493; RV32-NEXT:    vor.vv v8, v8, v10
494; RV32-NEXT:    ret
495;
496; RV64-LABEL: shuffle_v8i16_as_i64_16:
497; RV64:       # %bb.0:
498; RV64-NEXT:    li a0, 48
499; RV64-NEXT:    vsetivli zero, 2, e64, m1, ta, ma
500; RV64-NEXT:    vsll.vx v9, v8, a0
501; RV64-NEXT:    vsrl.vi v8, v8, 16
502; RV64-NEXT:    vor.vv v8, v9, v8
503; RV64-NEXT:    ret
504;
505; ZVKB-V-LABEL: shuffle_v8i16_as_i64_16:
506; ZVKB-V:       # %bb.0:
507; ZVKB-V-NEXT:    vsetivli zero, 2, e64, m1, ta, ma
508; ZVKB-V-NEXT:    vror.vi v8, v8, 16
509; ZVKB-V-NEXT:    ret
510;
511; ZVKB-ZVE32X-LABEL: shuffle_v8i16_as_i64_16:
512; ZVKB-ZVE32X:       # %bb.0:
513; ZVKB-ZVE32X-NEXT:    lui a0, %hi(.LCPI19_0)
514; ZVKB-ZVE32X-NEXT:    addi a0, a0, %lo(.LCPI19_0)
515; ZVKB-ZVE32X-NEXT:    vsetivli zero, 8, e16, m2, ta, ma
516; ZVKB-ZVE32X-NEXT:    vle8.v v10, (a0)
517; ZVKB-ZVE32X-NEXT:    vsext.vf2 v12, v10
518; ZVKB-ZVE32X-NEXT:    vrgather.vv v10, v8, v12
519; ZVKB-ZVE32X-NEXT:    vmv.v.v v8, v10
520; ZVKB-ZVE32X-NEXT:    ret
521  %shuffle = shufflevector <8 x i16> %v, <8 x i16> poison, <8 x i32> <i32 1, i32 2, i32 3, i32 0, i32 5, i32 6, i32 7, i32 4>
522  ret <8 x i16> %shuffle
523}
524
525define <8 x i16> @shuffle_v8i16_as_i64_32(<8 x i16> %v) {
526; RV32-LABEL: shuffle_v8i16_as_i64_32:
527; RV32:       # %bb.0:
528; RV32-NEXT:    vsetivli zero, 2, e32, mf2, ta, ma
529; RV32-NEXT:    vmv.v.i v9, 0
530; RV32-NEXT:    li a0, 32
531; RV32-NEXT:    li a1, 63
532; RV32-NEXT:    vwsubu.vx v10, v9, a0
533; RV32-NEXT:    vsetvli zero, zero, e64, m1, ta, ma
534; RV32-NEXT:    vmv.v.x v9, a0
535; RV32-NEXT:    vand.vx v10, v10, a1
536; RV32-NEXT:    vand.vx v9, v9, a1
537; RV32-NEXT:    vsrl.vv v10, v8, v10
538; RV32-NEXT:    vsll.vv v8, v8, v9
539; RV32-NEXT:    vor.vv v8, v8, v10
540; RV32-NEXT:    ret
541;
542; RV64-LABEL: shuffle_v8i16_as_i64_32:
543; RV64:       # %bb.0:
544; RV64-NEXT:    li a0, 32
545; RV64-NEXT:    vsetivli zero, 2, e64, m1, ta, ma
546; RV64-NEXT:    vsrl.vx v9, v8, a0
547; RV64-NEXT:    vsll.vx v8, v8, a0
548; RV64-NEXT:    vor.vv v8, v8, v9
549; RV64-NEXT:    ret
550;
551; ZVKB-V-LABEL: shuffle_v8i16_as_i64_32:
552; ZVKB-V:       # %bb.0:
553; ZVKB-V-NEXT:    vsetivli zero, 2, e64, m1, ta, ma
554; ZVKB-V-NEXT:    vror.vi v8, v8, 32
555; ZVKB-V-NEXT:    ret
556;
557; ZVKB-ZVE32X-LABEL: shuffle_v8i16_as_i64_32:
558; ZVKB-ZVE32X:       # %bb.0:
559; ZVKB-ZVE32X-NEXT:    lui a0, 8240
560; ZVKB-ZVE32X-NEXT:    addi a0, a0, 1
561; ZVKB-ZVE32X-NEXT:    vsetivli zero, 1, e32, m1, ta, ma
562; ZVKB-ZVE32X-NEXT:    vmv.s.x v10, a0
563; ZVKB-ZVE32X-NEXT:    vsetivli zero, 4, e16, m1, ta, ma
564; ZVKB-ZVE32X-NEXT:    vsext.vf2 v12, v10
565; ZVKB-ZVE32X-NEXT:    vsetvli zero, zero, e32, m2, ta, ma
566; ZVKB-ZVE32X-NEXT:    vrgatherei16.vv v10, v8, v12
567; ZVKB-ZVE32X-NEXT:    vmv.v.v v8, v10
568; ZVKB-ZVE32X-NEXT:    ret
569  %shuffle = shufflevector <8 x i16> %v, <8 x i16> poison, <8 x i32> <i32 2, i32 3, i32 0, i32 1, i32 6, i32 7, i32 4, i32 5>
570  ret <8 x i16> %shuffle
571}
572
573define <8 x i16> @shuffle_v8i16_as_i64_48(<8 x i16> %v) {
574; RV32-LABEL: shuffle_v8i16_as_i64_48:
575; RV32:       # %bb.0:
576; RV32-NEXT:    vsetivli zero, 2, e32, mf2, ta, ma
577; RV32-NEXT:    vmv.v.i v9, 0
578; RV32-NEXT:    li a0, 16
579; RV32-NEXT:    li a1, 63
580; RV32-NEXT:    vwsubu.vx v10, v9, a0
581; RV32-NEXT:    vsetvli zero, zero, e64, m1, ta, ma
582; RV32-NEXT:    vmv.v.x v9, a0
583; RV32-NEXT:    vand.vx v10, v10, a1
584; RV32-NEXT:    vand.vx v9, v9, a1
585; RV32-NEXT:    vsrl.vv v10, v8, v10
586; RV32-NEXT:    vsll.vv v8, v8, v9
587; RV32-NEXT:    vor.vv v8, v8, v10
588; RV32-NEXT:    ret
589;
590; RV64-LABEL: shuffle_v8i16_as_i64_48:
591; RV64:       # %bb.0:
592; RV64-NEXT:    li a0, 48
593; RV64-NEXT:    vsetivli zero, 2, e64, m1, ta, ma
594; RV64-NEXT:    vsrl.vx v9, v8, a0
595; RV64-NEXT:    vsll.vi v8, v8, 16
596; RV64-NEXT:    vor.vv v8, v8, v9
597; RV64-NEXT:    ret
598;
599; ZVKB-V-LABEL: shuffle_v8i16_as_i64_48:
600; ZVKB-V:       # %bb.0:
601; ZVKB-V-NEXT:    vsetivli zero, 2, e64, m1, ta, ma
602; ZVKB-V-NEXT:    vror.vi v8, v8, 48
603; ZVKB-V-NEXT:    ret
604;
605; ZVKB-ZVE32X-LABEL: shuffle_v8i16_as_i64_48:
606; ZVKB-ZVE32X:       # %bb.0:
607; ZVKB-ZVE32X-NEXT:    lui a0, %hi(.LCPI21_0)
608; ZVKB-ZVE32X-NEXT:    addi a0, a0, %lo(.LCPI21_0)
609; ZVKB-ZVE32X-NEXT:    vsetivli zero, 8, e16, m2, ta, ma
610; ZVKB-ZVE32X-NEXT:    vle8.v v10, (a0)
611; ZVKB-ZVE32X-NEXT:    vsext.vf2 v12, v10
612; ZVKB-ZVE32X-NEXT:    vrgather.vv v10, v8, v12
613; ZVKB-ZVE32X-NEXT:    vmv.v.v v8, v10
614; ZVKB-ZVE32X-NEXT:    ret
615  %shuffle = shufflevector <8 x i16> %v, <8 x i16> poison, <8 x i32> <i32 3, i32 0, i32 1, i32 2, i32 7, i32 4, i32 5, i32 6>
616  ret <8 x i16> %shuffle
617}
618
619define <8 x i32> @shuffle_v8i32_as_i64(<8 x i32> %v) {
620; RV32-LABEL: shuffle_v8i32_as_i64:
621; RV32:       # %bb.0:
622; RV32-NEXT:    vsetivli zero, 4, e32, m1, ta, ma
623; RV32-NEXT:    vmv.v.i v10, 0
624; RV32-NEXT:    li a0, 32
625; RV32-NEXT:    li a1, 63
626; RV32-NEXT:    vwsubu.vx v12, v10, a0
627; RV32-NEXT:    vsetvli zero, zero, e64, m2, ta, ma
628; RV32-NEXT:    vmv.v.x v10, a0
629; RV32-NEXT:    vand.vx v12, v12, a1
630; RV32-NEXT:    vand.vx v10, v10, a1
631; RV32-NEXT:    vsrl.vv v12, v8, v12
632; RV32-NEXT:    vsll.vv v8, v8, v10
633; RV32-NEXT:    vor.vv v8, v8, v12
634; RV32-NEXT:    ret
635;
636; RV64-LABEL: shuffle_v8i32_as_i64:
637; RV64:       # %bb.0:
638; RV64-NEXT:    li a0, 32
639; RV64-NEXT:    vsetivli zero, 4, e64, m2, ta, ma
640; RV64-NEXT:    vsrl.vx v10, v8, a0
641; RV64-NEXT:    vsll.vx v8, v8, a0
642; RV64-NEXT:    vor.vv v8, v8, v10
643; RV64-NEXT:    ret
644;
645; ZVKB-V-LABEL: shuffle_v8i32_as_i64:
646; ZVKB-V:       # %bb.0:
647; ZVKB-V-NEXT:    vsetivli zero, 4, e64, m2, ta, ma
648; ZVKB-V-NEXT:    vror.vi v8, v8, 32
649; ZVKB-V-NEXT:    ret
650;
651; ZVKB-ZVE32X-LABEL: shuffle_v8i32_as_i64:
652; ZVKB-ZVE32X:       # %bb.0:
653; ZVKB-ZVE32X-NEXT:    lui a0, %hi(.LCPI22_0)
654; ZVKB-ZVE32X-NEXT:    addi a0, a0, %lo(.LCPI22_0)
655; ZVKB-ZVE32X-NEXT:    vsetivli zero, 8, e16, m2, ta, ma
656; ZVKB-ZVE32X-NEXT:    vle8.v v12, (a0)
657; ZVKB-ZVE32X-NEXT:    vsext.vf2 v16, v12
658; ZVKB-ZVE32X-NEXT:    vsetvli zero, zero, e32, m4, ta, ma
659; ZVKB-ZVE32X-NEXT:    vrgatherei16.vv v12, v8, v16
660; ZVKB-ZVE32X-NEXT:    vmv.v.v v8, v12
661; ZVKB-ZVE32X-NEXT:    ret
662  %shuffle = shufflevector <8 x i32> %v, <8 x i32> poison, <8 x i32> <i32 1, i32 0, i32 3, i32 2, i32 5, i32 4, i32 7, i32 6>
663  ret <8 x i32> %shuffle
664}
665
666define <8 x half> @shuffle_v8f16_as_i32(<8 x half> %v) {
667; CHECK-LABEL: shuffle_v8f16_as_i32:
668; CHECK:       # %bb.0:
669; CHECK-NEXT:    vsetivli zero, 4, e32, m1, ta, ma
670; CHECK-NEXT:    vsrl.vi v9, v8, 16
671; CHECK-NEXT:    vsll.vi v8, v8, 16
672; CHECK-NEXT:    vor.vv v8, v8, v9
673; CHECK-NEXT:    ret
674;
675; ZVKB-V-LABEL: shuffle_v8f16_as_i32:
676; ZVKB-V:       # %bb.0:
677; ZVKB-V-NEXT:    vsetivli zero, 4, e32, m1, ta, ma
678; ZVKB-V-NEXT:    vror.vi v8, v8, 16
679; ZVKB-V-NEXT:    ret
680;
681; ZVKB-ZVE32X-LABEL: shuffle_v8f16_as_i32:
682; ZVKB-ZVE32X:       # %bb.0:
683; ZVKB-ZVE32X-NEXT:    vsetivli zero, 4, e32, m2, ta, ma
684; ZVKB-ZVE32X-NEXT:    vror.vi v8, v8, 16
685; ZVKB-ZVE32X-NEXT:    ret
686  %shuffle = shufflevector <8 x half> %v, <8 x half> poison, <8 x i32> <i32 1, i32 0, i32 3, i32 2, i32 5, i32 4, i32 7, i32 6>
687  ret <8 x half> %shuffle
688}
689
690define <8 x half> @shuffle_v8f16_as_i64_16(<8 x half> %v) {
691; RV32-LABEL: shuffle_v8f16_as_i64_16:
692; RV32:       # %bb.0:
693; RV32-NEXT:    vsetivli zero, 2, e32, mf2, ta, ma
694; RV32-NEXT:    vmv.v.i v9, 0
695; RV32-NEXT:    li a0, 48
696; RV32-NEXT:    li a1, 63
697; RV32-NEXT:    vwsubu.vx v10, v9, a0
698; RV32-NEXT:    vsetvli zero, zero, e64, m1, ta, ma
699; RV32-NEXT:    vmv.v.x v9, a0
700; RV32-NEXT:    vand.vx v10, v10, a1
701; RV32-NEXT:    vand.vx v9, v9, a1
702; RV32-NEXT:    vsrl.vv v10, v8, v10
703; RV32-NEXT:    vsll.vv v8, v8, v9
704; RV32-NEXT:    vor.vv v8, v8, v10
705; RV32-NEXT:    ret
706;
707; RV64-LABEL: shuffle_v8f16_as_i64_16:
708; RV64:       # %bb.0:
709; RV64-NEXT:    li a0, 48
710; RV64-NEXT:    vsetivli zero, 2, e64, m1, ta, ma
711; RV64-NEXT:    vsll.vx v9, v8, a0
712; RV64-NEXT:    vsrl.vi v8, v8, 16
713; RV64-NEXT:    vor.vv v8, v9, v8
714; RV64-NEXT:    ret
715;
716; ZVKB-V-LABEL: shuffle_v8f16_as_i64_16:
717; ZVKB-V:       # %bb.0:
718; ZVKB-V-NEXT:    vsetivli zero, 2, e64, m1, ta, ma
719; ZVKB-V-NEXT:    vror.vi v8, v8, 16
720; ZVKB-V-NEXT:    ret
721;
722; ZVKB-ZVE32X-LABEL: shuffle_v8f16_as_i64_16:
723; ZVKB-ZVE32X:       # %bb.0:
724; ZVKB-ZVE32X-NEXT:    lui a0, %hi(.LCPI24_0)
725; ZVKB-ZVE32X-NEXT:    addi a0, a0, %lo(.LCPI24_0)
726; ZVKB-ZVE32X-NEXT:    vsetivli zero, 8, e16, m2, ta, ma
727; ZVKB-ZVE32X-NEXT:    vle8.v v10, (a0)
728; ZVKB-ZVE32X-NEXT:    vsext.vf2 v12, v10
729; ZVKB-ZVE32X-NEXT:    vrgather.vv v10, v8, v12
730; ZVKB-ZVE32X-NEXT:    vmv.v.v v8, v10
731; ZVKB-ZVE32X-NEXT:    ret
732  %shuffle = shufflevector <8 x half> %v, <8 x half> poison, <8 x i32> <i32 1, i32 2, i32 3, i32 0, i32 5, i32 6, i32 7, i32 4>
733  ret <8 x half> %shuffle
734}
735
736define <8 x half> @shuffle_v8f16_as_i64_32(<8 x half> %v) {
737; RV32-LABEL: shuffle_v8f16_as_i64_32:
738; RV32:       # %bb.0:
739; RV32-NEXT:    vsetivli zero, 2, e32, mf2, ta, ma
740; RV32-NEXT:    vmv.v.i v9, 0
741; RV32-NEXT:    li a0, 32
742; RV32-NEXT:    li a1, 63
743; RV32-NEXT:    vwsubu.vx v10, v9, a0
744; RV32-NEXT:    vsetvli zero, zero, e64, m1, ta, ma
745; RV32-NEXT:    vmv.v.x v9, a0
746; RV32-NEXT:    vand.vx v10, v10, a1
747; RV32-NEXT:    vand.vx v9, v9, a1
748; RV32-NEXT:    vsrl.vv v10, v8, v10
749; RV32-NEXT:    vsll.vv v8, v8, v9
750; RV32-NEXT:    vor.vv v8, v8, v10
751; RV32-NEXT:    ret
752;
753; RV64-LABEL: shuffle_v8f16_as_i64_32:
754; RV64:       # %bb.0:
755; RV64-NEXT:    li a0, 32
756; RV64-NEXT:    vsetivli zero, 2, e64, m1, ta, ma
757; RV64-NEXT:    vsrl.vx v9, v8, a0
758; RV64-NEXT:    vsll.vx v8, v8, a0
759; RV64-NEXT:    vor.vv v8, v8, v9
760; RV64-NEXT:    ret
761;
762; ZVKB-V-LABEL: shuffle_v8f16_as_i64_32:
763; ZVKB-V:       # %bb.0:
764; ZVKB-V-NEXT:    vsetivli zero, 2, e64, m1, ta, ma
765; ZVKB-V-NEXT:    vror.vi v8, v8, 32
766; ZVKB-V-NEXT:    ret
767;
768; ZVKB-ZVE32X-LABEL: shuffle_v8f16_as_i64_32:
769; ZVKB-ZVE32X:       # %bb.0:
770; ZVKB-ZVE32X-NEXT:    lui a0, 8240
771; ZVKB-ZVE32X-NEXT:    addi a0, a0, 1
772; ZVKB-ZVE32X-NEXT:    vsetivli zero, 1, e32, m1, ta, ma
773; ZVKB-ZVE32X-NEXT:    vmv.s.x v10, a0
774; ZVKB-ZVE32X-NEXT:    vsetivli zero, 4, e16, m1, ta, ma
775; ZVKB-ZVE32X-NEXT:    vsext.vf2 v12, v10
776; ZVKB-ZVE32X-NEXT:    vsetvli zero, zero, e32, m2, ta, ma
777; ZVKB-ZVE32X-NEXT:    vrgatherei16.vv v10, v8, v12
778; ZVKB-ZVE32X-NEXT:    vmv.v.v v8, v10
779; ZVKB-ZVE32X-NEXT:    ret
780  %shuffle = shufflevector <8 x half> %v, <8 x half> poison, <8 x i32> <i32 2, i32 3, i32 0, i32 1, i32 6, i32 7, i32 4, i32 5>
781  ret <8 x half> %shuffle
782}
783
784define <8 x half> @shuffle_v8f16_as_i64_48(<8 x half> %v) {
785; RV32-LABEL: shuffle_v8f16_as_i64_48:
786; RV32:       # %bb.0:
787; RV32-NEXT:    vsetivli zero, 2, e32, mf2, ta, ma
788; RV32-NEXT:    vmv.v.i v9, 0
789; RV32-NEXT:    li a0, 16
790; RV32-NEXT:    li a1, 63
791; RV32-NEXT:    vwsubu.vx v10, v9, a0
792; RV32-NEXT:    vsetvli zero, zero, e64, m1, ta, ma
793; RV32-NEXT:    vmv.v.x v9, a0
794; RV32-NEXT:    vand.vx v10, v10, a1
795; RV32-NEXT:    vand.vx v9, v9, a1
796; RV32-NEXT:    vsrl.vv v10, v8, v10
797; RV32-NEXT:    vsll.vv v8, v8, v9
798; RV32-NEXT:    vor.vv v8, v8, v10
799; RV32-NEXT:    ret
800;
801; RV64-LABEL: shuffle_v8f16_as_i64_48:
802; RV64:       # %bb.0:
803; RV64-NEXT:    li a0, 48
804; RV64-NEXT:    vsetivli zero, 2, e64, m1, ta, ma
805; RV64-NEXT:    vsrl.vx v9, v8, a0
806; RV64-NEXT:    vsll.vi v8, v8, 16
807; RV64-NEXT:    vor.vv v8, v8, v9
808; RV64-NEXT:    ret
809;
810; ZVKB-V-LABEL: shuffle_v8f16_as_i64_48:
811; ZVKB-V:       # %bb.0:
812; ZVKB-V-NEXT:    vsetivli zero, 2, e64, m1, ta, ma
813; ZVKB-V-NEXT:    vror.vi v8, v8, 48
814; ZVKB-V-NEXT:    ret
815;
816; ZVKB-ZVE32X-LABEL: shuffle_v8f16_as_i64_48:
817; ZVKB-ZVE32X:       # %bb.0:
818; ZVKB-ZVE32X-NEXT:    lui a0, %hi(.LCPI26_0)
819; ZVKB-ZVE32X-NEXT:    addi a0, a0, %lo(.LCPI26_0)
820; ZVKB-ZVE32X-NEXT:    vsetivli zero, 8, e16, m2, ta, ma
821; ZVKB-ZVE32X-NEXT:    vle8.v v10, (a0)
822; ZVKB-ZVE32X-NEXT:    vsext.vf2 v12, v10
823; ZVKB-ZVE32X-NEXT:    vrgather.vv v10, v8, v12
824; ZVKB-ZVE32X-NEXT:    vmv.v.v v8, v10
825; ZVKB-ZVE32X-NEXT:    ret
826  %shuffle = shufflevector <8 x half> %v, <8 x half> poison, <8 x i32> <i32 3, i32 0, i32 1, i32 2, i32 7, i32 4, i32 5, i32 6>
827  ret <8 x half> %shuffle
828}
829
830define <8 x float> @shuffle_v8f32_as_i64(<8 x float> %v) {
831; RV32-LABEL: shuffle_v8f32_as_i64:
832; RV32:       # %bb.0:
833; RV32-NEXT:    vsetivli zero, 4, e32, m1, ta, ma
834; RV32-NEXT:    vmv.v.i v10, 0
835; RV32-NEXT:    li a0, 32
836; RV32-NEXT:    li a1, 63
837; RV32-NEXT:    vwsubu.vx v12, v10, a0
838; RV32-NEXT:    vsetvli zero, zero, e64, m2, ta, ma
839; RV32-NEXT:    vmv.v.x v10, a0
840; RV32-NEXT:    vand.vx v12, v12, a1
841; RV32-NEXT:    vand.vx v10, v10, a1
842; RV32-NEXT:    vsrl.vv v12, v8, v12
843; RV32-NEXT:    vsll.vv v8, v8, v10
844; RV32-NEXT:    vor.vv v8, v8, v12
845; RV32-NEXT:    ret
846;
847; RV64-LABEL: shuffle_v8f32_as_i64:
848; RV64:       # %bb.0:
849; RV64-NEXT:    li a0, 32
850; RV64-NEXT:    vsetivli zero, 4, e64, m2, ta, ma
851; RV64-NEXT:    vsrl.vx v10, v8, a0
852; RV64-NEXT:    vsll.vx v8, v8, a0
853; RV64-NEXT:    vor.vv v8, v8, v10
854; RV64-NEXT:    ret
855;
856; ZVKB-V-LABEL: shuffle_v8f32_as_i64:
857; ZVKB-V:       # %bb.0:
858; ZVKB-V-NEXT:    vsetivli zero, 4, e64, m2, ta, ma
859; ZVKB-V-NEXT:    vror.vi v8, v8, 32
860; ZVKB-V-NEXT:    ret
861;
862; ZVKB-ZVE32X-LABEL: shuffle_v8f32_as_i64:
863; ZVKB-ZVE32X:       # %bb.0:
864; ZVKB-ZVE32X-NEXT:    lui a0, %hi(.LCPI27_0)
865; ZVKB-ZVE32X-NEXT:    addi a0, a0, %lo(.LCPI27_0)
866; ZVKB-ZVE32X-NEXT:    vsetivli zero, 8, e16, m2, ta, ma
867; ZVKB-ZVE32X-NEXT:    vle8.v v12, (a0)
868; ZVKB-ZVE32X-NEXT:    vsext.vf2 v16, v12
869; ZVKB-ZVE32X-NEXT:    vsetvli zero, zero, e32, m4, ta, ma
870; ZVKB-ZVE32X-NEXT:    vrgatherei16.vv v12, v8, v16
871; ZVKB-ZVE32X-NEXT:    vmv.v.v v8, v12
872; ZVKB-ZVE32X-NEXT:    ret
873  %shuffle = shufflevector <8 x float> %v, <8 x float> poison, <8 x i32> <i32 1, i32 0, i32 3, i32 2, i32 5, i32 4, i32 7, i32 6>
874  ret <8 x float> %shuffle
875}
876
877define <8 x float> @shuffle_v8f32_as_i64_exact(<8 x float> %v) vscale_range(2,2) {
878; RV32-LABEL: shuffle_v8f32_as_i64_exact:
879; RV32:       # %bb.0:
880; RV32-NEXT:    vsetivli zero, 4, e32, m1, ta, ma
881; RV32-NEXT:    vmv.v.i v10, 0
882; RV32-NEXT:    li a0, 32
883; RV32-NEXT:    li a1, 63
884; RV32-NEXT:    vwsubu.vx v12, v10, a0
885; RV32-NEXT:    vsetvli zero, zero, e64, m2, ta, ma
886; RV32-NEXT:    vmv.v.x v10, a0
887; RV32-NEXT:    vand.vx v12, v12, a1
888; RV32-NEXT:    vand.vx v10, v10, a1
889; RV32-NEXT:    vsrl.vv v12, v8, v12
890; RV32-NEXT:    vsll.vv v8, v8, v10
891; RV32-NEXT:    vor.vv v8, v8, v12
892; RV32-NEXT:    ret
893;
894; RV64-LABEL: shuffle_v8f32_as_i64_exact:
895; RV64:       # %bb.0:
896; RV64-NEXT:    li a0, 32
897; RV64-NEXT:    vsetivli zero, 4, e64, m2, ta, ma
898; RV64-NEXT:    vsrl.vx v10, v8, a0
899; RV64-NEXT:    vsll.vx v8, v8, a0
900; RV64-NEXT:    vor.vv v8, v8, v10
901; RV64-NEXT:    ret
902;
903; ZVKB-V-LABEL: shuffle_v8f32_as_i64_exact:
904; ZVKB-V:       # %bb.0:
905; ZVKB-V-NEXT:    vsetivli zero, 4, e64, m2, ta, ma
906; ZVKB-V-NEXT:    vror.vi v8, v8, 32
907; ZVKB-V-NEXT:    ret
908;
909; ZVKB-ZVE32X-LABEL: shuffle_v8f32_as_i64_exact:
910; ZVKB-ZVE32X:       # %bb.0:
911; ZVKB-ZVE32X-NEXT:    lui a0, 8240
912; ZVKB-ZVE32X-NEXT:    addi a0, a0, 1
913; ZVKB-ZVE32X-NEXT:    vsetivli zero, 4, e32, m1, ta, ma
914; ZVKB-ZVE32X-NEXT:    vmv.s.x v10, a0
915; ZVKB-ZVE32X-NEXT:    vsext.vf4 v12, v10
916; ZVKB-ZVE32X-NEXT:    vrgather.vv v11, v9, v12
917; ZVKB-ZVE32X-NEXT:    vrgather.vv v10, v8, v12
918; ZVKB-ZVE32X-NEXT:    vmv2r.v v8, v10
919; ZVKB-ZVE32X-NEXT:    ret
920  %shuffle = shufflevector <8 x float> %v, <8 x float> poison, <8 x i32> <i32 1, i32 0, i32 3, i32 2, i32 5, i32 4, i32 7, i32 6>
921  ret <8 x float> %shuffle
922}
923