xref: /llvm-project/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-setcc-int-vp.ll (revision b6c0f1bfa79a3a32d841ac5ab1f94c3aee3b5d90) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=riscv32 -mattr=+v,+m -verify-machineinstrs < %s \
3; RUN:   | FileCheck %s --check-prefixes=CHECK,RV32
4; RUN: llc -mtriple=riscv64 -mattr=+v,+m -verify-machineinstrs < %s \
5; RUN:   | FileCheck %s --check-prefixes=CHECK,RV64
6
7; FIXME: We're missing canonicalizations of ISD::VP_SETCC equivalent to those
8; for ISD::SETCC, e.g., splats aren't moved to the RHS.
9
10declare <8 x i1> @llvm.vp.icmp.v8i7(<8 x i7>, <8 x i7>, metadata, <8 x i1>, i32)
11
12define <8 x i1> @icmp_eq_vv_v8i7(<8 x i7> %va, <8 x i7> %vb, <8 x i1> %m, i32 zeroext %evl) {
13; CHECK-LABEL: icmp_eq_vv_v8i7:
14; CHECK:       # %bb.0:
15; CHECK-NEXT:    li a1, 127
16; CHECK-NEXT:    vsetivli zero, 8, e8, mf2, ta, ma
17; CHECK-NEXT:    vand.vx v9, v9, a1
18; CHECK-NEXT:    vand.vx v8, v8, a1
19; CHECK-NEXT:    vsetvli zero, a0, e8, mf2, ta, ma
20; CHECK-NEXT:    vmseq.vv v0, v8, v9, v0.t
21; CHECK-NEXT:    ret
22  %v = call <8 x i1> @llvm.vp.icmp.v8i7(<8 x i7> %va, <8 x i7> %vb, metadata !"eq", <8 x i1> %m, i32 %evl)
23  ret <8 x i1> %v
24}
25
26define <8 x i1> @icmp_eq_vx_v8i7(<8 x i7> %va, i7 %b, <8 x i1> %m, i32 zeroext %evl) {
27; CHECK-LABEL: icmp_eq_vx_v8i7:
28; CHECK:       # %bb.0:
29; CHECK-NEXT:    li a2, 127
30; CHECK-NEXT:    vsetivli zero, 8, e8, mf2, ta, ma
31; CHECK-NEXT:    vmv.v.x v9, a0
32; CHECK-NEXT:    vand.vx v8, v8, a2
33; CHECK-NEXT:    vand.vx v9, v9, a2
34; CHECK-NEXT:    vsetvli zero, a1, e8, mf2, ta, ma
35; CHECK-NEXT:    vmseq.vv v0, v8, v9, v0.t
36; CHECK-NEXT:    ret
37  %elt.head = insertelement <8 x i7> poison, i7 %b, i32 0
38  %vb = shufflevector <8 x i7> %elt.head, <8 x i7> poison, <8 x i32> zeroinitializer
39  %v = call <8 x i1> @llvm.vp.icmp.v8i7(<8 x i7> %va, <8 x i7> %vb, metadata !"eq", <8 x i1> %m, i32 %evl)
40  ret <8 x i1> %v
41}
42
43define <8 x i1> @icmp_eq_vx_swap_v8i7(<8 x i7> %va, i7 %b, <8 x i1> %m, i32 zeroext %evl) {
44; CHECK-LABEL: icmp_eq_vx_swap_v8i7:
45; CHECK:       # %bb.0:
46; CHECK-NEXT:    li a2, 127
47; CHECK-NEXT:    vsetivli zero, 8, e8, mf2, ta, ma
48; CHECK-NEXT:    vmv.v.x v9, a0
49; CHECK-NEXT:    vand.vx v8, v8, a2
50; CHECK-NEXT:    vand.vx v9, v9, a2
51; CHECK-NEXT:    vsetvli zero, a1, e8, mf2, ta, ma
52; CHECK-NEXT:    vmseq.vv v0, v9, v8, v0.t
53; CHECK-NEXT:    ret
54  %elt.head = insertelement <8 x i7> poison, i7 %b, i32 0
55  %vb = shufflevector <8 x i7> %elt.head, <8 x i7> poison, <8 x i32> zeroinitializer
56  %v = call <8 x i1> @llvm.vp.icmp.v8i7(<8 x i7> %vb, <8 x i7> %va, metadata !"eq", <8 x i1> %m, i32 %evl)
57  ret <8 x i1> %v
58}
59
60declare <5 x i1> @llvm.vp.icmp.v5i8(<5 x i8>, <5 x i8>, metadata, <5 x i1>, i32)
61
62define <5 x i1> @icmp_eq_vv_v5i8(<5 x i8> %va, <5 x i8> %vb, <5 x i1> %m, i32 zeroext %evl) {
63; CHECK-LABEL: icmp_eq_vv_v5i8:
64; CHECK:       # %bb.0:
65; CHECK-NEXT:    vsetvli zero, a0, e8, mf2, ta, ma
66; CHECK-NEXT:    vmseq.vv v0, v8, v9, v0.t
67; CHECK-NEXT:    ret
68  %v = call <5 x i1> @llvm.vp.icmp.v5i8(<5 x i8> %va, <5 x i8> %vb, metadata !"eq", <5 x i1> %m, i32 %evl)
69  ret <5 x i1> %v
70}
71
72define <5 x i1> @icmp_eq_vx_v5i8(<5 x i8> %va, i8 %b, <5 x i1> %m, i32 zeroext %evl) {
73; CHECK-LABEL: icmp_eq_vx_v5i8:
74; CHECK:       # %bb.0:
75; CHECK-NEXT:    vsetvli zero, a1, e8, mf2, ta, ma
76; CHECK-NEXT:    vmseq.vx v0, v8, a0, v0.t
77; CHECK-NEXT:    ret
78  %elt.head = insertelement <5 x i8> poison, i8 %b, i32 0
79  %vb = shufflevector <5 x i8> %elt.head, <5 x i8> poison, <5 x i32> zeroinitializer
80  %v = call <5 x i1> @llvm.vp.icmp.v5i8(<5 x i8> %va, <5 x i8> %vb, metadata !"eq", <5 x i1> %m, i32 %evl)
81  ret <5 x i1> %v
82}
83
84define <5 x i1> @icmp_eq_vx_swap_v5i8(<5 x i8> %va, i8 %b, <5 x i1> %m, i32 zeroext %evl) {
85; CHECK-LABEL: icmp_eq_vx_swap_v5i8:
86; CHECK:       # %bb.0:
87; CHECK-NEXT:    vsetvli zero, a1, e8, mf2, ta, ma
88; CHECK-NEXT:    vmseq.vx v0, v8, a0, v0.t
89; CHECK-NEXT:    ret
90  %elt.head = insertelement <5 x i8> poison, i8 %b, i32 0
91  %vb = shufflevector <5 x i8> %elt.head, <5 x i8> poison, <5 x i32> zeroinitializer
92  %v = call <5 x i1> @llvm.vp.icmp.v5i8(<5 x i8> %vb, <5 x i8> %va, metadata !"eq", <5 x i1> %m, i32 %evl)
93  ret <5 x i1> %v
94}
95
96declare <8 x i1> @llvm.vp.icmp.v8i8(<8 x i8>, <8 x i8>, metadata, <8 x i1>, i32)
97
98define <8 x i1> @icmp_eq_vv_v8i8(<8 x i8> %va, <8 x i8> %vb, <8 x i1> %m, i32 zeroext %evl) {
99; CHECK-LABEL: icmp_eq_vv_v8i8:
100; CHECK:       # %bb.0:
101; CHECK-NEXT:    vsetvli zero, a0, e8, mf2, ta, ma
102; CHECK-NEXT:    vmseq.vv v0, v8, v9, v0.t
103; CHECK-NEXT:    ret
104  %v = call <8 x i1> @llvm.vp.icmp.v8i8(<8 x i8> %va, <8 x i8> %vb, metadata !"eq", <8 x i1> %m, i32 %evl)
105  ret <8 x i1> %v
106}
107
108define <8 x i1> @icmp_eq_vx_v8i8(<8 x i8> %va, i8 %b, <8 x i1> %m, i32 zeroext %evl) {
109; CHECK-LABEL: icmp_eq_vx_v8i8:
110; CHECK:       # %bb.0:
111; CHECK-NEXT:    vsetvli zero, a1, e8, mf2, ta, ma
112; CHECK-NEXT:    vmseq.vx v0, v8, a0, v0.t
113; CHECK-NEXT:    ret
114  %elt.head = insertelement <8 x i8> poison, i8 %b, i32 0
115  %vb = shufflevector <8 x i8> %elt.head, <8 x i8> poison, <8 x i32> zeroinitializer
116  %v = call <8 x i1> @llvm.vp.icmp.v8i8(<8 x i8> %va, <8 x i8> %vb, metadata !"eq", <8 x i1> %m, i32 %evl)
117  ret <8 x i1> %v
118}
119
120define <8 x i1> @icmp_eq_vx_swap_v8i8(<8 x i8> %va, i8 %b, <8 x i1> %m, i32 zeroext %evl) {
121; CHECK-LABEL: icmp_eq_vx_swap_v8i8:
122; CHECK:       # %bb.0:
123; CHECK-NEXT:    vsetvli zero, a1, e8, mf2, ta, ma
124; CHECK-NEXT:    vmseq.vx v0, v8, a0, v0.t
125; CHECK-NEXT:    ret
126  %elt.head = insertelement <8 x i8> poison, i8 %b, i32 0
127  %vb = shufflevector <8 x i8> %elt.head, <8 x i8> poison, <8 x i32> zeroinitializer
128  %v = call <8 x i1> @llvm.vp.icmp.v8i8(<8 x i8> %vb, <8 x i8> %va, metadata !"eq", <8 x i1> %m, i32 %evl)
129  ret <8 x i1> %v
130}
131
132define <8 x i1> @icmp_eq_vi_v8i8(<8 x i8> %va, <8 x i1> %m, i32 zeroext %evl) {
133; CHECK-LABEL: icmp_eq_vi_v8i8:
134; CHECK:       # %bb.0:
135; CHECK-NEXT:    vsetvli zero, a0, e8, mf2, ta, ma
136; CHECK-NEXT:    vmseq.vi v0, v8, 4, v0.t
137; CHECK-NEXT:    ret
138  %v = call <8 x i1> @llvm.vp.icmp.v8i8(<8 x i8> %va, <8 x i8> splat (i8 4), metadata !"eq", <8 x i1> %m, i32 %evl)
139  ret <8 x i1> %v
140}
141
142define <8 x i1> @icmp_eq_vi_swap_v8i8(<8 x i8> %va, <8 x i1> %m, i32 zeroext %evl) {
143; CHECK-LABEL: icmp_eq_vi_swap_v8i8:
144; CHECK:       # %bb.0:
145; CHECK-NEXT:    vsetvli zero, a0, e8, mf2, ta, ma
146; CHECK-NEXT:    vmseq.vi v0, v8, 4, v0.t
147; CHECK-NEXT:    ret
148  %v = call <8 x i1> @llvm.vp.icmp.v8i8(<8 x i8> splat (i8 4), <8 x i8> %va, metadata !"eq", <8 x i1> %m, i32 %evl)
149  ret <8 x i1> %v
150}
151
152define <8 x i1> @icmp_ne_vv_v8i8(<8 x i8> %va, <8 x i8> %vb, <8 x i1> %m, i32 zeroext %evl) {
153; CHECK-LABEL: icmp_ne_vv_v8i8:
154; CHECK:       # %bb.0:
155; CHECK-NEXT:    vsetvli zero, a0, e8, mf2, ta, ma
156; CHECK-NEXT:    vmsne.vv v0, v8, v9, v0.t
157; CHECK-NEXT:    ret
158  %v = call <8 x i1> @llvm.vp.icmp.v8i8(<8 x i8> %va, <8 x i8> %vb, metadata !"ne", <8 x i1> %m, i32 %evl)
159  ret <8 x i1> %v
160}
161
162define <8 x i1> @icmp_ne_vx_v8i8(<8 x i8> %va, i8 %b, <8 x i1> %m, i32 zeroext %evl) {
163; CHECK-LABEL: icmp_ne_vx_v8i8:
164; CHECK:       # %bb.0:
165; CHECK-NEXT:    vsetvli zero, a1, e8, mf2, ta, ma
166; CHECK-NEXT:    vmsne.vx v0, v8, a0, v0.t
167; CHECK-NEXT:    ret
168  %elt.head = insertelement <8 x i8> poison, i8 %b, i32 0
169  %vb = shufflevector <8 x i8> %elt.head, <8 x i8> poison, <8 x i32> zeroinitializer
170  %v = call <8 x i1> @llvm.vp.icmp.v8i8(<8 x i8> %va, <8 x i8> %vb, metadata !"ne", <8 x i1> %m, i32 %evl)
171  ret <8 x i1> %v
172}
173
174define <8 x i1> @icmp_ne_vx_swap_v8i8(<8 x i8> %va, i8 %b, <8 x i1> %m, i32 zeroext %evl) {
175; CHECK-LABEL: icmp_ne_vx_swap_v8i8:
176; CHECK:       # %bb.0:
177; CHECK-NEXT:    vsetvli zero, a1, e8, mf2, ta, ma
178; CHECK-NEXT:    vmsne.vx v0, v8, a0, v0.t
179; CHECK-NEXT:    ret
180  %elt.head = insertelement <8 x i8> poison, i8 %b, i32 0
181  %vb = shufflevector <8 x i8> %elt.head, <8 x i8> poison, <8 x i32> zeroinitializer
182  %v = call <8 x i1> @llvm.vp.icmp.v8i8(<8 x i8> %vb, <8 x i8> %va, metadata !"ne", <8 x i1> %m, i32 %evl)
183  ret <8 x i1> %v
184}
185
186define <8 x i1> @icmp_ne_vi_v8i8(<8 x i8> %va, <8 x i1> %m, i32 zeroext %evl) {
187; CHECK-LABEL: icmp_ne_vi_v8i8:
188; CHECK:       # %bb.0:
189; CHECK-NEXT:    vsetvli zero, a0, e8, mf2, ta, ma
190; CHECK-NEXT:    vmsne.vi v0, v8, 4, v0.t
191; CHECK-NEXT:    ret
192  %v = call <8 x i1> @llvm.vp.icmp.v8i8(<8 x i8> %va, <8 x i8> splat (i8 4), metadata !"ne", <8 x i1> %m, i32 %evl)
193  ret <8 x i1> %v
194}
195
196define <8 x i1> @icmp_ne_vi_swap_v8i8(<8 x i8> %va, <8 x i1> %m, i32 zeroext %evl) {
197; CHECK-LABEL: icmp_ne_vi_swap_v8i8:
198; CHECK:       # %bb.0:
199; CHECK-NEXT:    vsetvli zero, a0, e8, mf2, ta, ma
200; CHECK-NEXT:    vmsne.vi v0, v8, 4, v0.t
201; CHECK-NEXT:    ret
202  %v = call <8 x i1> @llvm.vp.icmp.v8i8(<8 x i8> splat (i8 4), <8 x i8> %va, metadata !"ne", <8 x i1> %m, i32 %evl)
203  ret <8 x i1> %v
204}
205
206define <8 x i1> @icmp_ugt_vv_v8i8(<8 x i8> %va, <8 x i8> %vb, <8 x i1> %m, i32 zeroext %evl) {
207; CHECK-LABEL: icmp_ugt_vv_v8i8:
208; CHECK:       # %bb.0:
209; CHECK-NEXT:    vsetvli zero, a0, e8, mf2, ta, ma
210; CHECK-NEXT:    vmsltu.vv v0, v9, v8, v0.t
211; CHECK-NEXT:    ret
212  %v = call <8 x i1> @llvm.vp.icmp.v8i8(<8 x i8> %va, <8 x i8> %vb, metadata !"ugt", <8 x i1> %m, i32 %evl)
213  ret <8 x i1> %v
214}
215
216define <8 x i1> @icmp_ugt_vx_v8i8(<8 x i8> %va, i8 %b, <8 x i1> %m, i32 zeroext %evl) {
217; CHECK-LABEL: icmp_ugt_vx_v8i8:
218; CHECK:       # %bb.0:
219; CHECK-NEXT:    vsetvli zero, a1, e8, mf2, ta, ma
220; CHECK-NEXT:    vmsgtu.vx v0, v8, a0, v0.t
221; CHECK-NEXT:    ret
222  %elt.head = insertelement <8 x i8> poison, i8 %b, i32 0
223  %vb = shufflevector <8 x i8> %elt.head, <8 x i8> poison, <8 x i32> zeroinitializer
224  %v = call <8 x i1> @llvm.vp.icmp.v8i8(<8 x i8> %va, <8 x i8> %vb, metadata !"ugt", <8 x i1> %m, i32 %evl)
225  ret <8 x i1> %v
226}
227
228define <8 x i1> @icmp_ugt_vx_swap_v8i8(<8 x i8> %va, i8 %b, <8 x i1> %m, i32 zeroext %evl) {
229; CHECK-LABEL: icmp_ugt_vx_swap_v8i8:
230; CHECK:       # %bb.0:
231; CHECK-NEXT:    vsetvli zero, a1, e8, mf2, ta, ma
232; CHECK-NEXT:    vmsltu.vx v0, v8, a0, v0.t
233; CHECK-NEXT:    ret
234  %elt.head = insertelement <8 x i8> poison, i8 %b, i32 0
235  %vb = shufflevector <8 x i8> %elt.head, <8 x i8> poison, <8 x i32> zeroinitializer
236  %v = call <8 x i1> @llvm.vp.icmp.v8i8(<8 x i8> %vb, <8 x i8> %va, metadata !"ugt", <8 x i1> %m, i32 %evl)
237  ret <8 x i1> %v
238}
239
240define <8 x i1> @icmp_ugt_vi_v8i8(<8 x i8> %va, <8 x i1> %m, i32 zeroext %evl) {
241; CHECK-LABEL: icmp_ugt_vi_v8i8:
242; CHECK:       # %bb.0:
243; CHECK-NEXT:    vsetvli zero, a0, e8, mf2, ta, ma
244; CHECK-NEXT:    vmsgtu.vi v0, v8, 4, v0.t
245; CHECK-NEXT:    ret
246  %v = call <8 x i1> @llvm.vp.icmp.v8i8(<8 x i8> %va, <8 x i8> splat (i8 4), metadata !"ugt", <8 x i1> %m, i32 %evl)
247  ret <8 x i1> %v
248}
249
250define <8 x i1> @icmp_ugt_vi_swap_v8i8(<8 x i8> %va, <8 x i1> %m, i32 zeroext %evl) {
251; CHECK-LABEL: icmp_ugt_vi_swap_v8i8:
252; CHECK:       # %bb.0:
253; CHECK-NEXT:    vsetvli zero, a0, e8, mf2, ta, ma
254; CHECK-NEXT:    vmsleu.vi v0, v8, 3, v0.t
255; CHECK-NEXT:    ret
256  %v = call <8 x i1> @llvm.vp.icmp.v8i8(<8 x i8> splat (i8 4), <8 x i8> %va, metadata !"ugt", <8 x i1> %m, i32 %evl)
257  ret <8 x i1> %v
258}
259
260define <8 x i1> @icmp_uge_vv_v8i8(<8 x i8> %va, <8 x i8> %vb, <8 x i1> %m, i32 zeroext %evl) {
261; CHECK-LABEL: icmp_uge_vv_v8i8:
262; CHECK:       # %bb.0:
263; CHECK-NEXT:    vsetvli zero, a0, e8, mf2, ta, ma
264; CHECK-NEXT:    vmsleu.vv v0, v9, v8, v0.t
265; CHECK-NEXT:    ret
266  %v = call <8 x i1> @llvm.vp.icmp.v8i8(<8 x i8> %va, <8 x i8> %vb, metadata !"uge", <8 x i1> %m, i32 %evl)
267  ret <8 x i1> %v
268}
269
270define <8 x i1> @icmp_uge_vx_v8i8(<8 x i8> %va, i8 %b, <8 x i1> %m, i32 zeroext %evl) {
271; CHECK-LABEL: icmp_uge_vx_v8i8:
272; CHECK:       # %bb.0:
273; CHECK-NEXT:    vsetivli zero, 8, e8, mf2, ta, ma
274; CHECK-NEXT:    vmv.v.x v9, a0
275; CHECK-NEXT:    vsetvli zero, a1, e8, mf2, ta, ma
276; CHECK-NEXT:    vmsleu.vv v0, v9, v8, v0.t
277; CHECK-NEXT:    ret
278  %elt.head = insertelement <8 x i8> poison, i8 %b, i32 0
279  %vb = shufflevector <8 x i8> %elt.head, <8 x i8> poison, <8 x i32> zeroinitializer
280  %v = call <8 x i1> @llvm.vp.icmp.v8i8(<8 x i8> %va, <8 x i8> %vb, metadata !"uge", <8 x i1> %m, i32 %evl)
281  ret <8 x i1> %v
282}
283
284define <8 x i1> @icmp_uge_vx_swap_v8i8(<8 x i8> %va, i8 %b, <8 x i1> %m, i32 zeroext %evl) {
285; CHECK-LABEL: icmp_uge_vx_swap_v8i8:
286; CHECK:       # %bb.0:
287; CHECK-NEXT:    vsetvli zero, a1, e8, mf2, ta, ma
288; CHECK-NEXT:    vmsleu.vx v0, v8, a0, v0.t
289; CHECK-NEXT:    ret
290  %elt.head = insertelement <8 x i8> poison, i8 %b, i32 0
291  %vb = shufflevector <8 x i8> %elt.head, <8 x i8> poison, <8 x i32> zeroinitializer
292  %v = call <8 x i1> @llvm.vp.icmp.v8i8(<8 x i8> %vb, <8 x i8> %va, metadata !"uge", <8 x i1> %m, i32 %evl)
293  ret <8 x i1> %v
294}
295
296define <8 x i1> @icmp_uge_vi_v8i8(<8 x i8> %va, <8 x i1> %m, i32 zeroext %evl) {
297; CHECK-LABEL: icmp_uge_vi_v8i8:
298; CHECK:       # %bb.0:
299; CHECK-NEXT:    vsetvli zero, a0, e8, mf2, ta, ma
300; CHECK-NEXT:    vmsgtu.vi v0, v8, 3, v0.t
301; CHECK-NEXT:    ret
302  %v = call <8 x i1> @llvm.vp.icmp.v8i8(<8 x i8> %va, <8 x i8> splat (i8 4), metadata !"uge", <8 x i1> %m, i32 %evl)
303  ret <8 x i1> %v
304}
305
306define <8 x i1> @icmp_uge_vi_swap_v8i8(<8 x i8> %va, <8 x i1> %m, i32 zeroext %evl) {
307; CHECK-LABEL: icmp_uge_vi_swap_v8i8:
308; CHECK:       # %bb.0:
309; CHECK-NEXT:    vsetvli zero, a0, e8, mf2, ta, ma
310; CHECK-NEXT:    vmsleu.vi v0, v8, 4, v0.t
311; CHECK-NEXT:    ret
312  %v = call <8 x i1> @llvm.vp.icmp.v8i8(<8 x i8> splat (i8 4), <8 x i8> %va, metadata !"uge", <8 x i1> %m, i32 %evl)
313  ret <8 x i1> %v
314}
315
316define <8 x i1> @icmp_ult_vv_v8i8(<8 x i8> %va, <8 x i8> %vb, <8 x i1> %m, i32 zeroext %evl) {
317; CHECK-LABEL: icmp_ult_vv_v8i8:
318; CHECK:       # %bb.0:
319; CHECK-NEXT:    vsetvli zero, a0, e8, mf2, ta, ma
320; CHECK-NEXT:    vmsltu.vv v0, v8, v9, v0.t
321; CHECK-NEXT:    ret
322  %v = call <8 x i1> @llvm.vp.icmp.v8i8(<8 x i8> %va, <8 x i8> %vb, metadata !"ult", <8 x i1> %m, i32 %evl)
323  ret <8 x i1> %v
324}
325
326define <8 x i1> @icmp_ult_vx_v8i8(<8 x i8> %va, i8 %b, <8 x i1> %m, i32 zeroext %evl) {
327; CHECK-LABEL: icmp_ult_vx_v8i8:
328; CHECK:       # %bb.0:
329; CHECK-NEXT:    vsetvli zero, a1, e8, mf2, ta, ma
330; CHECK-NEXT:    vmsltu.vx v0, v8, a0, v0.t
331; CHECK-NEXT:    ret
332  %elt.head = insertelement <8 x i8> poison, i8 %b, i32 0
333  %vb = shufflevector <8 x i8> %elt.head, <8 x i8> poison, <8 x i32> zeroinitializer
334  %v = call <8 x i1> @llvm.vp.icmp.v8i8(<8 x i8> %va, <8 x i8> %vb, metadata !"ult", <8 x i1> %m, i32 %evl)
335  ret <8 x i1> %v
336}
337
338define <8 x i1> @icmp_ult_vx_swap_v8i8(<8 x i8> %va, i8 %b, <8 x i1> %m, i32 zeroext %evl) {
339; CHECK-LABEL: icmp_ult_vx_swap_v8i8:
340; CHECK:       # %bb.0:
341; CHECK-NEXT:    vsetvli zero, a1, e8, mf2, ta, ma
342; CHECK-NEXT:    vmsgtu.vx v0, v8, a0, v0.t
343; CHECK-NEXT:    ret
344  %elt.head = insertelement <8 x i8> poison, i8 %b, i32 0
345  %vb = shufflevector <8 x i8> %elt.head, <8 x i8> poison, <8 x i32> zeroinitializer
346  %v = call <8 x i1> @llvm.vp.icmp.v8i8(<8 x i8> %vb, <8 x i8> %va, metadata !"ult", <8 x i1> %m, i32 %evl)
347  ret <8 x i1> %v
348}
349
350define <8 x i1> @icmp_ult_vi_v8i8(<8 x i8> %va, <8 x i1> %m, i32 zeroext %evl) {
351; CHECK-LABEL: icmp_ult_vi_v8i8:
352; CHECK:       # %bb.0:
353; CHECK-NEXT:    vsetvli zero, a0, e8, mf2, ta, ma
354; CHECK-NEXT:    vmsleu.vi v0, v8, 3, v0.t
355; CHECK-NEXT:    ret
356  %v = call <8 x i1> @llvm.vp.icmp.v8i8(<8 x i8> %va, <8 x i8> splat (i8 4), metadata !"ult", <8 x i1> %m, i32 %evl)
357  ret <8 x i1> %v
358}
359
360define <8 x i1> @icmp_ult_vi_swap_v8i8(<8 x i8> %va, <8 x i1> %m, i32 zeroext %evl) {
361; CHECK-LABEL: icmp_ult_vi_swap_v8i8:
362; CHECK:       # %bb.0:
363; CHECK-NEXT:    vsetvli zero, a0, e8, mf2, ta, ma
364; CHECK-NEXT:    vmsgtu.vi v0, v8, 4, v0.t
365; CHECK-NEXT:    ret
366  %v = call <8 x i1> @llvm.vp.icmp.v8i8(<8 x i8> splat (i8 4), <8 x i8> %va, metadata !"ult", <8 x i1> %m, i32 %evl)
367  ret <8 x i1> %v
368}
369
370define <8 x i1> @icmp_sgt_vv_v8i8(<8 x i8> %va, <8 x i8> %vb, <8 x i1> %m, i32 zeroext %evl) {
371; CHECK-LABEL: icmp_sgt_vv_v8i8:
372; CHECK:       # %bb.0:
373; CHECK-NEXT:    vsetvli zero, a0, e8, mf2, ta, ma
374; CHECK-NEXT:    vmslt.vv v0, v9, v8, v0.t
375; CHECK-NEXT:    ret
376  %v = call <8 x i1> @llvm.vp.icmp.v8i8(<8 x i8> %va, <8 x i8> %vb, metadata !"sgt", <8 x i1> %m, i32 %evl)
377  ret <8 x i1> %v
378}
379
380define <8 x i1> @icmp_sgt_vx_v8i8(<8 x i8> %va, i8 %b, <8 x i1> %m, i32 zeroext %evl) {
381; CHECK-LABEL: icmp_sgt_vx_v8i8:
382; CHECK:       # %bb.0:
383; CHECK-NEXT:    vsetvli zero, a1, e8, mf2, ta, ma
384; CHECK-NEXT:    vmsgt.vx v0, v8, a0, v0.t
385; CHECK-NEXT:    ret
386  %elt.head = insertelement <8 x i8> poison, i8 %b, i32 0
387  %vb = shufflevector <8 x i8> %elt.head, <8 x i8> poison, <8 x i32> zeroinitializer
388  %v = call <8 x i1> @llvm.vp.icmp.v8i8(<8 x i8> %va, <8 x i8> %vb, metadata !"sgt", <8 x i1> %m, i32 %evl)
389  ret <8 x i1> %v
390}
391
392define <8 x i1> @icmp_sgt_vx_swap_v8i8(<8 x i8> %va, i8 %b, <8 x i1> %m, i32 zeroext %evl) {
393; CHECK-LABEL: icmp_sgt_vx_swap_v8i8:
394; CHECK:       # %bb.0:
395; CHECK-NEXT:    vsetvli zero, a1, e8, mf2, ta, ma
396; CHECK-NEXT:    vmslt.vx v0, v8, a0, v0.t
397; CHECK-NEXT:    ret
398  %elt.head = insertelement <8 x i8> poison, i8 %b, i32 0
399  %vb = shufflevector <8 x i8> %elt.head, <8 x i8> poison, <8 x i32> zeroinitializer
400  %v = call <8 x i1> @llvm.vp.icmp.v8i8(<8 x i8> %vb, <8 x i8> %va, metadata !"sgt", <8 x i1> %m, i32 %evl)
401  ret <8 x i1> %v
402}
403
404define <8 x i1> @icmp_sgt_vi_v8i8(<8 x i8> %va, <8 x i1> %m, i32 zeroext %evl) {
405; CHECK-LABEL: icmp_sgt_vi_v8i8:
406; CHECK:       # %bb.0:
407; CHECK-NEXT:    vsetvli zero, a0, e8, mf2, ta, ma
408; CHECK-NEXT:    vmsgt.vi v0, v8, 4, v0.t
409; CHECK-NEXT:    ret
410  %v = call <8 x i1> @llvm.vp.icmp.v8i8(<8 x i8> %va, <8 x i8> splat (i8 4), metadata !"sgt", <8 x i1> %m, i32 %evl)
411  ret <8 x i1> %v
412}
413
414define <8 x i1> @icmp_sgt_vi_swap_v8i8(<8 x i8> %va, <8 x i1> %m, i32 zeroext %evl) {
415; CHECK-LABEL: icmp_sgt_vi_swap_v8i8:
416; CHECK:       # %bb.0:
417; CHECK-NEXT:    vsetvli zero, a0, e8, mf2, ta, ma
418; CHECK-NEXT:    vmsle.vi v0, v8, 3, v0.t
419; CHECK-NEXT:    ret
420  %v = call <8 x i1> @llvm.vp.icmp.v8i8(<8 x i8> splat (i8 4), <8 x i8> %va, metadata !"sgt", <8 x i1> %m, i32 %evl)
421  ret <8 x i1> %v
422}
423
424define <8 x i1> @icmp_sge_vv_v8i8(<8 x i8> %va, <8 x i8> %vb, <8 x i1> %m, i32 zeroext %evl) {
425; CHECK-LABEL: icmp_sge_vv_v8i8:
426; CHECK:       # %bb.0:
427; CHECK-NEXT:    vsetvli zero, a0, e8, mf2, ta, ma
428; CHECK-NEXT:    vmsle.vv v0, v9, v8, v0.t
429; CHECK-NEXT:    ret
430  %v = call <8 x i1> @llvm.vp.icmp.v8i8(<8 x i8> %va, <8 x i8> %vb, metadata !"sge", <8 x i1> %m, i32 %evl)
431  ret <8 x i1> %v
432}
433
434define <8 x i1> @icmp_sge_vx_v8i8(<8 x i8> %va, i8 %b, <8 x i1> %m, i32 zeroext %evl) {
435; CHECK-LABEL: icmp_sge_vx_v8i8:
436; CHECK:       # %bb.0:
437; CHECK-NEXT:    vsetivli zero, 8, e8, mf2, ta, ma
438; CHECK-NEXT:    vmv.v.x v9, a0
439; CHECK-NEXT:    vsetvli zero, a1, e8, mf2, ta, ma
440; CHECK-NEXT:    vmsle.vv v0, v9, v8, v0.t
441; CHECK-NEXT:    ret
442  %elt.head = insertelement <8 x i8> poison, i8 %b, i32 0
443  %vb = shufflevector <8 x i8> %elt.head, <8 x i8> poison, <8 x i32> zeroinitializer
444  %v = call <8 x i1> @llvm.vp.icmp.v8i8(<8 x i8> %va, <8 x i8> %vb, metadata !"sge", <8 x i1> %m, i32 %evl)
445  ret <8 x i1> %v
446}
447
448define <8 x i1> @icmp_sge_vx_swap_v8i8(<8 x i8> %va, i8 %b, <8 x i1> %m, i32 zeroext %evl) {
449; CHECK-LABEL: icmp_sge_vx_swap_v8i8:
450; CHECK:       # %bb.0:
451; CHECK-NEXT:    vsetvli zero, a1, e8, mf2, ta, ma
452; CHECK-NEXT:    vmsle.vx v0, v8, a0, v0.t
453; CHECK-NEXT:    ret
454  %elt.head = insertelement <8 x i8> poison, i8 %b, i32 0
455  %vb = shufflevector <8 x i8> %elt.head, <8 x i8> poison, <8 x i32> zeroinitializer
456  %v = call <8 x i1> @llvm.vp.icmp.v8i8(<8 x i8> %vb, <8 x i8> %va, metadata !"sge", <8 x i1> %m, i32 %evl)
457  ret <8 x i1> %v
458}
459
460define <8 x i1> @icmp_sge_vi_v8i8(<8 x i8> %va, <8 x i1> %m, i32 zeroext %evl) {
461; CHECK-LABEL: icmp_sge_vi_v8i8:
462; CHECK:       # %bb.0:
463; CHECK-NEXT:    vsetvli zero, a0, e8, mf2, ta, ma
464; CHECK-NEXT:    vmsgt.vi v0, v8, 3, v0.t
465; CHECK-NEXT:    ret
466  %v = call <8 x i1> @llvm.vp.icmp.v8i8(<8 x i8> %va, <8 x i8> splat (i8 4), metadata !"sge", <8 x i1> %m, i32 %evl)
467  ret <8 x i1> %v
468}
469
470define <8 x i1> @icmp_sge_vi_swap_v8i8(<8 x i8> %va, <8 x i1> %m, i32 zeroext %evl) {
471; CHECK-LABEL: icmp_sge_vi_swap_v8i8:
472; CHECK:       # %bb.0:
473; CHECK-NEXT:    vsetvli zero, a0, e8, mf2, ta, ma
474; CHECK-NEXT:    vmsle.vi v0, v8, 4, v0.t
475; CHECK-NEXT:    ret
476  %v = call <8 x i1> @llvm.vp.icmp.v8i8(<8 x i8> splat (i8 4), <8 x i8> %va, metadata !"sge", <8 x i1> %m, i32 %evl)
477  ret <8 x i1> %v
478}
479
480define <8 x i1> @icmp_slt_vv_v8i8(<8 x i8> %va, <8 x i8> %vb, <8 x i1> %m, i32 zeroext %evl) {
481; CHECK-LABEL: icmp_slt_vv_v8i8:
482; CHECK:       # %bb.0:
483; CHECK-NEXT:    vsetvli zero, a0, e8, mf2, ta, ma
484; CHECK-NEXT:    vmslt.vv v0, v8, v9, v0.t
485; CHECK-NEXT:    ret
486  %v = call <8 x i1> @llvm.vp.icmp.v8i8(<8 x i8> %va, <8 x i8> %vb, metadata !"slt", <8 x i1> %m, i32 %evl)
487  ret <8 x i1> %v
488}
489
490define <8 x i1> @icmp_slt_vx_v8i8(<8 x i8> %va, i8 %b, <8 x i1> %m, i32 zeroext %evl) {
491; CHECK-LABEL: icmp_slt_vx_v8i8:
492; CHECK:       # %bb.0:
493; CHECK-NEXT:    vsetvli zero, a1, e8, mf2, ta, ma
494; CHECK-NEXT:    vmslt.vx v0, v8, a0, v0.t
495; CHECK-NEXT:    ret
496  %elt.head = insertelement <8 x i8> poison, i8 %b, i32 0
497  %vb = shufflevector <8 x i8> %elt.head, <8 x i8> poison, <8 x i32> zeroinitializer
498  %v = call <8 x i1> @llvm.vp.icmp.v8i8(<8 x i8> %va, <8 x i8> %vb, metadata !"slt", <8 x i1> %m, i32 %evl)
499  ret <8 x i1> %v
500}
501
502define <8 x i1> @icmp_slt_vx_swap_v8i8(<8 x i8> %va, i8 %b, <8 x i1> %m, i32 zeroext %evl) {
503; CHECK-LABEL: icmp_slt_vx_swap_v8i8:
504; CHECK:       # %bb.0:
505; CHECK-NEXT:    vsetvli zero, a1, e8, mf2, ta, ma
506; CHECK-NEXT:    vmsgt.vx v0, v8, a0, v0.t
507; CHECK-NEXT:    ret
508  %elt.head = insertelement <8 x i8> poison, i8 %b, i32 0
509  %vb = shufflevector <8 x i8> %elt.head, <8 x i8> poison, <8 x i32> zeroinitializer
510  %v = call <8 x i1> @llvm.vp.icmp.v8i8(<8 x i8> %vb, <8 x i8> %va, metadata !"slt", <8 x i1> %m, i32 %evl)
511  ret <8 x i1> %v
512}
513
514define <8 x i1> @icmp_slt_vi_v8i8(<8 x i8> %va, <8 x i1> %m, i32 zeroext %evl) {
515; CHECK-LABEL: icmp_slt_vi_v8i8:
516; CHECK:       # %bb.0:
517; CHECK-NEXT:    vsetvli zero, a0, e8, mf2, ta, ma
518; CHECK-NEXT:    vmsle.vi v0, v8, 3, v0.t
519; CHECK-NEXT:    ret
520  %v = call <8 x i1> @llvm.vp.icmp.v8i8(<8 x i8> %va, <8 x i8> splat (i8 4), metadata !"slt", <8 x i1> %m, i32 %evl)
521  ret <8 x i1> %v
522}
523
524define <8 x i1> @icmp_slt_vi_swap_v8i8(<8 x i8> %va, <8 x i1> %m, i32 zeroext %evl) {
525; CHECK-LABEL: icmp_slt_vi_swap_v8i8:
526; CHECK:       # %bb.0:
527; CHECK-NEXT:    vsetvli zero, a0, e8, mf2, ta, ma
528; CHECK-NEXT:    vmsgt.vi v0, v8, 4, v0.t
529; CHECK-NEXT:    ret
530  %v = call <8 x i1> @llvm.vp.icmp.v8i8(<8 x i8> splat (i8 4), <8 x i8> %va, metadata !"slt", <8 x i1> %m, i32 %evl)
531  ret <8 x i1> %v
532}
533
534define <8 x i1> @icmp_sle_vv_v8i8(<8 x i8> %va, <8 x i8> %vb, <8 x i1> %m, i32 zeroext %evl) {
535; CHECK-LABEL: icmp_sle_vv_v8i8:
536; CHECK:       # %bb.0:
537; CHECK-NEXT:    vsetvli zero, a0, e8, mf2, ta, ma
538; CHECK-NEXT:    vmsle.vv v0, v8, v9, v0.t
539; CHECK-NEXT:    ret
540  %v = call <8 x i1> @llvm.vp.icmp.v8i8(<8 x i8> %va, <8 x i8> %vb, metadata !"sle", <8 x i1> %m, i32 %evl)
541  ret <8 x i1> %v
542}
543
544define <8 x i1> @icmp_sle_vx_v8i8(<8 x i8> %va, i8 %b, <8 x i1> %m, i32 zeroext %evl) {
545; CHECK-LABEL: icmp_sle_vx_v8i8:
546; CHECK:       # %bb.0:
547; CHECK-NEXT:    vsetvli zero, a1, e8, mf2, ta, ma
548; CHECK-NEXT:    vmsle.vx v0, v8, a0, v0.t
549; CHECK-NEXT:    ret
550  %elt.head = insertelement <8 x i8> poison, i8 %b, i32 0
551  %vb = shufflevector <8 x i8> %elt.head, <8 x i8> poison, <8 x i32> zeroinitializer
552  %v = call <8 x i1> @llvm.vp.icmp.v8i8(<8 x i8> %va, <8 x i8> %vb, metadata !"sle", <8 x i1> %m, i32 %evl)
553  ret <8 x i1> %v
554}
555
556define <8 x i1> @icmp_sle_vx_swap_v8i8(<8 x i8> %va, i8 %b, <8 x i1> %m, i32 zeroext %evl) {
557; CHECK-LABEL: icmp_sle_vx_swap_v8i8:
558; CHECK:       # %bb.0:
559; CHECK-NEXT:    vsetivli zero, 8, e8, mf2, ta, ma
560; CHECK-NEXT:    vmv.v.x v9, a0
561; CHECK-NEXT:    vsetvli zero, a1, e8, mf2, ta, ma
562; CHECK-NEXT:    vmsle.vv v0, v9, v8, v0.t
563; CHECK-NEXT:    ret
564  %elt.head = insertelement <8 x i8> poison, i8 %b, i32 0
565  %vb = shufflevector <8 x i8> %elt.head, <8 x i8> poison, <8 x i32> zeroinitializer
566  %v = call <8 x i1> @llvm.vp.icmp.v8i8(<8 x i8> %vb, <8 x i8> %va, metadata !"sle", <8 x i1> %m, i32 %evl)
567  ret <8 x i1> %v
568}
569
570define <8 x i1> @icmp_sle_vi_v8i8(<8 x i8> %va, <8 x i1> %m, i32 zeroext %evl) {
571; CHECK-LABEL: icmp_sle_vi_v8i8:
572; CHECK:       # %bb.0:
573; CHECK-NEXT:    vsetvli zero, a0, e8, mf2, ta, ma
574; CHECK-NEXT:    vmsle.vi v0, v8, 4, v0.t
575; CHECK-NEXT:    ret
576  %v = call <8 x i1> @llvm.vp.icmp.v8i8(<8 x i8> %va, <8 x i8> splat (i8 4), metadata !"sle", <8 x i1> %m, i32 %evl)
577  ret <8 x i1> %v
578}
579
580define <8 x i1> @icmp_sle_vi_swap_v8i8(<8 x i8> %va, <8 x i1> %m, i32 zeroext %evl) {
581; CHECK-LABEL: icmp_sle_vi_swap_v8i8:
582; CHECK:       # %bb.0:
583; CHECK-NEXT:    vsetvli zero, a0, e8, mf2, ta, ma
584; CHECK-NEXT:    vmsgt.vi v0, v8, 3, v0.t
585; CHECK-NEXT:    ret
586  %v = call <8 x i1> @llvm.vp.icmp.v8i8(<8 x i8> splat (i8 4), <8 x i8> %va, metadata !"sle", <8 x i1> %m, i32 %evl)
587  ret <8 x i1> %v
588}
589
590declare <256 x i1> @llvm.vp.icmp.v256i8(<256 x i8>, <256 x i8>, metadata, <256 x i1>, i32)
591
592define <256 x i1> @icmp_eq_vv_v256i8(<256 x i8> %va, <256 x i8> %vb, <256 x i1> %m, i32 zeroext %evl) {
593; CHECK-LABEL: icmp_eq_vv_v256i8:
594; CHECK:       # %bb.0:
595; CHECK-NEXT:    addi sp, sp, -16
596; CHECK-NEXT:    .cfi_def_cfa_offset 16
597; CHECK-NEXT:    csrr a1, vlenb
598; CHECK-NEXT:    slli a1, a1, 4
599; CHECK-NEXT:    sub sp, sp, a1
600; CHECK-NEXT:    .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x10, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 16 * vlenb
601; CHECK-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
602; CHECK-NEXT:    vmv1r.v v7, v0
603; CHECK-NEXT:    csrr a1, vlenb
604; CHECK-NEXT:    slli a1, a1, 3
605; CHECK-NEXT:    add a1, sp, a1
606; CHECK-NEXT:    addi a1, a1, 16
607; CHECK-NEXT:    vs8r.v v8, (a1) # Unknown-size Folded Spill
608; CHECK-NEXT:    li a1, 128
609; CHECK-NEXT:    addi a4, a0, 128
610; CHECK-NEXT:    vsetvli zero, a1, e8, m8, ta, ma
611; CHECK-NEXT:    vlm.v v0, (a2)
612; CHECK-NEXT:    addi a2, a3, -128
613; CHECK-NEXT:    vle8.v v8, (a4)
614; CHECK-NEXT:    sltu a4, a3, a2
615; CHECK-NEXT:    vle8.v v24, (a0)
616; CHECK-NEXT:    addi a0, sp, 16
617; CHECK-NEXT:    vs8r.v v24, (a0) # Unknown-size Folded Spill
618; CHECK-NEXT:    addi a4, a4, -1
619; CHECK-NEXT:    and a2, a4, a2
620; CHECK-NEXT:    vsetvli zero, a2, e8, m8, ta, ma
621; CHECK-NEXT:    vmseq.vv v6, v16, v8, v0.t
622; CHECK-NEXT:    bltu a3, a1, .LBB51_2
623; CHECK-NEXT:  # %bb.1:
624; CHECK-NEXT:    li a3, 128
625; CHECK-NEXT:  .LBB51_2:
626; CHECK-NEXT:    vmv1r.v v0, v7
627; CHECK-NEXT:    csrr a0, vlenb
628; CHECK-NEXT:    slli a0, a0, 3
629; CHECK-NEXT:    add a0, sp, a0
630; CHECK-NEXT:    addi a0, a0, 16
631; CHECK-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
632; CHECK-NEXT:    addi a0, sp, 16
633; CHECK-NEXT:    vl8r.v v24, (a0) # Unknown-size Folded Reload
634; CHECK-NEXT:    vsetvli zero, a3, e8, m8, ta, ma
635; CHECK-NEXT:    vmseq.vv v16, v8, v24, v0.t
636; CHECK-NEXT:    vmv1r.v v0, v16
637; CHECK-NEXT:    vmv1r.v v8, v6
638; CHECK-NEXT:    csrr a0, vlenb
639; CHECK-NEXT:    slli a0, a0, 4
640; CHECK-NEXT:    add sp, sp, a0
641; CHECK-NEXT:    .cfi_def_cfa sp, 16
642; CHECK-NEXT:    addi sp, sp, 16
643; CHECK-NEXT:    .cfi_def_cfa_offset 0
644; CHECK-NEXT:    ret
645  %v = call <256 x i1> @llvm.vp.icmp.v256i8(<256 x i8> %va, <256 x i8> %vb, metadata !"eq", <256 x i1> %m, i32 %evl)
646  ret <256 x i1> %v
647}
648
649define <256 x i1> @icmp_eq_vx_v256i8(<256 x i8> %va, i8 %b, <256 x i1> %m, i32 zeroext %evl) {
650; CHECK-LABEL: icmp_eq_vx_v256i8:
651; CHECK:       # %bb.0:
652; CHECK-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
653; CHECK-NEXT:    vmv1r.v v24, v0
654; CHECK-NEXT:    li a3, 128
655; CHECK-NEXT:    vsetvli zero, a3, e8, m8, ta, ma
656; CHECK-NEXT:    vlm.v v0, (a1)
657; CHECK-NEXT:    addi a1, a2, -128
658; CHECK-NEXT:    sltu a4, a2, a1
659; CHECK-NEXT:    addi a4, a4, -1
660; CHECK-NEXT:    and a1, a4, a1
661; CHECK-NEXT:    vsetvli zero, a1, e8, m8, ta, ma
662; CHECK-NEXT:    vmseq.vx v25, v16, a0, v0.t
663; CHECK-NEXT:    bltu a2, a3, .LBB52_2
664; CHECK-NEXT:  # %bb.1:
665; CHECK-NEXT:    li a2, 128
666; CHECK-NEXT:  .LBB52_2:
667; CHECK-NEXT:    vmv1r.v v0, v24
668; CHECK-NEXT:    vsetvli zero, a2, e8, m8, ta, ma
669; CHECK-NEXT:    vmseq.vx v16, v8, a0, v0.t
670; CHECK-NEXT:    vmv1r.v v0, v16
671; CHECK-NEXT:    vmv1r.v v8, v25
672; CHECK-NEXT:    ret
673  %elt.head = insertelement <256 x i8> poison, i8 %b, i32 0
674  %vb = shufflevector <256 x i8> %elt.head, <256 x i8> poison, <256 x i32> zeroinitializer
675  %v = call <256 x i1> @llvm.vp.icmp.v256i8(<256 x i8> %va, <256 x i8> %vb, metadata !"eq", <256 x i1> %m, i32 %evl)
676  ret <256 x i1> %v
677}
678
679define <256 x i1> @icmp_eq_vx_swap_v256i8(<256 x i8> %va, i8 %b, <256 x i1> %m, i32 zeroext %evl) {
680; CHECK-LABEL: icmp_eq_vx_swap_v256i8:
681; CHECK:       # %bb.0:
682; CHECK-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
683; CHECK-NEXT:    vmv1r.v v24, v0
684; CHECK-NEXT:    li a3, 128
685; CHECK-NEXT:    vsetvli zero, a3, e8, m8, ta, ma
686; CHECK-NEXT:    vlm.v v0, (a1)
687; CHECK-NEXT:    addi a1, a2, -128
688; CHECK-NEXT:    sltu a4, a2, a1
689; CHECK-NEXT:    addi a4, a4, -1
690; CHECK-NEXT:    and a1, a4, a1
691; CHECK-NEXT:    vsetvli zero, a1, e8, m8, ta, ma
692; CHECK-NEXT:    vmseq.vx v25, v16, a0, v0.t
693; CHECK-NEXT:    bltu a2, a3, .LBB53_2
694; CHECK-NEXT:  # %bb.1:
695; CHECK-NEXT:    li a2, 128
696; CHECK-NEXT:  .LBB53_2:
697; CHECK-NEXT:    vmv1r.v v0, v24
698; CHECK-NEXT:    vsetvli zero, a2, e8, m8, ta, ma
699; CHECK-NEXT:    vmseq.vx v16, v8, a0, v0.t
700; CHECK-NEXT:    vmv1r.v v0, v16
701; CHECK-NEXT:    vmv1r.v v8, v25
702; CHECK-NEXT:    ret
703  %elt.head = insertelement <256 x i8> poison, i8 %b, i32 0
704  %vb = shufflevector <256 x i8> %elt.head, <256 x i8> poison, <256 x i32> zeroinitializer
705  %v = call <256 x i1> @llvm.vp.icmp.v256i8(<256 x i8> %vb, <256 x i8> %va, metadata !"eq", <256 x i1> %m, i32 %evl)
706  ret <256 x i1> %v
707}
708
709declare <8 x i1> @llvm.vp.icmp.v8i32(<8 x i32>, <8 x i32>, metadata, <8 x i1>, i32)
710
711define <8 x i1> @icmp_eq_vv_v8i32(<8 x i32> %va, <8 x i32> %vb, <8 x i1> %m, i32 zeroext %evl) {
712; CHECK-LABEL: icmp_eq_vv_v8i32:
713; CHECK:       # %bb.0:
714; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
715; CHECK-NEXT:    vmseq.vv v12, v8, v10, v0.t
716; CHECK-NEXT:    vmv1r.v v0, v12
717; CHECK-NEXT:    ret
718  %v = call <8 x i1> @llvm.vp.icmp.v8i32(<8 x i32> %va, <8 x i32> %vb, metadata !"eq", <8 x i1> %m, i32 %evl)
719  ret <8 x i1> %v
720}
721
722define <8 x i1> @icmp_eq_vx_v8i32(<8 x i32> %va, i32 %b, <8 x i1> %m, i32 zeroext %evl) {
723; CHECK-LABEL: icmp_eq_vx_v8i32:
724; CHECK:       # %bb.0:
725; CHECK-NEXT:    vsetvli zero, a1, e32, m2, ta, ma
726; CHECK-NEXT:    vmseq.vx v10, v8, a0, v0.t
727; CHECK-NEXT:    vmv1r.v v0, v10
728; CHECK-NEXT:    ret
729  %elt.head = insertelement <8 x i32> poison, i32 %b, i32 0
730  %vb = shufflevector <8 x i32> %elt.head, <8 x i32> poison, <8 x i32> zeroinitializer
731  %v = call <8 x i1> @llvm.vp.icmp.v8i32(<8 x i32> %va, <8 x i32> %vb, metadata !"eq", <8 x i1> %m, i32 %evl)
732  ret <8 x i1> %v
733}
734
735define <8 x i1> @icmp_eq_vx_swap_v8i32(<8 x i32> %va, i32 %b, <8 x i1> %m, i32 zeroext %evl) {
736; CHECK-LABEL: icmp_eq_vx_swap_v8i32:
737; CHECK:       # %bb.0:
738; CHECK-NEXT:    vsetvli zero, a1, e32, m2, ta, ma
739; CHECK-NEXT:    vmseq.vx v10, v8, a0, v0.t
740; CHECK-NEXT:    vmv1r.v v0, v10
741; CHECK-NEXT:    ret
742  %elt.head = insertelement <8 x i32> poison, i32 %b, i32 0
743  %vb = shufflevector <8 x i32> %elt.head, <8 x i32> poison, <8 x i32> zeroinitializer
744  %v = call <8 x i1> @llvm.vp.icmp.v8i32(<8 x i32> %vb, <8 x i32> %va, metadata !"eq", <8 x i1> %m, i32 %evl)
745  ret <8 x i1> %v
746}
747
748define <8 x i1> @icmp_eq_vi_v8i32(<8 x i32> %va, <8 x i1> %m, i32 zeroext %evl) {
749; CHECK-LABEL: icmp_eq_vi_v8i32:
750; CHECK:       # %bb.0:
751; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
752; CHECK-NEXT:    vmseq.vi v10, v8, 4, v0.t
753; CHECK-NEXT:    vmv1r.v v0, v10
754; CHECK-NEXT:    ret
755  %v = call <8 x i1> @llvm.vp.icmp.v8i32(<8 x i32> %va, <8 x i32> splat (i32 4), metadata !"eq", <8 x i1> %m, i32 %evl)
756  ret <8 x i1> %v
757}
758
759define <8 x i1> @icmp_eq_vi_swap_v8i32(<8 x i32> %va, <8 x i1> %m, i32 zeroext %evl) {
760; CHECK-LABEL: icmp_eq_vi_swap_v8i32:
761; CHECK:       # %bb.0:
762; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
763; CHECK-NEXT:    vmseq.vi v10, v8, 4, v0.t
764; CHECK-NEXT:    vmv1r.v v0, v10
765; CHECK-NEXT:    ret
766  %v = call <8 x i1> @llvm.vp.icmp.v8i32(<8 x i32> splat (i32 4), <8 x i32> %va, metadata !"eq", <8 x i1> %m, i32 %evl)
767  ret <8 x i1> %v
768}
769
770define <8 x i1> @icmp_ne_vv_v8i32(<8 x i32> %va, <8 x i32> %vb, <8 x i1> %m, i32 zeroext %evl) {
771; CHECK-LABEL: icmp_ne_vv_v8i32:
772; CHECK:       # %bb.0:
773; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
774; CHECK-NEXT:    vmsne.vv v12, v8, v10, v0.t
775; CHECK-NEXT:    vmv1r.v v0, v12
776; CHECK-NEXT:    ret
777  %v = call <8 x i1> @llvm.vp.icmp.v8i32(<8 x i32> %va, <8 x i32> %vb, metadata !"ne", <8 x i1> %m, i32 %evl)
778  ret <8 x i1> %v
779}
780
781define <8 x i1> @icmp_ne_vx_v8i32(<8 x i32> %va, i32 %b, <8 x i1> %m, i32 zeroext %evl) {
782; CHECK-LABEL: icmp_ne_vx_v8i32:
783; CHECK:       # %bb.0:
784; CHECK-NEXT:    vsetvli zero, a1, e32, m2, ta, ma
785; CHECK-NEXT:    vmsne.vx v10, v8, a0, v0.t
786; CHECK-NEXT:    vmv1r.v v0, v10
787; CHECK-NEXT:    ret
788  %elt.head = insertelement <8 x i32> poison, i32 %b, i32 0
789  %vb = shufflevector <8 x i32> %elt.head, <8 x i32> poison, <8 x i32> zeroinitializer
790  %v = call <8 x i1> @llvm.vp.icmp.v8i32(<8 x i32> %va, <8 x i32> %vb, metadata !"ne", <8 x i1> %m, i32 %evl)
791  ret <8 x i1> %v
792}
793
794define <8 x i1> @icmp_ne_vx_swap_v8i32(<8 x i32> %va, i32 %b, <8 x i1> %m, i32 zeroext %evl) {
795; CHECK-LABEL: icmp_ne_vx_swap_v8i32:
796; CHECK:       # %bb.0:
797; CHECK-NEXT:    vsetvli zero, a1, e32, m2, ta, ma
798; CHECK-NEXT:    vmsne.vx v10, v8, a0, v0.t
799; CHECK-NEXT:    vmv1r.v v0, v10
800; CHECK-NEXT:    ret
801  %elt.head = insertelement <8 x i32> poison, i32 %b, i32 0
802  %vb = shufflevector <8 x i32> %elt.head, <8 x i32> poison, <8 x i32> zeroinitializer
803  %v = call <8 x i1> @llvm.vp.icmp.v8i32(<8 x i32> %vb, <8 x i32> %va, metadata !"ne", <8 x i1> %m, i32 %evl)
804  ret <8 x i1> %v
805}
806
807define <8 x i1> @icmp_ne_vi_v8i32(<8 x i32> %va, <8 x i1> %m, i32 zeroext %evl) {
808; CHECK-LABEL: icmp_ne_vi_v8i32:
809; CHECK:       # %bb.0:
810; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
811; CHECK-NEXT:    vmsne.vi v10, v8, 4, v0.t
812; CHECK-NEXT:    vmv1r.v v0, v10
813; CHECK-NEXT:    ret
814  %v = call <8 x i1> @llvm.vp.icmp.v8i32(<8 x i32> %va, <8 x i32> splat (i32 4), metadata !"ne", <8 x i1> %m, i32 %evl)
815  ret <8 x i1> %v
816}
817
818define <8 x i1> @icmp_ne_vi_swap_v8i32(<8 x i32> %va, <8 x i1> %m, i32 zeroext %evl) {
819; CHECK-LABEL: icmp_ne_vi_swap_v8i32:
820; CHECK:       # %bb.0:
821; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
822; CHECK-NEXT:    vmsne.vi v10, v8, 4, v0.t
823; CHECK-NEXT:    vmv1r.v v0, v10
824; CHECK-NEXT:    ret
825  %v = call <8 x i1> @llvm.vp.icmp.v8i32(<8 x i32> splat (i32 4), <8 x i32> %va, metadata !"ne", <8 x i1> %m, i32 %evl)
826  ret <8 x i1> %v
827}
828
829define <8 x i1> @icmp_ugt_vv_v8i32(<8 x i32> %va, <8 x i32> %vb, <8 x i1> %m, i32 zeroext %evl) {
830; CHECK-LABEL: icmp_ugt_vv_v8i32:
831; CHECK:       # %bb.0:
832; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
833; CHECK-NEXT:    vmsltu.vv v12, v10, v8, v0.t
834; CHECK-NEXT:    vmv1r.v v0, v12
835; CHECK-NEXT:    ret
836  %v = call <8 x i1> @llvm.vp.icmp.v8i32(<8 x i32> %va, <8 x i32> %vb, metadata !"ugt", <8 x i1> %m, i32 %evl)
837  ret <8 x i1> %v
838}
839
840define <8 x i1> @icmp_ugt_vx_v8i32(<8 x i32> %va, i32 %b, <8 x i1> %m, i32 zeroext %evl) {
841; CHECK-LABEL: icmp_ugt_vx_v8i32:
842; CHECK:       # %bb.0:
843; CHECK-NEXT:    vsetvli zero, a1, e32, m2, ta, ma
844; CHECK-NEXT:    vmsgtu.vx v10, v8, a0, v0.t
845; CHECK-NEXT:    vmv1r.v v0, v10
846; CHECK-NEXT:    ret
847  %elt.head = insertelement <8 x i32> poison, i32 %b, i32 0
848  %vb = shufflevector <8 x i32> %elt.head, <8 x i32> poison, <8 x i32> zeroinitializer
849  %v = call <8 x i1> @llvm.vp.icmp.v8i32(<8 x i32> %va, <8 x i32> %vb, metadata !"ugt", <8 x i1> %m, i32 %evl)
850  ret <8 x i1> %v
851}
852
853define <8 x i1> @icmp_ugt_vx_swap_v8i32(<8 x i32> %va, i32 %b, <8 x i1> %m, i32 zeroext %evl) {
854; CHECK-LABEL: icmp_ugt_vx_swap_v8i32:
855; CHECK:       # %bb.0:
856; CHECK-NEXT:    vsetvli zero, a1, e32, m2, ta, ma
857; CHECK-NEXT:    vmsltu.vx v10, v8, a0, v0.t
858; CHECK-NEXT:    vmv1r.v v0, v10
859; CHECK-NEXT:    ret
860  %elt.head = insertelement <8 x i32> poison, i32 %b, i32 0
861  %vb = shufflevector <8 x i32> %elt.head, <8 x i32> poison, <8 x i32> zeroinitializer
862  %v = call <8 x i1> @llvm.vp.icmp.v8i32(<8 x i32> %vb, <8 x i32> %va, metadata !"ugt", <8 x i1> %m, i32 %evl)
863  ret <8 x i1> %v
864}
865
866define <8 x i1> @icmp_ugt_vi_v8i32(<8 x i32> %va, <8 x i1> %m, i32 zeroext %evl) {
867; CHECK-LABEL: icmp_ugt_vi_v8i32:
868; CHECK:       # %bb.0:
869; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
870; CHECK-NEXT:    vmsgtu.vi v10, v8, 4, v0.t
871; CHECK-NEXT:    vmv1r.v v0, v10
872; CHECK-NEXT:    ret
873  %v = call <8 x i1> @llvm.vp.icmp.v8i32(<8 x i32> %va, <8 x i32> splat (i32 4), metadata !"ugt", <8 x i1> %m, i32 %evl)
874  ret <8 x i1> %v
875}
876
877define <8 x i1> @icmp_ugt_vi_swap_v8i32(<8 x i32> %va, <8 x i1> %m, i32 zeroext %evl) {
878; CHECK-LABEL: icmp_ugt_vi_swap_v8i32:
879; CHECK:       # %bb.0:
880; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
881; CHECK-NEXT:    vmsleu.vi v10, v8, 3, v0.t
882; CHECK-NEXT:    vmv1r.v v0, v10
883; CHECK-NEXT:    ret
884  %v = call <8 x i1> @llvm.vp.icmp.v8i32(<8 x i32> splat (i32 4), <8 x i32> %va, metadata !"ugt", <8 x i1> %m, i32 %evl)
885  ret <8 x i1> %v
886}
887
888define <8 x i1> @icmp_uge_vv_v8i32(<8 x i32> %va, <8 x i32> %vb, <8 x i1> %m, i32 zeroext %evl) {
889; CHECK-LABEL: icmp_uge_vv_v8i32:
890; CHECK:       # %bb.0:
891; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
892; CHECK-NEXT:    vmsleu.vv v12, v10, v8, v0.t
893; CHECK-NEXT:    vmv1r.v v0, v12
894; CHECK-NEXT:    ret
895  %v = call <8 x i1> @llvm.vp.icmp.v8i32(<8 x i32> %va, <8 x i32> %vb, metadata !"uge", <8 x i1> %m, i32 %evl)
896  ret <8 x i1> %v
897}
898
899define <8 x i1> @icmp_uge_vx_v8i32(<8 x i32> %va, i32 %b, <8 x i1> %m, i32 zeroext %evl) {
900; CHECK-LABEL: icmp_uge_vx_v8i32:
901; CHECK:       # %bb.0:
902; CHECK-NEXT:    vsetivli zero, 8, e32, m2, ta, ma
903; CHECK-NEXT:    vmv.v.x v12, a0
904; CHECK-NEXT:    vsetvli zero, a1, e32, m2, ta, ma
905; CHECK-NEXT:    vmsleu.vv v10, v12, v8, v0.t
906; CHECK-NEXT:    vmv1r.v v0, v10
907; CHECK-NEXT:    ret
908  %elt.head = insertelement <8 x i32> poison, i32 %b, i32 0
909  %vb = shufflevector <8 x i32> %elt.head, <8 x i32> poison, <8 x i32> zeroinitializer
910  %v = call <8 x i1> @llvm.vp.icmp.v8i32(<8 x i32> %va, <8 x i32> %vb, metadata !"uge", <8 x i1> %m, i32 %evl)
911  ret <8 x i1> %v
912}
913
914define <8 x i1> @icmp_uge_vx_swap_v8i32(<8 x i32> %va, i32 %b, <8 x i1> %m, i32 zeroext %evl) {
915; CHECK-LABEL: icmp_uge_vx_swap_v8i32:
916; CHECK:       # %bb.0:
917; CHECK-NEXT:    vsetvli zero, a1, e32, m2, ta, ma
918; CHECK-NEXT:    vmsleu.vx v10, v8, a0, v0.t
919; CHECK-NEXT:    vmv1r.v v0, v10
920; CHECK-NEXT:    ret
921  %elt.head = insertelement <8 x i32> poison, i32 %b, i32 0
922  %vb = shufflevector <8 x i32> %elt.head, <8 x i32> poison, <8 x i32> zeroinitializer
923  %v = call <8 x i1> @llvm.vp.icmp.v8i32(<8 x i32> %vb, <8 x i32> %va, metadata !"uge", <8 x i1> %m, i32 %evl)
924  ret <8 x i1> %v
925}
926
927define <8 x i1> @icmp_uge_vi_v8i32(<8 x i32> %va, <8 x i1> %m, i32 zeroext %evl) {
928; CHECK-LABEL: icmp_uge_vi_v8i32:
929; CHECK:       # %bb.0:
930; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
931; CHECK-NEXT:    vmsgtu.vi v10, v8, 3, v0.t
932; CHECK-NEXT:    vmv1r.v v0, v10
933; CHECK-NEXT:    ret
934  %v = call <8 x i1> @llvm.vp.icmp.v8i32(<8 x i32> %va, <8 x i32> splat (i32 4), metadata !"uge", <8 x i1> %m, i32 %evl)
935  ret <8 x i1> %v
936}
937
938define <8 x i1> @icmp_uge_vi_swap_v8i32(<8 x i32> %va, <8 x i1> %m, i32 zeroext %evl) {
939; CHECK-LABEL: icmp_uge_vi_swap_v8i32:
940; CHECK:       # %bb.0:
941; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
942; CHECK-NEXT:    vmsleu.vi v10, v8, 4, v0.t
943; CHECK-NEXT:    vmv1r.v v0, v10
944; CHECK-NEXT:    ret
945  %v = call <8 x i1> @llvm.vp.icmp.v8i32(<8 x i32> splat (i32 4), <8 x i32> %va, metadata !"uge", <8 x i1> %m, i32 %evl)
946  ret <8 x i1> %v
947}
948
949define <8 x i1> @icmp_ult_vv_v8i32(<8 x i32> %va, <8 x i32> %vb, <8 x i1> %m, i32 zeroext %evl) {
950; CHECK-LABEL: icmp_ult_vv_v8i32:
951; CHECK:       # %bb.0:
952; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
953; CHECK-NEXT:    vmsltu.vv v12, v8, v10, v0.t
954; CHECK-NEXT:    vmv1r.v v0, v12
955; CHECK-NEXT:    ret
956  %v = call <8 x i1> @llvm.vp.icmp.v8i32(<8 x i32> %va, <8 x i32> %vb, metadata !"ult", <8 x i1> %m, i32 %evl)
957  ret <8 x i1> %v
958}
959
960define <8 x i1> @icmp_ult_vx_v8i32(<8 x i32> %va, i32 %b, <8 x i1> %m, i32 zeroext %evl) {
961; CHECK-LABEL: icmp_ult_vx_v8i32:
962; CHECK:       # %bb.0:
963; CHECK-NEXT:    vsetvli zero, a1, e32, m2, ta, ma
964; CHECK-NEXT:    vmsltu.vx v10, v8, a0, v0.t
965; CHECK-NEXT:    vmv1r.v v0, v10
966; CHECK-NEXT:    ret
967  %elt.head = insertelement <8 x i32> poison, i32 %b, i32 0
968  %vb = shufflevector <8 x i32> %elt.head, <8 x i32> poison, <8 x i32> zeroinitializer
969  %v = call <8 x i1> @llvm.vp.icmp.v8i32(<8 x i32> %va, <8 x i32> %vb, metadata !"ult", <8 x i1> %m, i32 %evl)
970  ret <8 x i1> %v
971}
972
973define <8 x i1> @icmp_ult_vx_swap_v8i32(<8 x i32> %va, i32 %b, <8 x i1> %m, i32 zeroext %evl) {
974; CHECK-LABEL: icmp_ult_vx_swap_v8i32:
975; CHECK:       # %bb.0:
976; CHECK-NEXT:    vsetvli zero, a1, e32, m2, ta, ma
977; CHECK-NEXT:    vmsgtu.vx v10, v8, a0, v0.t
978; CHECK-NEXT:    vmv1r.v v0, v10
979; CHECK-NEXT:    ret
980  %elt.head = insertelement <8 x i32> poison, i32 %b, i32 0
981  %vb = shufflevector <8 x i32> %elt.head, <8 x i32> poison, <8 x i32> zeroinitializer
982  %v = call <8 x i1> @llvm.vp.icmp.v8i32(<8 x i32> %vb, <8 x i32> %va, metadata !"ult", <8 x i1> %m, i32 %evl)
983  ret <8 x i1> %v
984}
985
986define <8 x i1> @icmp_ult_vi_v8i32(<8 x i32> %va, <8 x i1> %m, i32 zeroext %evl) {
987; CHECK-LABEL: icmp_ult_vi_v8i32:
988; CHECK:       # %bb.0:
989; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
990; CHECK-NEXT:    vmsleu.vi v10, v8, 3, v0.t
991; CHECK-NEXT:    vmv1r.v v0, v10
992; CHECK-NEXT:    ret
993  %v = call <8 x i1> @llvm.vp.icmp.v8i32(<8 x i32> %va, <8 x i32> splat (i32 4), metadata !"ult", <8 x i1> %m, i32 %evl)
994  ret <8 x i1> %v
995}
996
997define <8 x i1> @icmp_ult_vi_swap_v8i32(<8 x i32> %va, <8 x i1> %m, i32 zeroext %evl) {
998; CHECK-LABEL: icmp_ult_vi_swap_v8i32:
999; CHECK:       # %bb.0:
1000; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
1001; CHECK-NEXT:    vmsgtu.vi v10, v8, 4, v0.t
1002; CHECK-NEXT:    vmv1r.v v0, v10
1003; CHECK-NEXT:    ret
1004  %v = call <8 x i1> @llvm.vp.icmp.v8i32(<8 x i32> splat (i32 4), <8 x i32> %va, metadata !"ult", <8 x i1> %m, i32 %evl)
1005  ret <8 x i1> %v
1006}
1007
1008define <8 x i1> @icmp_sgt_vv_v8i32(<8 x i32> %va, <8 x i32> %vb, <8 x i1> %m, i32 zeroext %evl) {
1009; CHECK-LABEL: icmp_sgt_vv_v8i32:
1010; CHECK:       # %bb.0:
1011; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
1012; CHECK-NEXT:    vmslt.vv v12, v10, v8, v0.t
1013; CHECK-NEXT:    vmv1r.v v0, v12
1014; CHECK-NEXT:    ret
1015  %v = call <8 x i1> @llvm.vp.icmp.v8i32(<8 x i32> %va, <8 x i32> %vb, metadata !"sgt", <8 x i1> %m, i32 %evl)
1016  ret <8 x i1> %v
1017}
1018
1019define <8 x i1> @icmp_sgt_vx_v8i32(<8 x i32> %va, i32 %b, <8 x i1> %m, i32 zeroext %evl) {
1020; CHECK-LABEL: icmp_sgt_vx_v8i32:
1021; CHECK:       # %bb.0:
1022; CHECK-NEXT:    vsetvli zero, a1, e32, m2, ta, ma
1023; CHECK-NEXT:    vmsgt.vx v10, v8, a0, v0.t
1024; CHECK-NEXT:    vmv1r.v v0, v10
1025; CHECK-NEXT:    ret
1026  %elt.head = insertelement <8 x i32> poison, i32 %b, i32 0
1027  %vb = shufflevector <8 x i32> %elt.head, <8 x i32> poison, <8 x i32> zeroinitializer
1028  %v = call <8 x i1> @llvm.vp.icmp.v8i32(<8 x i32> %va, <8 x i32> %vb, metadata !"sgt", <8 x i1> %m, i32 %evl)
1029  ret <8 x i1> %v
1030}
1031
1032define <8 x i1> @icmp_sgt_vx_swap_v8i32(<8 x i32> %va, i32 %b, <8 x i1> %m, i32 zeroext %evl) {
1033; CHECK-LABEL: icmp_sgt_vx_swap_v8i32:
1034; CHECK:       # %bb.0:
1035; CHECK-NEXT:    vsetvli zero, a1, e32, m2, ta, ma
1036; CHECK-NEXT:    vmslt.vx v10, v8, a0, v0.t
1037; CHECK-NEXT:    vmv1r.v v0, v10
1038; CHECK-NEXT:    ret
1039  %elt.head = insertelement <8 x i32> poison, i32 %b, i32 0
1040  %vb = shufflevector <8 x i32> %elt.head, <8 x i32> poison, <8 x i32> zeroinitializer
1041  %v = call <8 x i1> @llvm.vp.icmp.v8i32(<8 x i32> %vb, <8 x i32> %va, metadata !"sgt", <8 x i1> %m, i32 %evl)
1042  ret <8 x i1> %v
1043}
1044
1045define <8 x i1> @icmp_sgt_vi_v8i32(<8 x i32> %va, <8 x i1> %m, i32 zeroext %evl) {
1046; CHECK-LABEL: icmp_sgt_vi_v8i32:
1047; CHECK:       # %bb.0:
1048; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
1049; CHECK-NEXT:    vmsgt.vi v10, v8, 4, v0.t
1050; CHECK-NEXT:    vmv1r.v v0, v10
1051; CHECK-NEXT:    ret
1052  %v = call <8 x i1> @llvm.vp.icmp.v8i32(<8 x i32> %va, <8 x i32> splat (i32 4), metadata !"sgt", <8 x i1> %m, i32 %evl)
1053  ret <8 x i1> %v
1054}
1055
1056define <8 x i1> @icmp_sgt_vi_swap_v8i32(<8 x i32> %va, <8 x i1> %m, i32 zeroext %evl) {
1057; CHECK-LABEL: icmp_sgt_vi_swap_v8i32:
1058; CHECK:       # %bb.0:
1059; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
1060; CHECK-NEXT:    vmsle.vi v10, v8, 3, v0.t
1061; CHECK-NEXT:    vmv1r.v v0, v10
1062; CHECK-NEXT:    ret
1063  %v = call <8 x i1> @llvm.vp.icmp.v8i32(<8 x i32> splat (i32 4), <8 x i32> %va, metadata !"sgt", <8 x i1> %m, i32 %evl)
1064  ret <8 x i1> %v
1065}
1066
1067define <8 x i1> @icmp_sge_vv_v8i32(<8 x i32> %va, <8 x i32> %vb, <8 x i1> %m, i32 zeroext %evl) {
1068; CHECK-LABEL: icmp_sge_vv_v8i32:
1069; CHECK:       # %bb.0:
1070; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
1071; CHECK-NEXT:    vmsle.vv v12, v10, v8, v0.t
1072; CHECK-NEXT:    vmv1r.v v0, v12
1073; CHECK-NEXT:    ret
1074  %v = call <8 x i1> @llvm.vp.icmp.v8i32(<8 x i32> %va, <8 x i32> %vb, metadata !"sge", <8 x i1> %m, i32 %evl)
1075  ret <8 x i1> %v
1076}
1077
1078define <8 x i1> @icmp_sge_vx_v8i32(<8 x i32> %va, i32 %b, <8 x i1> %m, i32 zeroext %evl) {
1079; CHECK-LABEL: icmp_sge_vx_v8i32:
1080; CHECK:       # %bb.0:
1081; CHECK-NEXT:    vsetivli zero, 8, e32, m2, ta, ma
1082; CHECK-NEXT:    vmv.v.x v12, a0
1083; CHECK-NEXT:    vsetvli zero, a1, e32, m2, ta, ma
1084; CHECK-NEXT:    vmsle.vv v10, v12, v8, v0.t
1085; CHECK-NEXT:    vmv1r.v v0, v10
1086; CHECK-NEXT:    ret
1087  %elt.head = insertelement <8 x i32> poison, i32 %b, i32 0
1088  %vb = shufflevector <8 x i32> %elt.head, <8 x i32> poison, <8 x i32> zeroinitializer
1089  %v = call <8 x i1> @llvm.vp.icmp.v8i32(<8 x i32> %va, <8 x i32> %vb, metadata !"sge", <8 x i1> %m, i32 %evl)
1090  ret <8 x i1> %v
1091}
1092
1093define <8 x i1> @icmp_sge_vx_swap_v8i32(<8 x i32> %va, i32 %b, <8 x i1> %m, i32 zeroext %evl) {
1094; CHECK-LABEL: icmp_sge_vx_swap_v8i32:
1095; CHECK:       # %bb.0:
1096; CHECK-NEXT:    vsetvli zero, a1, e32, m2, ta, ma
1097; CHECK-NEXT:    vmsle.vx v10, v8, a0, v0.t
1098; CHECK-NEXT:    vmv1r.v v0, v10
1099; CHECK-NEXT:    ret
1100  %elt.head = insertelement <8 x i32> poison, i32 %b, i32 0
1101  %vb = shufflevector <8 x i32> %elt.head, <8 x i32> poison, <8 x i32> zeroinitializer
1102  %v = call <8 x i1> @llvm.vp.icmp.v8i32(<8 x i32> %vb, <8 x i32> %va, metadata !"sge", <8 x i1> %m, i32 %evl)
1103  ret <8 x i1> %v
1104}
1105
1106define <8 x i1> @icmp_sge_vi_v8i32(<8 x i32> %va, <8 x i1> %m, i32 zeroext %evl) {
1107; CHECK-LABEL: icmp_sge_vi_v8i32:
1108; CHECK:       # %bb.0:
1109; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
1110; CHECK-NEXT:    vmsgt.vi v10, v8, 3, v0.t
1111; CHECK-NEXT:    vmv1r.v v0, v10
1112; CHECK-NEXT:    ret
1113  %v = call <8 x i1> @llvm.vp.icmp.v8i32(<8 x i32> %va, <8 x i32> splat (i32 4), metadata !"sge", <8 x i1> %m, i32 %evl)
1114  ret <8 x i1> %v
1115}
1116
1117define <8 x i1> @icmp_sge_vi_swap_v8i32(<8 x i32> %va, <8 x i1> %m, i32 zeroext %evl) {
1118; CHECK-LABEL: icmp_sge_vi_swap_v8i32:
1119; CHECK:       # %bb.0:
1120; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
1121; CHECK-NEXT:    vmsle.vi v10, v8, 4, v0.t
1122; CHECK-NEXT:    vmv1r.v v0, v10
1123; CHECK-NEXT:    ret
1124  %v = call <8 x i1> @llvm.vp.icmp.v8i32(<8 x i32> splat (i32 4), <8 x i32> %va, metadata !"sge", <8 x i1> %m, i32 %evl)
1125  ret <8 x i1> %v
1126}
1127
1128define <8 x i1> @icmp_slt_vv_v8i32(<8 x i32> %va, <8 x i32> %vb, <8 x i1> %m, i32 zeroext %evl) {
1129; CHECK-LABEL: icmp_slt_vv_v8i32:
1130; CHECK:       # %bb.0:
1131; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
1132; CHECK-NEXT:    vmslt.vv v12, v8, v10, v0.t
1133; CHECK-NEXT:    vmv1r.v v0, v12
1134; CHECK-NEXT:    ret
1135  %v = call <8 x i1> @llvm.vp.icmp.v8i32(<8 x i32> %va, <8 x i32> %vb, metadata !"slt", <8 x i1> %m, i32 %evl)
1136  ret <8 x i1> %v
1137}
1138
1139define <8 x i1> @icmp_slt_vx_v8i32(<8 x i32> %va, i32 %b, <8 x i1> %m, i32 zeroext %evl) {
1140; CHECK-LABEL: icmp_slt_vx_v8i32:
1141; CHECK:       # %bb.0:
1142; CHECK-NEXT:    vsetvli zero, a1, e32, m2, ta, ma
1143; CHECK-NEXT:    vmslt.vx v10, v8, a0, v0.t
1144; CHECK-NEXT:    vmv1r.v v0, v10
1145; CHECK-NEXT:    ret
1146  %elt.head = insertelement <8 x i32> poison, i32 %b, i32 0
1147  %vb = shufflevector <8 x i32> %elt.head, <8 x i32> poison, <8 x i32> zeroinitializer
1148  %v = call <8 x i1> @llvm.vp.icmp.v8i32(<8 x i32> %va, <8 x i32> %vb, metadata !"slt", <8 x i1> %m, i32 %evl)
1149  ret <8 x i1> %v
1150}
1151
1152define <8 x i1> @icmp_slt_vx_swap_v8i32(<8 x i32> %va, i32 %b, <8 x i1> %m, i32 zeroext %evl) {
1153; CHECK-LABEL: icmp_slt_vx_swap_v8i32:
1154; CHECK:       # %bb.0:
1155; CHECK-NEXT:    vsetvli zero, a1, e32, m2, ta, ma
1156; CHECK-NEXT:    vmsgt.vx v10, v8, a0, v0.t
1157; CHECK-NEXT:    vmv1r.v v0, v10
1158; CHECK-NEXT:    ret
1159  %elt.head = insertelement <8 x i32> poison, i32 %b, i32 0
1160  %vb = shufflevector <8 x i32> %elt.head, <8 x i32> poison, <8 x i32> zeroinitializer
1161  %v = call <8 x i1> @llvm.vp.icmp.v8i32(<8 x i32> %vb, <8 x i32> %va, metadata !"slt", <8 x i1> %m, i32 %evl)
1162  ret <8 x i1> %v
1163}
1164
1165define <8 x i1> @icmp_slt_vi_v8i32(<8 x i32> %va, <8 x i1> %m, i32 zeroext %evl) {
1166; CHECK-LABEL: icmp_slt_vi_v8i32:
1167; CHECK:       # %bb.0:
1168; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
1169; CHECK-NEXT:    vmsle.vi v10, v8, 3, v0.t
1170; CHECK-NEXT:    vmv1r.v v0, v10
1171; CHECK-NEXT:    ret
1172  %v = call <8 x i1> @llvm.vp.icmp.v8i32(<8 x i32> %va, <8 x i32> splat (i32 4), metadata !"slt", <8 x i1> %m, i32 %evl)
1173  ret <8 x i1> %v
1174}
1175
1176define <8 x i1> @icmp_slt_vi_swap_v8i32(<8 x i32> %va, <8 x i1> %m, i32 zeroext %evl) {
1177; CHECK-LABEL: icmp_slt_vi_swap_v8i32:
1178; CHECK:       # %bb.0:
1179; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
1180; CHECK-NEXT:    vmsgt.vi v10, v8, 4, v0.t
1181; CHECK-NEXT:    vmv1r.v v0, v10
1182; CHECK-NEXT:    ret
1183  %v = call <8 x i1> @llvm.vp.icmp.v8i32(<8 x i32> splat (i32 4), <8 x i32> %va, metadata !"slt", <8 x i1> %m, i32 %evl)
1184  ret <8 x i1> %v
1185}
1186
1187define <8 x i1> @icmp_sle_vv_v8i32(<8 x i32> %va, <8 x i32> %vb, <8 x i1> %m, i32 zeroext %evl) {
1188; CHECK-LABEL: icmp_sle_vv_v8i32:
1189; CHECK:       # %bb.0:
1190; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
1191; CHECK-NEXT:    vmsle.vv v12, v8, v10, v0.t
1192; CHECK-NEXT:    vmv1r.v v0, v12
1193; CHECK-NEXT:    ret
1194  %v = call <8 x i1> @llvm.vp.icmp.v8i32(<8 x i32> %va, <8 x i32> %vb, metadata !"sle", <8 x i1> %m, i32 %evl)
1195  ret <8 x i1> %v
1196}
1197
1198define <8 x i1> @icmp_sle_vx_v8i32(<8 x i32> %va, i32 %b, <8 x i1> %m, i32 zeroext %evl) {
1199; CHECK-LABEL: icmp_sle_vx_v8i32:
1200; CHECK:       # %bb.0:
1201; CHECK-NEXT:    vsetvli zero, a1, e32, m2, ta, ma
1202; CHECK-NEXT:    vmsle.vx v10, v8, a0, v0.t
1203; CHECK-NEXT:    vmv1r.v v0, v10
1204; CHECK-NEXT:    ret
1205  %elt.head = insertelement <8 x i32> poison, i32 %b, i32 0
1206  %vb = shufflevector <8 x i32> %elt.head, <8 x i32> poison, <8 x i32> zeroinitializer
1207  %v = call <8 x i1> @llvm.vp.icmp.v8i32(<8 x i32> %va, <8 x i32> %vb, metadata !"sle", <8 x i1> %m, i32 %evl)
1208  ret <8 x i1> %v
1209}
1210
1211define <8 x i1> @icmp_sle_vx_swap_v8i32(<8 x i32> %va, i32 %b, <8 x i1> %m, i32 zeroext %evl) {
1212; CHECK-LABEL: icmp_sle_vx_swap_v8i32:
1213; CHECK:       # %bb.0:
1214; CHECK-NEXT:    vsetivli zero, 8, e32, m2, ta, ma
1215; CHECK-NEXT:    vmv.v.x v12, a0
1216; CHECK-NEXT:    vsetvli zero, a1, e32, m2, ta, ma
1217; CHECK-NEXT:    vmsle.vv v10, v12, v8, v0.t
1218; CHECK-NEXT:    vmv1r.v v0, v10
1219; CHECK-NEXT:    ret
1220  %elt.head = insertelement <8 x i32> poison, i32 %b, i32 0
1221  %vb = shufflevector <8 x i32> %elt.head, <8 x i32> poison, <8 x i32> zeroinitializer
1222  %v = call <8 x i1> @llvm.vp.icmp.v8i32(<8 x i32> %vb, <8 x i32> %va, metadata !"sle", <8 x i1> %m, i32 %evl)
1223  ret <8 x i1> %v
1224}
1225
1226define <8 x i1> @icmp_sle_vi_v8i32(<8 x i32> %va, <8 x i1> %m, i32 zeroext %evl) {
1227; CHECK-LABEL: icmp_sle_vi_v8i32:
1228; CHECK:       # %bb.0:
1229; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
1230; CHECK-NEXT:    vmsle.vi v10, v8, 4, v0.t
1231; CHECK-NEXT:    vmv1r.v v0, v10
1232; CHECK-NEXT:    ret
1233  %v = call <8 x i1> @llvm.vp.icmp.v8i32(<8 x i32> %va, <8 x i32> splat (i32 4), metadata !"sle", <8 x i1> %m, i32 %evl)
1234  ret <8 x i1> %v
1235}
1236
1237define <8 x i1> @icmp_sle_vi_swap_v8i32(<8 x i32> %va, <8 x i1> %m, i32 zeroext %evl) {
1238; CHECK-LABEL: icmp_sle_vi_swap_v8i32:
1239; CHECK:       # %bb.0:
1240; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
1241; CHECK-NEXT:    vmsgt.vi v10, v8, 3, v0.t
1242; CHECK-NEXT:    vmv1r.v v0, v10
1243; CHECK-NEXT:    ret
1244  %v = call <8 x i1> @llvm.vp.icmp.v8i32(<8 x i32> splat (i32 4), <8 x i32> %va, metadata !"sle", <8 x i1> %m, i32 %evl)
1245  ret <8 x i1> %v
1246}
1247
1248declare <64 x i1> @llvm.vp.icmp.v64i32(<64 x i32>, <64 x i32>, metadata, <64 x i1>, i32)
1249
1250define <64 x i1> @icmp_eq_vv_v64i32(<64 x i32> %va, <64 x i32> %vb, <64 x i1> %m, i32 zeroext %evl) {
1251; CHECK-LABEL: icmp_eq_vv_v64i32:
1252; CHECK:       # %bb.0:
1253; CHECK-NEXT:    addi sp, sp, -16
1254; CHECK-NEXT:    .cfi_def_cfa_offset 16
1255; CHECK-NEXT:    csrr a1, vlenb
1256; CHECK-NEXT:    slli a1, a1, 4
1257; CHECK-NEXT:    sub sp, sp, a1
1258; CHECK-NEXT:    .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x10, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 16 * vlenb
1259; CHECK-NEXT:    csrr a1, vlenb
1260; CHECK-NEXT:    slli a1, a1, 3
1261; CHECK-NEXT:    add a1, sp, a1
1262; CHECK-NEXT:    addi a1, a1, 16
1263; CHECK-NEXT:    vs8r.v v16, (a1) # Unknown-size Folded Spill
1264; CHECK-NEXT:    addi a1, a0, 128
1265; CHECK-NEXT:    li a3, 32
1266; CHECK-NEXT:    vsetvli zero, a3, e32, m8, ta, ma
1267; CHECK-NEXT:    vle32.v v16, (a1)
1268; CHECK-NEXT:    addi a1, sp, 16
1269; CHECK-NEXT:    vs8r.v v16, (a1) # Unknown-size Folded Spill
1270; CHECK-NEXT:    vle32.v v16, (a0)
1271; CHECK-NEXT:    mv a0, a2
1272; CHECK-NEXT:    vsetivli zero, 4, e8, mf2, ta, ma
1273; CHECK-NEXT:    vslidedown.vi v24, v0, 4
1274; CHECK-NEXT:    bltu a2, a3, .LBB99_2
1275; CHECK-NEXT:  # %bb.1:
1276; CHECK-NEXT:    li a0, 32
1277; CHECK-NEXT:  .LBB99_2:
1278; CHECK-NEXT:    vsetvli zero, a0, e32, m8, ta, ma
1279; CHECK-NEXT:    vmseq.vv v7, v8, v16, v0.t
1280; CHECK-NEXT:    addi a0, a2, -32
1281; CHECK-NEXT:    sltu a1, a2, a0
1282; CHECK-NEXT:    addi a1, a1, -1
1283; CHECK-NEXT:    and a0, a1, a0
1284; CHECK-NEXT:    vmv1r.v v0, v24
1285; CHECK-NEXT:    csrr a1, vlenb
1286; CHECK-NEXT:    slli a1, a1, 3
1287; CHECK-NEXT:    add a1, sp, a1
1288; CHECK-NEXT:    addi a1, a1, 16
1289; CHECK-NEXT:    vl8r.v v16, (a1) # Unknown-size Folded Reload
1290; CHECK-NEXT:    addi a1, sp, 16
1291; CHECK-NEXT:    vl8r.v v24, (a1) # Unknown-size Folded Reload
1292; CHECK-NEXT:    vsetvli zero, a0, e32, m8, ta, ma
1293; CHECK-NEXT:    vmseq.vv v8, v16, v24, v0.t
1294; CHECK-NEXT:    vsetivli zero, 8, e8, mf2, ta, ma
1295; CHECK-NEXT:    vslideup.vi v7, v8, 4
1296; CHECK-NEXT:    vmv1r.v v0, v7
1297; CHECK-NEXT:    csrr a0, vlenb
1298; CHECK-NEXT:    slli a0, a0, 4
1299; CHECK-NEXT:    add sp, sp, a0
1300; CHECK-NEXT:    .cfi_def_cfa sp, 16
1301; CHECK-NEXT:    addi sp, sp, 16
1302; CHECK-NEXT:    .cfi_def_cfa_offset 0
1303; CHECK-NEXT:    ret
1304  %v = call <64 x i1> @llvm.vp.icmp.v64i32(<64 x i32> %va, <64 x i32> %vb, metadata !"eq", <64 x i1> %m, i32 %evl)
1305  ret <64 x i1> %v
1306}
1307
1308define <64 x i1> @icmp_eq_vx_v64i32(<64 x i32> %va, i32 %b, <64 x i1> %m, i32 zeroext %evl) {
1309; CHECK-LABEL: icmp_eq_vx_v64i32:
1310; CHECK:       # %bb.0:
1311; CHECK-NEXT:    li a3, 32
1312; CHECK-NEXT:    vsetivli zero, 4, e8, mf2, ta, ma
1313; CHECK-NEXT:    vslidedown.vi v24, v0, 4
1314; CHECK-NEXT:    mv a2, a1
1315; CHECK-NEXT:    bltu a1, a3, .LBB100_2
1316; CHECK-NEXT:  # %bb.1:
1317; CHECK-NEXT:    li a2, 32
1318; CHECK-NEXT:  .LBB100_2:
1319; CHECK-NEXT:    vsetvli zero, a2, e32, m8, ta, ma
1320; CHECK-NEXT:    vmseq.vx v25, v8, a0, v0.t
1321; CHECK-NEXT:    addi a2, a1, -32
1322; CHECK-NEXT:    sltu a1, a1, a2
1323; CHECK-NEXT:    addi a1, a1, -1
1324; CHECK-NEXT:    and a1, a1, a2
1325; CHECK-NEXT:    vmv1r.v v0, v24
1326; CHECK-NEXT:    vsetvli zero, a1, e32, m8, ta, ma
1327; CHECK-NEXT:    vmseq.vx v8, v16, a0, v0.t
1328; CHECK-NEXT:    vsetivli zero, 8, e8, mf2, ta, ma
1329; CHECK-NEXT:    vslideup.vi v25, v8, 4
1330; CHECK-NEXT:    vmv1r.v v0, v25
1331; CHECK-NEXT:    ret
1332  %elt.head = insertelement <64 x i32> poison, i32 %b, i32 0
1333  %vb = shufflevector <64 x i32> %elt.head, <64 x i32> poison, <64 x i32> zeroinitializer
1334  %v = call <64 x i1> @llvm.vp.icmp.v64i32(<64 x i32> %va, <64 x i32> %vb, metadata !"eq", <64 x i1> %m, i32 %evl)
1335  ret <64 x i1> %v
1336}
1337
1338define <64 x i1> @icmp_eq_vx_swap_v64i32(<64 x i32> %va, i32 %b, <64 x i1> %m, i32 zeroext %evl) {
1339; CHECK-LABEL: icmp_eq_vx_swap_v64i32:
1340; CHECK:       # %bb.0:
1341; CHECK-NEXT:    li a3, 32
1342; CHECK-NEXT:    vsetivli zero, 4, e8, mf2, ta, ma
1343; CHECK-NEXT:    vslidedown.vi v24, v0, 4
1344; CHECK-NEXT:    mv a2, a1
1345; CHECK-NEXT:    bltu a1, a3, .LBB101_2
1346; CHECK-NEXT:  # %bb.1:
1347; CHECK-NEXT:    li a2, 32
1348; CHECK-NEXT:  .LBB101_2:
1349; CHECK-NEXT:    vsetvli zero, a2, e32, m8, ta, ma
1350; CHECK-NEXT:    vmseq.vx v25, v8, a0, v0.t
1351; CHECK-NEXT:    addi a2, a1, -32
1352; CHECK-NEXT:    sltu a1, a1, a2
1353; CHECK-NEXT:    addi a1, a1, -1
1354; CHECK-NEXT:    and a1, a1, a2
1355; CHECK-NEXT:    vmv1r.v v0, v24
1356; CHECK-NEXT:    vsetvli zero, a1, e32, m8, ta, ma
1357; CHECK-NEXT:    vmseq.vx v8, v16, a0, v0.t
1358; CHECK-NEXT:    vsetivli zero, 8, e8, mf2, ta, ma
1359; CHECK-NEXT:    vslideup.vi v25, v8, 4
1360; CHECK-NEXT:    vmv1r.v v0, v25
1361; CHECK-NEXT:    ret
1362  %elt.head = insertelement <64 x i32> poison, i32 %b, i32 0
1363  %vb = shufflevector <64 x i32> %elt.head, <64 x i32> poison, <64 x i32> zeroinitializer
1364  %v = call <64 x i1> @llvm.vp.icmp.v64i32(<64 x i32> %vb, <64 x i32> %va, metadata !"eq", <64 x i1> %m, i32 %evl)
1365  ret <64 x i1> %v
1366}
1367
1368declare <8 x i1> @llvm.vp.icmp.v8i64(<8 x i64>, <8 x i64>, metadata, <8 x i1>, i32)
1369
1370define <8 x i1> @icmp_eq_vv_v8i64(<8 x i64> %va, <8 x i64> %vb, <8 x i1> %m, i32 zeroext %evl) {
1371; CHECK-LABEL: icmp_eq_vv_v8i64:
1372; CHECK:       # %bb.0:
1373; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
1374; CHECK-NEXT:    vmseq.vv v16, v8, v12, v0.t
1375; CHECK-NEXT:    vmv1r.v v0, v16
1376; CHECK-NEXT:    ret
1377  %v = call <8 x i1> @llvm.vp.icmp.v8i64(<8 x i64> %va, <8 x i64> %vb, metadata !"eq", <8 x i1> %m, i32 %evl)
1378  ret <8 x i1> %v
1379}
1380
1381define <8 x i1> @icmp_eq_vx_v8i64(<8 x i64> %va, i64 %b, <8 x i1> %m, i32 zeroext %evl) {
1382; RV32-LABEL: icmp_eq_vx_v8i64:
1383; RV32:       # %bb.0:
1384; RV32-NEXT:    addi sp, sp, -16
1385; RV32-NEXT:    .cfi_def_cfa_offset 16
1386; RV32-NEXT:    sw a0, 8(sp)
1387; RV32-NEXT:    sw a1, 12(sp)
1388; RV32-NEXT:    addi a0, sp, 8
1389; RV32-NEXT:    vsetivli zero, 8, e64, m4, ta, ma
1390; RV32-NEXT:    vlse64.v v16, (a0), zero
1391; RV32-NEXT:    vsetvli zero, a2, e64, m4, ta, ma
1392; RV32-NEXT:    vmseq.vv v12, v8, v16, v0.t
1393; RV32-NEXT:    vmv1r.v v0, v12
1394; RV32-NEXT:    addi sp, sp, 16
1395; RV32-NEXT:    .cfi_def_cfa_offset 0
1396; RV32-NEXT:    ret
1397;
1398; RV64-LABEL: icmp_eq_vx_v8i64:
1399; RV64:       # %bb.0:
1400; RV64-NEXT:    vsetvli zero, a1, e64, m4, ta, ma
1401; RV64-NEXT:    vmseq.vx v12, v8, a0, v0.t
1402; RV64-NEXT:    vmv1r.v v0, v12
1403; RV64-NEXT:    ret
1404  %elt.head = insertelement <8 x i64> poison, i64 %b, i32 0
1405  %vb = shufflevector <8 x i64> %elt.head, <8 x i64> poison, <8 x i32> zeroinitializer
1406  %v = call <8 x i1> @llvm.vp.icmp.v8i64(<8 x i64> %va, <8 x i64> %vb, metadata !"eq", <8 x i1> %m, i32 %evl)
1407  ret <8 x i1> %v
1408}
1409
1410define <8 x i1> @icmp_eq_vx_swap_v8i64(<8 x i64> %va, i64 %b, <8 x i1> %m, i32 zeroext %evl) {
1411; RV32-LABEL: icmp_eq_vx_swap_v8i64:
1412; RV32:       # %bb.0:
1413; RV32-NEXT:    addi sp, sp, -16
1414; RV32-NEXT:    .cfi_def_cfa_offset 16
1415; RV32-NEXT:    sw a0, 8(sp)
1416; RV32-NEXT:    sw a1, 12(sp)
1417; RV32-NEXT:    addi a0, sp, 8
1418; RV32-NEXT:    vsetivli zero, 8, e64, m4, ta, ma
1419; RV32-NEXT:    vlse64.v v16, (a0), zero
1420; RV32-NEXT:    vsetvli zero, a2, e64, m4, ta, ma
1421; RV32-NEXT:    vmseq.vv v12, v16, v8, v0.t
1422; RV32-NEXT:    vmv1r.v v0, v12
1423; RV32-NEXT:    addi sp, sp, 16
1424; RV32-NEXT:    .cfi_def_cfa_offset 0
1425; RV32-NEXT:    ret
1426;
1427; RV64-LABEL: icmp_eq_vx_swap_v8i64:
1428; RV64:       # %bb.0:
1429; RV64-NEXT:    vsetvli zero, a1, e64, m4, ta, ma
1430; RV64-NEXT:    vmseq.vx v12, v8, a0, v0.t
1431; RV64-NEXT:    vmv1r.v v0, v12
1432; RV64-NEXT:    ret
1433  %elt.head = insertelement <8 x i64> poison, i64 %b, i32 0
1434  %vb = shufflevector <8 x i64> %elt.head, <8 x i64> poison, <8 x i32> zeroinitializer
1435  %v = call <8 x i1> @llvm.vp.icmp.v8i64(<8 x i64> %vb, <8 x i64> %va, metadata !"eq", <8 x i1> %m, i32 %evl)
1436  ret <8 x i1> %v
1437}
1438
1439define <8 x i1> @icmp_eq_vi_v8i64(<8 x i64> %va, <8 x i1> %m, i32 zeroext %evl) {
1440; CHECK-LABEL: icmp_eq_vi_v8i64:
1441; CHECK:       # %bb.0:
1442; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
1443; CHECK-NEXT:    vmseq.vi v12, v8, 4, v0.t
1444; CHECK-NEXT:    vmv1r.v v0, v12
1445; CHECK-NEXT:    ret
1446  %v = call <8 x i1> @llvm.vp.icmp.v8i64(<8 x i64> %va, <8 x i64> splat (i64 4), metadata !"eq", <8 x i1> %m, i32 %evl)
1447  ret <8 x i1> %v
1448}
1449
1450define <8 x i1> @icmp_eq_vi_swap_v8i64(<8 x i64> %va, <8 x i1> %m, i32 zeroext %evl) {
1451; CHECK-LABEL: icmp_eq_vi_swap_v8i64:
1452; CHECK:       # %bb.0:
1453; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
1454; CHECK-NEXT:    vmseq.vi v12, v8, 4, v0.t
1455; CHECK-NEXT:    vmv1r.v v0, v12
1456; CHECK-NEXT:    ret
1457  %v = call <8 x i1> @llvm.vp.icmp.v8i64(<8 x i64> splat (i64 4), <8 x i64> %va, metadata !"eq", <8 x i1> %m, i32 %evl)
1458  ret <8 x i1> %v
1459}
1460
1461define <8 x i1> @icmp_ne_vv_v8i64(<8 x i64> %va, <8 x i64> %vb, <8 x i1> %m, i32 zeroext %evl) {
1462; CHECK-LABEL: icmp_ne_vv_v8i64:
1463; CHECK:       # %bb.0:
1464; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
1465; CHECK-NEXT:    vmsne.vv v16, v8, v12, v0.t
1466; CHECK-NEXT:    vmv1r.v v0, v16
1467; CHECK-NEXT:    ret
1468  %v = call <8 x i1> @llvm.vp.icmp.v8i64(<8 x i64> %va, <8 x i64> %vb, metadata !"ne", <8 x i1> %m, i32 %evl)
1469  ret <8 x i1> %v
1470}
1471
1472define <8 x i1> @icmp_ne_vx_v8i64(<8 x i64> %va, i64 %b, <8 x i1> %m, i32 zeroext %evl) {
1473; RV32-LABEL: icmp_ne_vx_v8i64:
1474; RV32:       # %bb.0:
1475; RV32-NEXT:    addi sp, sp, -16
1476; RV32-NEXT:    .cfi_def_cfa_offset 16
1477; RV32-NEXT:    sw a0, 8(sp)
1478; RV32-NEXT:    sw a1, 12(sp)
1479; RV32-NEXT:    addi a0, sp, 8
1480; RV32-NEXT:    vsetivli zero, 8, e64, m4, ta, ma
1481; RV32-NEXT:    vlse64.v v16, (a0), zero
1482; RV32-NEXT:    vsetvli zero, a2, e64, m4, ta, ma
1483; RV32-NEXT:    vmsne.vv v12, v8, v16, v0.t
1484; RV32-NEXT:    vmv1r.v v0, v12
1485; RV32-NEXT:    addi sp, sp, 16
1486; RV32-NEXT:    .cfi_def_cfa_offset 0
1487; RV32-NEXT:    ret
1488;
1489; RV64-LABEL: icmp_ne_vx_v8i64:
1490; RV64:       # %bb.0:
1491; RV64-NEXT:    vsetvli zero, a1, e64, m4, ta, ma
1492; RV64-NEXT:    vmsne.vx v12, v8, a0, v0.t
1493; RV64-NEXT:    vmv1r.v v0, v12
1494; RV64-NEXT:    ret
1495  %elt.head = insertelement <8 x i64> poison, i64 %b, i32 0
1496  %vb = shufflevector <8 x i64> %elt.head, <8 x i64> poison, <8 x i32> zeroinitializer
1497  %v = call <8 x i1> @llvm.vp.icmp.v8i64(<8 x i64> %va, <8 x i64> %vb, metadata !"ne", <8 x i1> %m, i32 %evl)
1498  ret <8 x i1> %v
1499}
1500
1501define <8 x i1> @icmp_ne_vx_swap_v8i64(<8 x i64> %va, i64 %b, <8 x i1> %m, i32 zeroext %evl) {
1502; RV32-LABEL: icmp_ne_vx_swap_v8i64:
1503; RV32:       # %bb.0:
1504; RV32-NEXT:    addi sp, sp, -16
1505; RV32-NEXT:    .cfi_def_cfa_offset 16
1506; RV32-NEXT:    sw a0, 8(sp)
1507; RV32-NEXT:    sw a1, 12(sp)
1508; RV32-NEXT:    addi a0, sp, 8
1509; RV32-NEXT:    vsetivli zero, 8, e64, m4, ta, ma
1510; RV32-NEXT:    vlse64.v v16, (a0), zero
1511; RV32-NEXT:    vsetvli zero, a2, e64, m4, ta, ma
1512; RV32-NEXT:    vmsne.vv v12, v16, v8, v0.t
1513; RV32-NEXT:    vmv1r.v v0, v12
1514; RV32-NEXT:    addi sp, sp, 16
1515; RV32-NEXT:    .cfi_def_cfa_offset 0
1516; RV32-NEXT:    ret
1517;
1518; RV64-LABEL: icmp_ne_vx_swap_v8i64:
1519; RV64:       # %bb.0:
1520; RV64-NEXT:    vsetvli zero, a1, e64, m4, ta, ma
1521; RV64-NEXT:    vmsne.vx v12, v8, a0, v0.t
1522; RV64-NEXT:    vmv1r.v v0, v12
1523; RV64-NEXT:    ret
1524  %elt.head = insertelement <8 x i64> poison, i64 %b, i32 0
1525  %vb = shufflevector <8 x i64> %elt.head, <8 x i64> poison, <8 x i32> zeroinitializer
1526  %v = call <8 x i1> @llvm.vp.icmp.v8i64(<8 x i64> %vb, <8 x i64> %va, metadata !"ne", <8 x i1> %m, i32 %evl)
1527  ret <8 x i1> %v
1528}
1529
1530define <8 x i1> @icmp_ne_vi_v8i64(<8 x i64> %va, <8 x i1> %m, i32 zeroext %evl) {
1531; CHECK-LABEL: icmp_ne_vi_v8i64:
1532; CHECK:       # %bb.0:
1533; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
1534; CHECK-NEXT:    vmsne.vi v12, v8, 4, v0.t
1535; CHECK-NEXT:    vmv1r.v v0, v12
1536; CHECK-NEXT:    ret
1537  %v = call <8 x i1> @llvm.vp.icmp.v8i64(<8 x i64> %va, <8 x i64> splat (i64 4), metadata !"ne", <8 x i1> %m, i32 %evl)
1538  ret <8 x i1> %v
1539}
1540
1541define <8 x i1> @icmp_ne_vi_swap_v8i64(<8 x i64> %va, <8 x i1> %m, i32 zeroext %evl) {
1542; CHECK-LABEL: icmp_ne_vi_swap_v8i64:
1543; CHECK:       # %bb.0:
1544; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
1545; CHECK-NEXT:    vmsne.vi v12, v8, 4, v0.t
1546; CHECK-NEXT:    vmv1r.v v0, v12
1547; CHECK-NEXT:    ret
1548  %v = call <8 x i1> @llvm.vp.icmp.v8i64(<8 x i64> splat (i64 4), <8 x i64> %va, metadata !"ne", <8 x i1> %m, i32 %evl)
1549  ret <8 x i1> %v
1550}
1551
1552define <8 x i1> @icmp_ugt_vv_v8i64(<8 x i64> %va, <8 x i64> %vb, <8 x i1> %m, i32 zeroext %evl) {
1553; CHECK-LABEL: icmp_ugt_vv_v8i64:
1554; CHECK:       # %bb.0:
1555; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
1556; CHECK-NEXT:    vmsltu.vv v16, v12, v8, v0.t
1557; CHECK-NEXT:    vmv1r.v v0, v16
1558; CHECK-NEXT:    ret
1559  %v = call <8 x i1> @llvm.vp.icmp.v8i64(<8 x i64> %va, <8 x i64> %vb, metadata !"ugt", <8 x i1> %m, i32 %evl)
1560  ret <8 x i1> %v
1561}
1562
1563define <8 x i1> @icmp_ugt_vx_v8i64(<8 x i64> %va, i64 %b, <8 x i1> %m, i32 zeroext %evl) {
1564; RV32-LABEL: icmp_ugt_vx_v8i64:
1565; RV32:       # %bb.0:
1566; RV32-NEXT:    addi sp, sp, -16
1567; RV32-NEXT:    .cfi_def_cfa_offset 16
1568; RV32-NEXT:    sw a0, 8(sp)
1569; RV32-NEXT:    sw a1, 12(sp)
1570; RV32-NEXT:    addi a0, sp, 8
1571; RV32-NEXT:    vsetivli zero, 8, e64, m4, ta, ma
1572; RV32-NEXT:    vlse64.v v16, (a0), zero
1573; RV32-NEXT:    vsetvli zero, a2, e64, m4, ta, ma
1574; RV32-NEXT:    vmsltu.vv v12, v16, v8, v0.t
1575; RV32-NEXT:    vmv1r.v v0, v12
1576; RV32-NEXT:    addi sp, sp, 16
1577; RV32-NEXT:    .cfi_def_cfa_offset 0
1578; RV32-NEXT:    ret
1579;
1580; RV64-LABEL: icmp_ugt_vx_v8i64:
1581; RV64:       # %bb.0:
1582; RV64-NEXT:    vsetvli zero, a1, e64, m4, ta, ma
1583; RV64-NEXT:    vmsgtu.vx v12, v8, a0, v0.t
1584; RV64-NEXT:    vmv1r.v v0, v12
1585; RV64-NEXT:    ret
1586  %elt.head = insertelement <8 x i64> poison, i64 %b, i32 0
1587  %vb = shufflevector <8 x i64> %elt.head, <8 x i64> poison, <8 x i32> zeroinitializer
1588  %v = call <8 x i1> @llvm.vp.icmp.v8i64(<8 x i64> %va, <8 x i64> %vb, metadata !"ugt", <8 x i1> %m, i32 %evl)
1589  ret <8 x i1> %v
1590}
1591
1592define <8 x i1> @icmp_ugt_vx_swap_v8i64(<8 x i64> %va, i64 %b, <8 x i1> %m, i32 zeroext %evl) {
1593; RV32-LABEL: icmp_ugt_vx_swap_v8i64:
1594; RV32:       # %bb.0:
1595; RV32-NEXT:    addi sp, sp, -16
1596; RV32-NEXT:    .cfi_def_cfa_offset 16
1597; RV32-NEXT:    sw a0, 8(sp)
1598; RV32-NEXT:    sw a1, 12(sp)
1599; RV32-NEXT:    addi a0, sp, 8
1600; RV32-NEXT:    vsetivli zero, 8, e64, m4, ta, ma
1601; RV32-NEXT:    vlse64.v v16, (a0), zero
1602; RV32-NEXT:    vsetvli zero, a2, e64, m4, ta, ma
1603; RV32-NEXT:    vmsltu.vv v12, v8, v16, v0.t
1604; RV32-NEXT:    vmv1r.v v0, v12
1605; RV32-NEXT:    addi sp, sp, 16
1606; RV32-NEXT:    .cfi_def_cfa_offset 0
1607; RV32-NEXT:    ret
1608;
1609; RV64-LABEL: icmp_ugt_vx_swap_v8i64:
1610; RV64:       # %bb.0:
1611; RV64-NEXT:    vsetvli zero, a1, e64, m4, ta, ma
1612; RV64-NEXT:    vmsltu.vx v12, v8, a0, v0.t
1613; RV64-NEXT:    vmv1r.v v0, v12
1614; RV64-NEXT:    ret
1615  %elt.head = insertelement <8 x i64> poison, i64 %b, i32 0
1616  %vb = shufflevector <8 x i64> %elt.head, <8 x i64> poison, <8 x i32> zeroinitializer
1617  %v = call <8 x i1> @llvm.vp.icmp.v8i64(<8 x i64> %vb, <8 x i64> %va, metadata !"ugt", <8 x i1> %m, i32 %evl)
1618  ret <8 x i1> %v
1619}
1620
1621define <8 x i1> @icmp_ugt_vi_v8i64(<8 x i64> %va, <8 x i1> %m, i32 zeroext %evl) {
1622; CHECK-LABEL: icmp_ugt_vi_v8i64:
1623; CHECK:       # %bb.0:
1624; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
1625; CHECK-NEXT:    vmsgtu.vi v12, v8, 4, v0.t
1626; CHECK-NEXT:    vmv1r.v v0, v12
1627; CHECK-NEXT:    ret
1628  %v = call <8 x i1> @llvm.vp.icmp.v8i64(<8 x i64> %va, <8 x i64> splat (i64 4), metadata !"ugt", <8 x i1> %m, i32 %evl)
1629  ret <8 x i1> %v
1630}
1631
1632define <8 x i1> @icmp_ugt_vi_swap_v8i64(<8 x i64> %va, <8 x i1> %m, i32 zeroext %evl) {
1633; CHECK-LABEL: icmp_ugt_vi_swap_v8i64:
1634; CHECK:       # %bb.0:
1635; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
1636; CHECK-NEXT:    vmsleu.vi v12, v8, 3, v0.t
1637; CHECK-NEXT:    vmv1r.v v0, v12
1638; CHECK-NEXT:    ret
1639  %v = call <8 x i1> @llvm.vp.icmp.v8i64(<8 x i64> splat (i64 4), <8 x i64> %va, metadata !"ugt", <8 x i1> %m, i32 %evl)
1640  ret <8 x i1> %v
1641}
1642
1643define <8 x i1> @icmp_uge_vv_v8i64(<8 x i64> %va, <8 x i64> %vb, <8 x i1> %m, i32 zeroext %evl) {
1644; CHECK-LABEL: icmp_uge_vv_v8i64:
1645; CHECK:       # %bb.0:
1646; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
1647; CHECK-NEXT:    vmsleu.vv v16, v12, v8, v0.t
1648; CHECK-NEXT:    vmv1r.v v0, v16
1649; CHECK-NEXT:    ret
1650  %v = call <8 x i1> @llvm.vp.icmp.v8i64(<8 x i64> %va, <8 x i64> %vb, metadata !"uge", <8 x i1> %m, i32 %evl)
1651  ret <8 x i1> %v
1652}
1653
1654define <8 x i1> @icmp_uge_vx_v8i64(<8 x i64> %va, i64 %b, <8 x i1> %m, i32 zeroext %evl) {
1655; RV32-LABEL: icmp_uge_vx_v8i64:
1656; RV32:       # %bb.0:
1657; RV32-NEXT:    addi sp, sp, -16
1658; RV32-NEXT:    .cfi_def_cfa_offset 16
1659; RV32-NEXT:    sw a0, 8(sp)
1660; RV32-NEXT:    sw a1, 12(sp)
1661; RV32-NEXT:    addi a0, sp, 8
1662; RV32-NEXT:    vsetivli zero, 8, e64, m4, ta, ma
1663; RV32-NEXT:    vlse64.v v16, (a0), zero
1664; RV32-NEXT:    vsetvli zero, a2, e64, m4, ta, ma
1665; RV32-NEXT:    vmsleu.vv v12, v16, v8, v0.t
1666; RV32-NEXT:    vmv1r.v v0, v12
1667; RV32-NEXT:    addi sp, sp, 16
1668; RV32-NEXT:    .cfi_def_cfa_offset 0
1669; RV32-NEXT:    ret
1670;
1671; RV64-LABEL: icmp_uge_vx_v8i64:
1672; RV64:       # %bb.0:
1673; RV64-NEXT:    vsetivli zero, 8, e64, m4, ta, ma
1674; RV64-NEXT:    vmv.v.x v16, a0
1675; RV64-NEXT:    vsetvli zero, a1, e64, m4, ta, ma
1676; RV64-NEXT:    vmsleu.vv v12, v16, v8, v0.t
1677; RV64-NEXT:    vmv1r.v v0, v12
1678; RV64-NEXT:    ret
1679  %elt.head = insertelement <8 x i64> poison, i64 %b, i32 0
1680  %vb = shufflevector <8 x i64> %elt.head, <8 x i64> poison, <8 x i32> zeroinitializer
1681  %v = call <8 x i1> @llvm.vp.icmp.v8i64(<8 x i64> %va, <8 x i64> %vb, metadata !"uge", <8 x i1> %m, i32 %evl)
1682  ret <8 x i1> %v
1683}
1684
1685define <8 x i1> @icmp_uge_vx_swap_v8i64(<8 x i64> %va, i64 %b, <8 x i1> %m, i32 zeroext %evl) {
1686; RV32-LABEL: icmp_uge_vx_swap_v8i64:
1687; RV32:       # %bb.0:
1688; RV32-NEXT:    addi sp, sp, -16
1689; RV32-NEXT:    .cfi_def_cfa_offset 16
1690; RV32-NEXT:    sw a0, 8(sp)
1691; RV32-NEXT:    sw a1, 12(sp)
1692; RV32-NEXT:    addi a0, sp, 8
1693; RV32-NEXT:    vsetivli zero, 8, e64, m4, ta, ma
1694; RV32-NEXT:    vlse64.v v16, (a0), zero
1695; RV32-NEXT:    vsetvli zero, a2, e64, m4, ta, ma
1696; RV32-NEXT:    vmsleu.vv v12, v8, v16, v0.t
1697; RV32-NEXT:    vmv1r.v v0, v12
1698; RV32-NEXT:    addi sp, sp, 16
1699; RV32-NEXT:    .cfi_def_cfa_offset 0
1700; RV32-NEXT:    ret
1701;
1702; RV64-LABEL: icmp_uge_vx_swap_v8i64:
1703; RV64:       # %bb.0:
1704; RV64-NEXT:    vsetvli zero, a1, e64, m4, ta, ma
1705; RV64-NEXT:    vmsleu.vx v12, v8, a0, v0.t
1706; RV64-NEXT:    vmv1r.v v0, v12
1707; RV64-NEXT:    ret
1708  %elt.head = insertelement <8 x i64> poison, i64 %b, i32 0
1709  %vb = shufflevector <8 x i64> %elt.head, <8 x i64> poison, <8 x i32> zeroinitializer
1710  %v = call <8 x i1> @llvm.vp.icmp.v8i64(<8 x i64> %vb, <8 x i64> %va, metadata !"uge", <8 x i1> %m, i32 %evl)
1711  ret <8 x i1> %v
1712}
1713
1714define <8 x i1> @icmp_uge_vi_v8i64(<8 x i64> %va, <8 x i1> %m, i32 zeroext %evl) {
1715; CHECK-LABEL: icmp_uge_vi_v8i64:
1716; CHECK:       # %bb.0:
1717; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
1718; CHECK-NEXT:    vmsgtu.vi v12, v8, 3, v0.t
1719; CHECK-NEXT:    vmv1r.v v0, v12
1720; CHECK-NEXT:    ret
1721  %v = call <8 x i1> @llvm.vp.icmp.v8i64(<8 x i64> %va, <8 x i64> splat (i64 4), metadata !"uge", <8 x i1> %m, i32 %evl)
1722  ret <8 x i1> %v
1723}
1724
1725define <8 x i1> @icmp_uge_vi_swap_v8i64(<8 x i64> %va, <8 x i1> %m, i32 zeroext %evl) {
1726; CHECK-LABEL: icmp_uge_vi_swap_v8i64:
1727; CHECK:       # %bb.0:
1728; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
1729; CHECK-NEXT:    vmsleu.vi v12, v8, 4, v0.t
1730; CHECK-NEXT:    vmv1r.v v0, v12
1731; CHECK-NEXT:    ret
1732  %v = call <8 x i1> @llvm.vp.icmp.v8i64(<8 x i64> splat (i64 4), <8 x i64> %va, metadata !"uge", <8 x i1> %m, i32 %evl)
1733  ret <8 x i1> %v
1734}
1735
1736define <8 x i1> @icmp_ult_vv_v8i64(<8 x i64> %va, <8 x i64> %vb, <8 x i1> %m, i32 zeroext %evl) {
1737; CHECK-LABEL: icmp_ult_vv_v8i64:
1738; CHECK:       # %bb.0:
1739; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
1740; CHECK-NEXT:    vmsltu.vv v16, v8, v12, v0.t
1741; CHECK-NEXT:    vmv1r.v v0, v16
1742; CHECK-NEXT:    ret
1743  %v = call <8 x i1> @llvm.vp.icmp.v8i64(<8 x i64> %va, <8 x i64> %vb, metadata !"ult", <8 x i1> %m, i32 %evl)
1744  ret <8 x i1> %v
1745}
1746
1747define <8 x i1> @icmp_ult_vx_v8i64(<8 x i64> %va, i64 %b, <8 x i1> %m, i32 zeroext %evl) {
1748; RV32-LABEL: icmp_ult_vx_v8i64:
1749; RV32:       # %bb.0:
1750; RV32-NEXT:    addi sp, sp, -16
1751; RV32-NEXT:    .cfi_def_cfa_offset 16
1752; RV32-NEXT:    sw a0, 8(sp)
1753; RV32-NEXT:    sw a1, 12(sp)
1754; RV32-NEXT:    addi a0, sp, 8
1755; RV32-NEXT:    vsetivli zero, 8, e64, m4, ta, ma
1756; RV32-NEXT:    vlse64.v v16, (a0), zero
1757; RV32-NEXT:    vsetvli zero, a2, e64, m4, ta, ma
1758; RV32-NEXT:    vmsltu.vv v12, v8, v16, v0.t
1759; RV32-NEXT:    vmv1r.v v0, v12
1760; RV32-NEXT:    addi sp, sp, 16
1761; RV32-NEXT:    .cfi_def_cfa_offset 0
1762; RV32-NEXT:    ret
1763;
1764; RV64-LABEL: icmp_ult_vx_v8i64:
1765; RV64:       # %bb.0:
1766; RV64-NEXT:    vsetvli zero, a1, e64, m4, ta, ma
1767; RV64-NEXT:    vmsltu.vx v12, v8, a0, v0.t
1768; RV64-NEXT:    vmv1r.v v0, v12
1769; RV64-NEXT:    ret
1770  %elt.head = insertelement <8 x i64> poison, i64 %b, i32 0
1771  %vb = shufflevector <8 x i64> %elt.head, <8 x i64> poison, <8 x i32> zeroinitializer
1772  %v = call <8 x i1> @llvm.vp.icmp.v8i64(<8 x i64> %va, <8 x i64> %vb, metadata !"ult", <8 x i1> %m, i32 %evl)
1773  ret <8 x i1> %v
1774}
1775
1776define <8 x i1> @icmp_ult_vx_swap_v8i64(<8 x i64> %va, i64 %b, <8 x i1> %m, i32 zeroext %evl) {
1777; RV32-LABEL: icmp_ult_vx_swap_v8i64:
1778; RV32:       # %bb.0:
1779; RV32-NEXT:    addi sp, sp, -16
1780; RV32-NEXT:    .cfi_def_cfa_offset 16
1781; RV32-NEXT:    sw a0, 8(sp)
1782; RV32-NEXT:    sw a1, 12(sp)
1783; RV32-NEXT:    addi a0, sp, 8
1784; RV32-NEXT:    vsetivli zero, 8, e64, m4, ta, ma
1785; RV32-NEXT:    vlse64.v v16, (a0), zero
1786; RV32-NEXT:    vsetvli zero, a2, e64, m4, ta, ma
1787; RV32-NEXT:    vmsltu.vv v12, v16, v8, v0.t
1788; RV32-NEXT:    vmv1r.v v0, v12
1789; RV32-NEXT:    addi sp, sp, 16
1790; RV32-NEXT:    .cfi_def_cfa_offset 0
1791; RV32-NEXT:    ret
1792;
1793; RV64-LABEL: icmp_ult_vx_swap_v8i64:
1794; RV64:       # %bb.0:
1795; RV64-NEXT:    vsetvli zero, a1, e64, m4, ta, ma
1796; RV64-NEXT:    vmsgtu.vx v12, v8, a0, v0.t
1797; RV64-NEXT:    vmv1r.v v0, v12
1798; RV64-NEXT:    ret
1799  %elt.head = insertelement <8 x i64> poison, i64 %b, i32 0
1800  %vb = shufflevector <8 x i64> %elt.head, <8 x i64> poison, <8 x i32> zeroinitializer
1801  %v = call <8 x i1> @llvm.vp.icmp.v8i64(<8 x i64> %vb, <8 x i64> %va, metadata !"ult", <8 x i1> %m, i32 %evl)
1802  ret <8 x i1> %v
1803}
1804
1805define <8 x i1> @icmp_ult_vi_v8i64(<8 x i64> %va, <8 x i1> %m, i32 zeroext %evl) {
1806; CHECK-LABEL: icmp_ult_vi_v8i64:
1807; CHECK:       # %bb.0:
1808; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
1809; CHECK-NEXT:    vmsleu.vi v12, v8, 3, v0.t
1810; CHECK-NEXT:    vmv1r.v v0, v12
1811; CHECK-NEXT:    ret
1812  %v = call <8 x i1> @llvm.vp.icmp.v8i64(<8 x i64> %va, <8 x i64> splat (i64 4), metadata !"ult", <8 x i1> %m, i32 %evl)
1813  ret <8 x i1> %v
1814}
1815
1816define <8 x i1> @icmp_ult_vi_swap_v8i64(<8 x i64> %va, <8 x i1> %m, i32 zeroext %evl) {
1817; CHECK-LABEL: icmp_ult_vi_swap_v8i64:
1818; CHECK:       # %bb.0:
1819; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
1820; CHECK-NEXT:    vmsgtu.vi v12, v8, 4, v0.t
1821; CHECK-NEXT:    vmv1r.v v0, v12
1822; CHECK-NEXT:    ret
1823  %v = call <8 x i1> @llvm.vp.icmp.v8i64(<8 x i64> splat (i64 4), <8 x i64> %va, metadata !"ult", <8 x i1> %m, i32 %evl)
1824  ret <8 x i1> %v
1825}
1826
1827define <8 x i1> @icmp_sgt_vv_v8i64(<8 x i64> %va, <8 x i64> %vb, <8 x i1> %m, i32 zeroext %evl) {
1828; CHECK-LABEL: icmp_sgt_vv_v8i64:
1829; CHECK:       # %bb.0:
1830; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
1831; CHECK-NEXT:    vmslt.vv v16, v12, v8, v0.t
1832; CHECK-NEXT:    vmv1r.v v0, v16
1833; CHECK-NEXT:    ret
1834  %v = call <8 x i1> @llvm.vp.icmp.v8i64(<8 x i64> %va, <8 x i64> %vb, metadata !"sgt", <8 x i1> %m, i32 %evl)
1835  ret <8 x i1> %v
1836}
1837
1838define <8 x i1> @icmp_sgt_vx_v8i64(<8 x i64> %va, i64 %b, <8 x i1> %m, i32 zeroext %evl) {
1839; RV32-LABEL: icmp_sgt_vx_v8i64:
1840; RV32:       # %bb.0:
1841; RV32-NEXT:    addi sp, sp, -16
1842; RV32-NEXT:    .cfi_def_cfa_offset 16
1843; RV32-NEXT:    sw a0, 8(sp)
1844; RV32-NEXT:    sw a1, 12(sp)
1845; RV32-NEXT:    addi a0, sp, 8
1846; RV32-NEXT:    vsetivli zero, 8, e64, m4, ta, ma
1847; RV32-NEXT:    vlse64.v v16, (a0), zero
1848; RV32-NEXT:    vsetvli zero, a2, e64, m4, ta, ma
1849; RV32-NEXT:    vmslt.vv v12, v16, v8, v0.t
1850; RV32-NEXT:    vmv1r.v v0, v12
1851; RV32-NEXT:    addi sp, sp, 16
1852; RV32-NEXT:    .cfi_def_cfa_offset 0
1853; RV32-NEXT:    ret
1854;
1855; RV64-LABEL: icmp_sgt_vx_v8i64:
1856; RV64:       # %bb.0:
1857; RV64-NEXT:    vsetvli zero, a1, e64, m4, ta, ma
1858; RV64-NEXT:    vmsgt.vx v12, v8, a0, v0.t
1859; RV64-NEXT:    vmv1r.v v0, v12
1860; RV64-NEXT:    ret
1861  %elt.head = insertelement <8 x i64> poison, i64 %b, i32 0
1862  %vb = shufflevector <8 x i64> %elt.head, <8 x i64> poison, <8 x i32> zeroinitializer
1863  %v = call <8 x i1> @llvm.vp.icmp.v8i64(<8 x i64> %va, <8 x i64> %vb, metadata !"sgt", <8 x i1> %m, i32 %evl)
1864  ret <8 x i1> %v
1865}
1866
1867define <8 x i1> @icmp_sgt_vx_swap_v8i64(<8 x i64> %va, i64 %b, <8 x i1> %m, i32 zeroext %evl) {
1868; RV32-LABEL: icmp_sgt_vx_swap_v8i64:
1869; RV32:       # %bb.0:
1870; RV32-NEXT:    addi sp, sp, -16
1871; RV32-NEXT:    .cfi_def_cfa_offset 16
1872; RV32-NEXT:    sw a0, 8(sp)
1873; RV32-NEXT:    sw a1, 12(sp)
1874; RV32-NEXT:    addi a0, sp, 8
1875; RV32-NEXT:    vsetivli zero, 8, e64, m4, ta, ma
1876; RV32-NEXT:    vlse64.v v16, (a0), zero
1877; RV32-NEXT:    vsetvli zero, a2, e64, m4, ta, ma
1878; RV32-NEXT:    vmslt.vv v12, v8, v16, v0.t
1879; RV32-NEXT:    vmv1r.v v0, v12
1880; RV32-NEXT:    addi sp, sp, 16
1881; RV32-NEXT:    .cfi_def_cfa_offset 0
1882; RV32-NEXT:    ret
1883;
1884; RV64-LABEL: icmp_sgt_vx_swap_v8i64:
1885; RV64:       # %bb.0:
1886; RV64-NEXT:    vsetvli zero, a1, e64, m4, ta, ma
1887; RV64-NEXT:    vmslt.vx v12, v8, a0, v0.t
1888; RV64-NEXT:    vmv1r.v v0, v12
1889; RV64-NEXT:    ret
1890  %elt.head = insertelement <8 x i64> poison, i64 %b, i32 0
1891  %vb = shufflevector <8 x i64> %elt.head, <8 x i64> poison, <8 x i32> zeroinitializer
1892  %v = call <8 x i1> @llvm.vp.icmp.v8i64(<8 x i64> %vb, <8 x i64> %va, metadata !"sgt", <8 x i1> %m, i32 %evl)
1893  ret <8 x i1> %v
1894}
1895
1896define <8 x i1> @icmp_sgt_vi_v8i64(<8 x i64> %va, <8 x i1> %m, i32 zeroext %evl) {
1897; CHECK-LABEL: icmp_sgt_vi_v8i64:
1898; CHECK:       # %bb.0:
1899; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
1900; CHECK-NEXT:    vmsgt.vi v12, v8, 4, v0.t
1901; CHECK-NEXT:    vmv1r.v v0, v12
1902; CHECK-NEXT:    ret
1903  %v = call <8 x i1> @llvm.vp.icmp.v8i64(<8 x i64> %va, <8 x i64> splat (i64 4), metadata !"sgt", <8 x i1> %m, i32 %evl)
1904  ret <8 x i1> %v
1905}
1906
1907define <8 x i1> @icmp_sgt_vi_swap_v8i64(<8 x i64> %va, <8 x i1> %m, i32 zeroext %evl) {
1908; CHECK-LABEL: icmp_sgt_vi_swap_v8i64:
1909; CHECK:       # %bb.0:
1910; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
1911; CHECK-NEXT:    vmsle.vi v12, v8, 3, v0.t
1912; CHECK-NEXT:    vmv1r.v v0, v12
1913; CHECK-NEXT:    ret
1914  %v = call <8 x i1> @llvm.vp.icmp.v8i64(<8 x i64> splat (i64 4), <8 x i64> %va, metadata !"sgt", <8 x i1> %m, i32 %evl)
1915  ret <8 x i1> %v
1916}
1917
1918define <8 x i1> @icmp_sge_vv_v8i64(<8 x i64> %va, <8 x i64> %vb, <8 x i1> %m, i32 zeroext %evl) {
1919; CHECK-LABEL: icmp_sge_vv_v8i64:
1920; CHECK:       # %bb.0:
1921; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
1922; CHECK-NEXT:    vmsle.vv v16, v12, v8, v0.t
1923; CHECK-NEXT:    vmv1r.v v0, v16
1924; CHECK-NEXT:    ret
1925  %v = call <8 x i1> @llvm.vp.icmp.v8i64(<8 x i64> %va, <8 x i64> %vb, metadata !"sge", <8 x i1> %m, i32 %evl)
1926  ret <8 x i1> %v
1927}
1928
1929define <8 x i1> @icmp_sge_vx_v8i64(<8 x i64> %va, i64 %b, <8 x i1> %m, i32 zeroext %evl) {
1930; RV32-LABEL: icmp_sge_vx_v8i64:
1931; RV32:       # %bb.0:
1932; RV32-NEXT:    addi sp, sp, -16
1933; RV32-NEXT:    .cfi_def_cfa_offset 16
1934; RV32-NEXT:    sw a0, 8(sp)
1935; RV32-NEXT:    sw a1, 12(sp)
1936; RV32-NEXT:    addi a0, sp, 8
1937; RV32-NEXT:    vsetivli zero, 8, e64, m4, ta, ma
1938; RV32-NEXT:    vlse64.v v16, (a0), zero
1939; RV32-NEXT:    vsetvli zero, a2, e64, m4, ta, ma
1940; RV32-NEXT:    vmsle.vv v12, v16, v8, v0.t
1941; RV32-NEXT:    vmv1r.v v0, v12
1942; RV32-NEXT:    addi sp, sp, 16
1943; RV32-NEXT:    .cfi_def_cfa_offset 0
1944; RV32-NEXT:    ret
1945;
1946; RV64-LABEL: icmp_sge_vx_v8i64:
1947; RV64:       # %bb.0:
1948; RV64-NEXT:    vsetivli zero, 8, e64, m4, ta, ma
1949; RV64-NEXT:    vmv.v.x v16, a0
1950; RV64-NEXT:    vsetvli zero, a1, e64, m4, ta, ma
1951; RV64-NEXT:    vmsle.vv v12, v16, v8, v0.t
1952; RV64-NEXT:    vmv1r.v v0, v12
1953; RV64-NEXT:    ret
1954  %elt.head = insertelement <8 x i64> poison, i64 %b, i32 0
1955  %vb = shufflevector <8 x i64> %elt.head, <8 x i64> poison, <8 x i32> zeroinitializer
1956  %v = call <8 x i1> @llvm.vp.icmp.v8i64(<8 x i64> %va, <8 x i64> %vb, metadata !"sge", <8 x i1> %m, i32 %evl)
1957  ret <8 x i1> %v
1958}
1959
1960define <8 x i1> @icmp_sge_vx_swap_v8i64(<8 x i64> %va, i64 %b, <8 x i1> %m, i32 zeroext %evl) {
1961; RV32-LABEL: icmp_sge_vx_swap_v8i64:
1962; RV32:       # %bb.0:
1963; RV32-NEXT:    addi sp, sp, -16
1964; RV32-NEXT:    .cfi_def_cfa_offset 16
1965; RV32-NEXT:    sw a0, 8(sp)
1966; RV32-NEXT:    sw a1, 12(sp)
1967; RV32-NEXT:    addi a0, sp, 8
1968; RV32-NEXT:    vsetivli zero, 8, e64, m4, ta, ma
1969; RV32-NEXT:    vlse64.v v16, (a0), zero
1970; RV32-NEXT:    vsetvli zero, a2, e64, m4, ta, ma
1971; RV32-NEXT:    vmsle.vv v12, v8, v16, v0.t
1972; RV32-NEXT:    vmv1r.v v0, v12
1973; RV32-NEXT:    addi sp, sp, 16
1974; RV32-NEXT:    .cfi_def_cfa_offset 0
1975; RV32-NEXT:    ret
1976;
1977; RV64-LABEL: icmp_sge_vx_swap_v8i64:
1978; RV64:       # %bb.0:
1979; RV64-NEXT:    vsetvli zero, a1, e64, m4, ta, ma
1980; RV64-NEXT:    vmsle.vx v12, v8, a0, v0.t
1981; RV64-NEXT:    vmv1r.v v0, v12
1982; RV64-NEXT:    ret
1983  %elt.head = insertelement <8 x i64> poison, i64 %b, i32 0
1984  %vb = shufflevector <8 x i64> %elt.head, <8 x i64> poison, <8 x i32> zeroinitializer
1985  %v = call <8 x i1> @llvm.vp.icmp.v8i64(<8 x i64> %vb, <8 x i64> %va, metadata !"sge", <8 x i1> %m, i32 %evl)
1986  ret <8 x i1> %v
1987}
1988
1989define <8 x i1> @icmp_sge_vi_v8i64(<8 x i64> %va, <8 x i1> %m, i32 zeroext %evl) {
1990; CHECK-LABEL: icmp_sge_vi_v8i64:
1991; CHECK:       # %bb.0:
1992; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
1993; CHECK-NEXT:    vmsgt.vi v12, v8, 3, v0.t
1994; CHECK-NEXT:    vmv1r.v v0, v12
1995; CHECK-NEXT:    ret
1996  %v = call <8 x i1> @llvm.vp.icmp.v8i64(<8 x i64> %va, <8 x i64> splat (i64 4), metadata !"sge", <8 x i1> %m, i32 %evl)
1997  ret <8 x i1> %v
1998}
1999
2000define <8 x i1> @icmp_sge_vi_swap_v8i64(<8 x i64> %va, <8 x i1> %m, i32 zeroext %evl) {
2001; CHECK-LABEL: icmp_sge_vi_swap_v8i64:
2002; CHECK:       # %bb.0:
2003; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
2004; CHECK-NEXT:    vmsle.vi v12, v8, 4, v0.t
2005; CHECK-NEXT:    vmv1r.v v0, v12
2006; CHECK-NEXT:    ret
2007  %v = call <8 x i1> @llvm.vp.icmp.v8i64(<8 x i64> splat (i64 4), <8 x i64> %va, metadata !"sge", <8 x i1> %m, i32 %evl)
2008  ret <8 x i1> %v
2009}
2010
2011define <8 x i1> @icmp_slt_vv_v8i64(<8 x i64> %va, <8 x i64> %vb, <8 x i1> %m, i32 zeroext %evl) {
2012; CHECK-LABEL: icmp_slt_vv_v8i64:
2013; CHECK:       # %bb.0:
2014; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
2015; CHECK-NEXT:    vmslt.vv v16, v8, v12, v0.t
2016; CHECK-NEXT:    vmv1r.v v0, v16
2017; CHECK-NEXT:    ret
2018  %v = call <8 x i1> @llvm.vp.icmp.v8i64(<8 x i64> %va, <8 x i64> %vb, metadata !"slt", <8 x i1> %m, i32 %evl)
2019  ret <8 x i1> %v
2020}
2021
2022define <8 x i1> @icmp_slt_vx_v8i64(<8 x i64> %va, i64 %b, <8 x i1> %m, i32 zeroext %evl) {
2023; RV32-LABEL: icmp_slt_vx_v8i64:
2024; RV32:       # %bb.0:
2025; RV32-NEXT:    addi sp, sp, -16
2026; RV32-NEXT:    .cfi_def_cfa_offset 16
2027; RV32-NEXT:    sw a0, 8(sp)
2028; RV32-NEXT:    sw a1, 12(sp)
2029; RV32-NEXT:    addi a0, sp, 8
2030; RV32-NEXT:    vsetivli zero, 8, e64, m4, ta, ma
2031; RV32-NEXT:    vlse64.v v16, (a0), zero
2032; RV32-NEXT:    vsetvli zero, a2, e64, m4, ta, ma
2033; RV32-NEXT:    vmslt.vv v12, v8, v16, v0.t
2034; RV32-NEXT:    vmv1r.v v0, v12
2035; RV32-NEXT:    addi sp, sp, 16
2036; RV32-NEXT:    .cfi_def_cfa_offset 0
2037; RV32-NEXT:    ret
2038;
2039; RV64-LABEL: icmp_slt_vx_v8i64:
2040; RV64:       # %bb.0:
2041; RV64-NEXT:    vsetvli zero, a1, e64, m4, ta, ma
2042; RV64-NEXT:    vmslt.vx v12, v8, a0, v0.t
2043; RV64-NEXT:    vmv1r.v v0, v12
2044; RV64-NEXT:    ret
2045  %elt.head = insertelement <8 x i64> poison, i64 %b, i32 0
2046  %vb = shufflevector <8 x i64> %elt.head, <8 x i64> poison, <8 x i32> zeroinitializer
2047  %v = call <8 x i1> @llvm.vp.icmp.v8i64(<8 x i64> %va, <8 x i64> %vb, metadata !"slt", <8 x i1> %m, i32 %evl)
2048  ret <8 x i1> %v
2049}
2050
2051define <8 x i1> @icmp_slt_vx_swap_v8i64(<8 x i64> %va, i64 %b, <8 x i1> %m, i32 zeroext %evl) {
2052; RV32-LABEL: icmp_slt_vx_swap_v8i64:
2053; RV32:       # %bb.0:
2054; RV32-NEXT:    addi sp, sp, -16
2055; RV32-NEXT:    .cfi_def_cfa_offset 16
2056; RV32-NEXT:    sw a0, 8(sp)
2057; RV32-NEXT:    sw a1, 12(sp)
2058; RV32-NEXT:    addi a0, sp, 8
2059; RV32-NEXT:    vsetivli zero, 8, e64, m4, ta, ma
2060; RV32-NEXT:    vlse64.v v16, (a0), zero
2061; RV32-NEXT:    vsetvli zero, a2, e64, m4, ta, ma
2062; RV32-NEXT:    vmslt.vv v12, v16, v8, v0.t
2063; RV32-NEXT:    vmv1r.v v0, v12
2064; RV32-NEXT:    addi sp, sp, 16
2065; RV32-NEXT:    .cfi_def_cfa_offset 0
2066; RV32-NEXT:    ret
2067;
2068; RV64-LABEL: icmp_slt_vx_swap_v8i64:
2069; RV64:       # %bb.0:
2070; RV64-NEXT:    vsetvli zero, a1, e64, m4, ta, ma
2071; RV64-NEXT:    vmsgt.vx v12, v8, a0, v0.t
2072; RV64-NEXT:    vmv1r.v v0, v12
2073; RV64-NEXT:    ret
2074  %elt.head = insertelement <8 x i64> poison, i64 %b, i32 0
2075  %vb = shufflevector <8 x i64> %elt.head, <8 x i64> poison, <8 x i32> zeroinitializer
2076  %v = call <8 x i1> @llvm.vp.icmp.v8i64(<8 x i64> %vb, <8 x i64> %va, metadata !"slt", <8 x i1> %m, i32 %evl)
2077  ret <8 x i1> %v
2078}
2079
2080define <8 x i1> @icmp_slt_vi_v8i64(<8 x i64> %va, <8 x i1> %m, i32 zeroext %evl) {
2081; CHECK-LABEL: icmp_slt_vi_v8i64:
2082; CHECK:       # %bb.0:
2083; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
2084; CHECK-NEXT:    vmsle.vi v12, v8, 3, v0.t
2085; CHECK-NEXT:    vmv1r.v v0, v12
2086; CHECK-NEXT:    ret
2087  %v = call <8 x i1> @llvm.vp.icmp.v8i64(<8 x i64> %va, <8 x i64> splat (i64 4), metadata !"slt", <8 x i1> %m, i32 %evl)
2088  ret <8 x i1> %v
2089}
2090
2091define <8 x i1> @icmp_slt_vi_swap_v8i64(<8 x i64> %va, <8 x i1> %m, i32 zeroext %evl) {
2092; CHECK-LABEL: icmp_slt_vi_swap_v8i64:
2093; CHECK:       # %bb.0:
2094; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
2095; CHECK-NEXT:    vmsgt.vi v12, v8, 4, v0.t
2096; CHECK-NEXT:    vmv1r.v v0, v12
2097; CHECK-NEXT:    ret
2098  %v = call <8 x i1> @llvm.vp.icmp.v8i64(<8 x i64> splat (i64 4), <8 x i64> %va, metadata !"slt", <8 x i1> %m, i32 %evl)
2099  ret <8 x i1> %v
2100}
2101
2102define <8 x i1> @icmp_sle_vv_v8i64(<8 x i64> %va, <8 x i64> %vb, <8 x i1> %m, i32 zeroext %evl) {
2103; CHECK-LABEL: icmp_sle_vv_v8i64:
2104; CHECK:       # %bb.0:
2105; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
2106; CHECK-NEXT:    vmsle.vv v16, v8, v12, v0.t
2107; CHECK-NEXT:    vmv1r.v v0, v16
2108; CHECK-NEXT:    ret
2109  %v = call <8 x i1> @llvm.vp.icmp.v8i64(<8 x i64> %va, <8 x i64> %vb, metadata !"sle", <8 x i1> %m, i32 %evl)
2110  ret <8 x i1> %v
2111}
2112
2113define <8 x i1> @icmp_sle_vx_v8i64(<8 x i64> %va, i64 %b, <8 x i1> %m, i32 zeroext %evl) {
2114; RV32-LABEL: icmp_sle_vx_v8i64:
2115; RV32:       # %bb.0:
2116; RV32-NEXT:    addi sp, sp, -16
2117; RV32-NEXT:    .cfi_def_cfa_offset 16
2118; RV32-NEXT:    sw a0, 8(sp)
2119; RV32-NEXT:    sw a1, 12(sp)
2120; RV32-NEXT:    addi a0, sp, 8
2121; RV32-NEXT:    vsetivli zero, 8, e64, m4, ta, ma
2122; RV32-NEXT:    vlse64.v v16, (a0), zero
2123; RV32-NEXT:    vsetvli zero, a2, e64, m4, ta, ma
2124; RV32-NEXT:    vmsle.vv v12, v8, v16, v0.t
2125; RV32-NEXT:    vmv1r.v v0, v12
2126; RV32-NEXT:    addi sp, sp, 16
2127; RV32-NEXT:    .cfi_def_cfa_offset 0
2128; RV32-NEXT:    ret
2129;
2130; RV64-LABEL: icmp_sle_vx_v8i64:
2131; RV64:       # %bb.0:
2132; RV64-NEXT:    vsetvli zero, a1, e64, m4, ta, ma
2133; RV64-NEXT:    vmsle.vx v12, v8, a0, v0.t
2134; RV64-NEXT:    vmv1r.v v0, v12
2135; RV64-NEXT:    ret
2136  %elt.head = insertelement <8 x i64> poison, i64 %b, i32 0
2137  %vb = shufflevector <8 x i64> %elt.head, <8 x i64> poison, <8 x i32> zeroinitializer
2138  %v = call <8 x i1> @llvm.vp.icmp.v8i64(<8 x i64> %va, <8 x i64> %vb, metadata !"sle", <8 x i1> %m, i32 %evl)
2139  ret <8 x i1> %v
2140}
2141
2142define <8 x i1> @icmp_sle_vx_swap_v8i64(<8 x i64> %va, i64 %b, <8 x i1> %m, i32 zeroext %evl) {
2143; RV32-LABEL: icmp_sle_vx_swap_v8i64:
2144; RV32:       # %bb.0:
2145; RV32-NEXT:    addi sp, sp, -16
2146; RV32-NEXT:    .cfi_def_cfa_offset 16
2147; RV32-NEXT:    sw a0, 8(sp)
2148; RV32-NEXT:    sw a1, 12(sp)
2149; RV32-NEXT:    addi a0, sp, 8
2150; RV32-NEXT:    vsetivli zero, 8, e64, m4, ta, ma
2151; RV32-NEXT:    vlse64.v v16, (a0), zero
2152; RV32-NEXT:    vsetvli zero, a2, e64, m4, ta, ma
2153; RV32-NEXT:    vmsle.vv v12, v16, v8, v0.t
2154; RV32-NEXT:    vmv1r.v v0, v12
2155; RV32-NEXT:    addi sp, sp, 16
2156; RV32-NEXT:    .cfi_def_cfa_offset 0
2157; RV32-NEXT:    ret
2158;
2159; RV64-LABEL: icmp_sle_vx_swap_v8i64:
2160; RV64:       # %bb.0:
2161; RV64-NEXT:    vsetivli zero, 8, e64, m4, ta, ma
2162; RV64-NEXT:    vmv.v.x v16, a0
2163; RV64-NEXT:    vsetvli zero, a1, e64, m4, ta, ma
2164; RV64-NEXT:    vmsle.vv v12, v16, v8, v0.t
2165; RV64-NEXT:    vmv1r.v v0, v12
2166; RV64-NEXT:    ret
2167  %elt.head = insertelement <8 x i64> poison, i64 %b, i32 0
2168  %vb = shufflevector <8 x i64> %elt.head, <8 x i64> poison, <8 x i32> zeroinitializer
2169  %v = call <8 x i1> @llvm.vp.icmp.v8i64(<8 x i64> %vb, <8 x i64> %va, metadata !"sle", <8 x i1> %m, i32 %evl)
2170  ret <8 x i1> %v
2171}
2172
2173define <8 x i1> @icmp_sle_vi_v8i64(<8 x i64> %va, <8 x i1> %m, i32 zeroext %evl) {
2174; CHECK-LABEL: icmp_sle_vi_v8i64:
2175; CHECK:       # %bb.0:
2176; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
2177; CHECK-NEXT:    vmsle.vi v12, v8, 4, v0.t
2178; CHECK-NEXT:    vmv1r.v v0, v12
2179; CHECK-NEXT:    ret
2180  %v = call <8 x i1> @llvm.vp.icmp.v8i64(<8 x i64> %va, <8 x i64> splat (i64 4), metadata !"sle", <8 x i1> %m, i32 %evl)
2181  ret <8 x i1> %v
2182}
2183
2184define <8 x i1> @icmp_sle_vi_swap_v8i64(<8 x i64> %va, <8 x i1> %m, i32 zeroext %evl) {
2185; CHECK-LABEL: icmp_sle_vi_swap_v8i64:
2186; CHECK:       # %bb.0:
2187; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
2188; CHECK-NEXT:    vmsgt.vi v12, v8, 3, v0.t
2189; CHECK-NEXT:    vmv1r.v v0, v12
2190; CHECK-NEXT:    ret
2191  %v = call <8 x i1> @llvm.vp.icmp.v8i64(<8 x i64> splat (i64 4), <8 x i64> %va, metadata !"sle", <8 x i1> %m, i32 %evl)
2192  ret <8 x i1> %v
2193}
2194