1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=riscv32 -mattr=+v -verify-machineinstrs < %s | FileCheck --check-prefixes=CHECK,RV32 %s 3; RUN: llc -mtriple=riscv64 -mattr=+v -verify-machineinstrs < %s | FileCheck --check-prefixes=CHECK,RV64 %s 4 5define void @gather_const_v16i8(ptr %x) { 6; CHECK-LABEL: gather_const_v16i8: 7; CHECK: # %bb.0: 8; CHECK-NEXT: lbu a1, 12(a0) 9; CHECK-NEXT: vsetivli zero, 16, e8, m1, ta, ma 10; CHECK-NEXT: vmv.v.x v8, a1 11; CHECK-NEXT: vse8.v v8, (a0) 12; CHECK-NEXT: ret 13 %a = load <16 x i8>, ptr %x 14 %b = extractelement <16 x i8> %a, i32 12 15 %c = insertelement <16 x i8> poison, i8 %b, i32 0 16 %d = shufflevector <16 x i8> %c, <16 x i8> poison, <16 x i32> zeroinitializer 17 store <16 x i8> %d, ptr %x 18 ret void 19} 20 21define void @gather_const_v8i16(ptr %x) { 22; CHECK-LABEL: gather_const_v8i16: 23; CHECK: # %bb.0: 24; CHECK-NEXT: lh a1, 10(a0) 25; CHECK-NEXT: vsetivli zero, 8, e16, m1, ta, ma 26; CHECK-NEXT: vmv.v.x v8, a1 27; CHECK-NEXT: vse16.v v8, (a0) 28; CHECK-NEXT: ret 29 %a = load <8 x i16>, ptr %x 30 %b = extractelement <8 x i16> %a, i32 5 31 %c = insertelement <8 x i16> poison, i16 %b, i32 0 32 %d = shufflevector <8 x i16> %c, <8 x i16> poison, <8 x i32> zeroinitializer 33 store <8 x i16> %d, ptr %x 34 ret void 35} 36 37define void @gather_const_v4i32(ptr %x) { 38; CHECK-LABEL: gather_const_v4i32: 39; CHECK: # %bb.0: 40; CHECK-NEXT: lw a1, 12(a0) 41; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, ma 42; CHECK-NEXT: vmv.v.x v8, a1 43; CHECK-NEXT: vse32.v v8, (a0) 44; CHECK-NEXT: ret 45 %a = load <4 x i32>, ptr %x 46 %b = extractelement <4 x i32> %a, i32 3 47 %c = insertelement <4 x i32> poison, i32 %b, i32 0 48 %d = shufflevector <4 x i32> %c, <4 x i32> poison, <4 x i32> zeroinitializer 49 store <4 x i32> %d, ptr %x 50 ret void 51} 52 53define void @gather_const_v2i64(ptr %x) { 54; RV32-LABEL: gather_const_v2i64: 55; RV32: # %bb.0: 56; RV32-NEXT: addi a1, a0, 8 57; RV32-NEXT: vsetivli zero, 2, e64, m1, ta, ma 58; RV32-NEXT: vlse64.v v8, (a1), zero 59; RV32-NEXT: vse64.v v8, (a0) 60; RV32-NEXT: ret 61; 62; RV64-LABEL: gather_const_v2i64: 63; RV64: # %bb.0: 64; RV64-NEXT: ld a1, 8(a0) 65; RV64-NEXT: vsetivli zero, 2, e64, m1, ta, ma 66; RV64-NEXT: vmv.v.x v8, a1 67; RV64-NEXT: vse64.v v8, (a0) 68; RV64-NEXT: ret 69 %a = load <2 x i64>, ptr %x 70 %b = extractelement <2 x i64> %a, i32 1 71 %c = insertelement <2 x i64> poison, i64 %b, i32 0 72 %d = shufflevector <2 x i64> %c, <2 x i64> poison, <2 x i32> zeroinitializer 73 store <2 x i64> %d, ptr %x 74 ret void 75} 76 77define void @gather_const_v64i8(ptr %x) { 78; CHECK-LABEL: gather_const_v64i8: 79; CHECK: # %bb.0: 80; CHECK-NEXT: lbu a1, 32(a0) 81; CHECK-NEXT: li a2, 64 82; CHECK-NEXT: vsetvli zero, a2, e8, m4, ta, ma 83; CHECK-NEXT: vmv.v.x v8, a1 84; CHECK-NEXT: vse8.v v8, (a0) 85; CHECK-NEXT: ret 86 %a = load <64 x i8>, ptr %x 87 %b = extractelement <64 x i8> %a, i32 32 88 %c = insertelement <64 x i8> poison, i8 %b, i32 0 89 %d = shufflevector <64 x i8> %c, <64 x i8> poison, <64 x i32> zeroinitializer 90 store <64 x i8> %d, ptr %x 91 ret void 92} 93 94define void @gather_const_v16i16(ptr %x) { 95; CHECK-LABEL: gather_const_v16i16: 96; CHECK: # %bb.0: 97; CHECK-NEXT: lh a1, 50(a0) 98; CHECK-NEXT: li a2, 32 99; CHECK-NEXT: vsetvli zero, a2, e16, m4, ta, ma 100; CHECK-NEXT: vmv.v.x v8, a1 101; CHECK-NEXT: vse16.v v8, (a0) 102; CHECK-NEXT: ret 103 %a = load <32 x i16>, ptr %x 104 %b = extractelement <32 x i16> %a, i32 25 105 %c = insertelement <32 x i16> poison, i16 %b, i32 0 106 %d = shufflevector <32 x i16> %c, <32 x i16> poison, <32 x i32> zeroinitializer 107 store <32 x i16> %d, ptr %x 108 ret void 109} 110 111define void @gather_const_v16i32(ptr %x) { 112; CHECK-LABEL: gather_const_v16i32: 113; CHECK: # %bb.0: 114; CHECK-NEXT: lw a1, 36(a0) 115; CHECK-NEXT: vsetivli zero, 16, e32, m4, ta, ma 116; CHECK-NEXT: vmv.v.x v8, a1 117; CHECK-NEXT: vse32.v v8, (a0) 118; CHECK-NEXT: ret 119 %a = load <16 x i32>, ptr %x 120 %b = extractelement <16 x i32> %a, i32 9 121 %c = insertelement <16 x i32> poison, i32 %b, i32 0 122 %d = shufflevector <16 x i32> %c, <16 x i32> poison, <16 x i32> zeroinitializer 123 store <16 x i32> %d, ptr %x 124 ret void 125} 126 127define void @gather_const_v8i64(ptr %x) { 128; RV32-LABEL: gather_const_v8i64: 129; RV32: # %bb.0: 130; RV32-NEXT: addi a1, a0, 24 131; RV32-NEXT: vsetivli zero, 8, e64, m4, ta, ma 132; RV32-NEXT: vlse64.v v8, (a1), zero 133; RV32-NEXT: vse64.v v8, (a0) 134; RV32-NEXT: ret 135; 136; RV64-LABEL: gather_const_v8i64: 137; RV64: # %bb.0: 138; RV64-NEXT: ld a1, 24(a0) 139; RV64-NEXT: vsetivli zero, 8, e64, m4, ta, ma 140; RV64-NEXT: vmv.v.x v8, a1 141; RV64-NEXT: vse64.v v8, (a0) 142; RV64-NEXT: ret 143 %a = load <8 x i64>, ptr %x 144 %b = extractelement <8 x i64> %a, i32 3 145 %c = insertelement <8 x i64> poison, i64 %b, i32 0 146 %d = shufflevector <8 x i64> %c, <8 x i64> poison, <8 x i32> zeroinitializer 147 store <8 x i64> %d, ptr %x 148 ret void 149} 150 151define void @splat_concat_low(ptr %x, ptr %y, ptr %z) { 152; CHECK-LABEL: splat_concat_low: 153; CHECK: # %bb.0: 154; CHECK-NEXT: lh a0, 2(a0) 155; CHECK-NEXT: vsetivli zero, 8, e16, m1, ta, ma 156; CHECK-NEXT: vmv.v.x v8, a0 157; CHECK-NEXT: vse16.v v8, (a2) 158; CHECK-NEXT: ret 159 %a = load <4 x i16>, ptr %x 160 %b = load <4 x i16>, ptr %y 161 %c = shufflevector <4 x i16> %a, <4 x i16> %b, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> 162 %d = shufflevector <8 x i16> %c, <8 x i16> poison, <8 x i32> <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1> 163 store <8 x i16> %d, ptr %z 164 ret void 165} 166 167define void @splat_concat_high(ptr %x, ptr %y, ptr %z) { 168; CHECK-LABEL: splat_concat_high: 169; CHECK: # %bb.0: 170; CHECK-NEXT: lh a0, 2(a1) 171; CHECK-NEXT: vsetivli zero, 8, e16, m1, ta, ma 172; CHECK-NEXT: vmv.v.x v8, a0 173; CHECK-NEXT: vse16.v v8, (a2) 174; CHECK-NEXT: ret 175 %a = load <4 x i16>, ptr %x 176 %b = load <4 x i16>, ptr %y 177 %c = shufflevector <4 x i16> %a, <4 x i16> %b, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> 178 %d = shufflevector <8 x i16> %c, <8 x i16> poison, <8 x i32> <i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5> 179 store <8 x i16> %d, ptr %z 180 ret void 181} 182