xref: /llvm-project/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-i2fp.ll (revision 1cb599835ccf7ee8b2d1d5a7f3107e19a26fc6f5) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=riscv32 -target-abi=ilp32d -mattr=+v,+zvfh,+zvfbfmin,+f,+d -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,ZVFH,ZVFH32
3; RUN: llc -mtriple=riscv64 -target-abi=lp64d -mattr=+v,+zvfh,+zvfbfmin,+f,+d -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,ZVFH,ZVFH64
4; RUN: llc -mtriple=riscv32 -target-abi=ilp32d -mattr=+v,+zvfhmin,+zvfbfmin,+f,+d -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,ZVFHMIN,ZVFHMIN32
5; RUN: llc -mtriple=riscv64 -target-abi=lp64d -mattr=+v,+zvfhmin,+zvfbfmin,+f,+d -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,ZVFHMIN,ZVFHMIN64
6
7define void @si2fp_v2i32_v2f32(ptr %x, ptr %y) {
8; CHECK-LABEL: si2fp_v2i32_v2f32:
9; CHECK:       # %bb.0:
10; CHECK-NEXT:    vsetivli zero, 2, e32, mf2, ta, ma
11; CHECK-NEXT:    vle32.v v8, (a0)
12; CHECK-NEXT:    vfcvt.f.x.v v8, v8
13; CHECK-NEXT:    vse32.v v8, (a1)
14; CHECK-NEXT:    ret
15  %a = load <2 x i32>, ptr %x
16  %d = sitofp <2 x i32> %a to <2 x float>
17  store <2 x float> %d, ptr %y
18  ret void
19}
20
21define void @ui2fp_v2i32_v2f32(ptr %x, ptr %y) {
22; CHECK-LABEL: ui2fp_v2i32_v2f32:
23; CHECK:       # %bb.0:
24; CHECK-NEXT:    vsetivli zero, 2, e32, mf2, ta, ma
25; CHECK-NEXT:    vle32.v v8, (a0)
26; CHECK-NEXT:    vfcvt.f.xu.v v8, v8
27; CHECK-NEXT:    vse32.v v8, (a1)
28; CHECK-NEXT:    ret
29  %a = load <2 x i32>, ptr %x
30  %d = uitofp <2 x i32> %a to <2 x float>
31  store <2 x float> %d, ptr %y
32  ret void
33}
34
35define <2 x float> @si2fp_v2i1_v2f32(<2 x i1> %x) {
36; CHECK-LABEL: si2fp_v2i1_v2f32:
37; CHECK:       # %bb.0:
38; CHECK-NEXT:    vsetivli zero, 2, e16, mf4, ta, ma
39; CHECK-NEXT:    vmv.v.i v8, 0
40; CHECK-NEXT:    vmerge.vim v9, v8, -1, v0
41; CHECK-NEXT:    vfwcvt.f.x.v v8, v9
42; CHECK-NEXT:    ret
43  %z = sitofp <2 x i1> %x to <2 x float>
44  ret <2 x float> %z
45}
46
47define <2 x float> @si2fp_v2i7_v2f32(<2 x i7> %x) {
48; CHECK-LABEL: si2fp_v2i7_v2f32:
49; CHECK:       # %bb.0:
50; CHECK-NEXT:    vsetivli zero, 2, e8, mf8, ta, ma
51; CHECK-NEXT:    vadd.vv v8, v8, v8
52; CHECK-NEXT:    vsra.vi v8, v8, 1
53; CHECK-NEXT:    vsetvli zero, zero, e16, mf4, ta, ma
54; CHECK-NEXT:    vsext.vf2 v9, v8
55; CHECK-NEXT:    vfwcvt.f.x.v v8, v9
56; CHECK-NEXT:    ret
57  %z = sitofp <2 x i7> %x to <2 x float>
58  ret <2 x float> %z
59}
60
61define <2 x float> @ui2fp_v2i7_v2f32(<2 x i7> %x) {
62; CHECK-LABEL: ui2fp_v2i7_v2f32:
63; CHECK:       # %bb.0:
64; CHECK-NEXT:    li a0, 127
65; CHECK-NEXT:    vsetivli zero, 2, e8, mf8, ta, ma
66; CHECK-NEXT:    vand.vx v8, v8, a0
67; CHECK-NEXT:    vsetvli zero, zero, e16, mf4, ta, ma
68; CHECK-NEXT:    vzext.vf2 v9, v8
69; CHECK-NEXT:    vfwcvt.f.xu.v v8, v9
70; CHECK-NEXT:    ret
71  %z = uitofp <2 x i7> %x to <2 x float>
72  ret <2 x float> %z
73}
74
75define <2 x float> @ui2fp_v2i1_v2f32(<2 x i1> %x) {
76; CHECK-LABEL: ui2fp_v2i1_v2f32:
77; CHECK:       # %bb.0:
78; CHECK-NEXT:    vsetivli zero, 2, e16, mf4, ta, ma
79; CHECK-NEXT:    vmv.v.i v8, 0
80; CHECK-NEXT:    vmerge.vim v9, v8, 1, v0
81; CHECK-NEXT:    vfwcvt.f.xu.v v8, v9
82; CHECK-NEXT:    ret
83  %z = uitofp <2 x i1> %x to <2 x float>
84  ret <2 x float> %z
85}
86
87define void @si2fp_v3i32_v3f32(ptr %x, ptr %y) {
88; CHECK-LABEL: si2fp_v3i32_v3f32:
89; CHECK:       # %bb.0:
90; CHECK-NEXT:    vsetivli zero, 3, e32, m1, ta, ma
91; CHECK-NEXT:    vle32.v v8, (a0)
92; CHECK-NEXT:    vfcvt.f.x.v v8, v8
93; CHECK-NEXT:    vse32.v v8, (a1)
94; CHECK-NEXT:    ret
95  %a = load <3 x i32>, ptr %x
96  %d = sitofp <3 x i32> %a to <3 x float>
97  store <3 x float> %d, ptr %y
98  ret void
99}
100
101define void @ui2fp_v3i32_v3f32(ptr %x, ptr %y) {
102; CHECK-LABEL: ui2fp_v3i32_v3f32:
103; CHECK:       # %bb.0:
104; CHECK-NEXT:    vsetivli zero, 3, e32, m1, ta, ma
105; CHECK-NEXT:    vle32.v v8, (a0)
106; CHECK-NEXT:    vfcvt.f.xu.v v8, v8
107; CHECK-NEXT:    vse32.v v8, (a1)
108; CHECK-NEXT:    ret
109  %a = load <3 x i32>, ptr %x
110  %d = uitofp <3 x i32> %a to <3 x float>
111  store <3 x float> %d, ptr %y
112  ret void
113}
114
115define <3 x float> @si2fp_v3i1_v3f32(<3 x i1> %x) {
116; CHECK-LABEL: si2fp_v3i1_v3f32:
117; CHECK:       # %bb.0:
118; CHECK-NEXT:    vsetivli zero, 4, e16, mf2, ta, ma
119; CHECK-NEXT:    vmv.v.i v8, 0
120; CHECK-NEXT:    vmerge.vim v9, v8, -1, v0
121; CHECK-NEXT:    vfwcvt.f.x.v v8, v9
122; CHECK-NEXT:    ret
123  %z = sitofp <3 x i1> %x to <3 x float>
124  ret <3 x float> %z
125}
126
127; FIXME: This gets expanded instead of widened + promoted
128define <3 x float> @si2fp_v3i7_v3f32(<3 x i7> %x) {
129; ZVFH32-LABEL: si2fp_v3i7_v3f32:
130; ZVFH32:       # %bb.0:
131; ZVFH32-NEXT:    lw a1, 0(a0)
132; ZVFH32-NEXT:    lw a2, 4(a0)
133; ZVFH32-NEXT:    lw a0, 8(a0)
134; ZVFH32-NEXT:    vsetivli zero, 4, e8, mf4, ta, ma
135; ZVFH32-NEXT:    vmv.v.x v8, a1
136; ZVFH32-NEXT:    vslide1down.vx v8, v8, a2
137; ZVFH32-NEXT:    vslide1down.vx v8, v8, a0
138; ZVFH32-NEXT:    vslidedown.vi v8, v8, 1
139; ZVFH32-NEXT:    vadd.vv v8, v8, v8
140; ZVFH32-NEXT:    vsra.vi v8, v8, 1
141; ZVFH32-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma
142; ZVFH32-NEXT:    vsext.vf2 v9, v8
143; ZVFH32-NEXT:    vfwcvt.f.x.v v8, v9
144; ZVFH32-NEXT:    ret
145;
146; ZVFH64-LABEL: si2fp_v3i7_v3f32:
147; ZVFH64:       # %bb.0:
148; ZVFH64-NEXT:    ld a1, 0(a0)
149; ZVFH64-NEXT:    ld a2, 8(a0)
150; ZVFH64-NEXT:    ld a0, 16(a0)
151; ZVFH64-NEXT:    vsetivli zero, 4, e8, mf4, ta, ma
152; ZVFH64-NEXT:    vmv.v.x v8, a1
153; ZVFH64-NEXT:    vslide1down.vx v8, v8, a2
154; ZVFH64-NEXT:    vslide1down.vx v8, v8, a0
155; ZVFH64-NEXT:    vslidedown.vi v8, v8, 1
156; ZVFH64-NEXT:    vadd.vv v8, v8, v8
157; ZVFH64-NEXT:    vsra.vi v8, v8, 1
158; ZVFH64-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma
159; ZVFH64-NEXT:    vsext.vf2 v9, v8
160; ZVFH64-NEXT:    vfwcvt.f.x.v v8, v9
161; ZVFH64-NEXT:    ret
162;
163; ZVFHMIN32-LABEL: si2fp_v3i7_v3f32:
164; ZVFHMIN32:       # %bb.0:
165; ZVFHMIN32-NEXT:    lw a1, 0(a0)
166; ZVFHMIN32-NEXT:    lw a2, 4(a0)
167; ZVFHMIN32-NEXT:    lw a0, 8(a0)
168; ZVFHMIN32-NEXT:    vsetivli zero, 4, e8, mf4, ta, ma
169; ZVFHMIN32-NEXT:    vmv.v.x v8, a1
170; ZVFHMIN32-NEXT:    vslide1down.vx v8, v8, a2
171; ZVFHMIN32-NEXT:    vslide1down.vx v8, v8, a0
172; ZVFHMIN32-NEXT:    vslidedown.vi v8, v8, 1
173; ZVFHMIN32-NEXT:    vadd.vv v8, v8, v8
174; ZVFHMIN32-NEXT:    vsra.vi v8, v8, 1
175; ZVFHMIN32-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma
176; ZVFHMIN32-NEXT:    vsext.vf2 v9, v8
177; ZVFHMIN32-NEXT:    vfwcvt.f.x.v v8, v9
178; ZVFHMIN32-NEXT:    ret
179;
180; ZVFHMIN64-LABEL: si2fp_v3i7_v3f32:
181; ZVFHMIN64:       # %bb.0:
182; ZVFHMIN64-NEXT:    ld a1, 0(a0)
183; ZVFHMIN64-NEXT:    ld a2, 8(a0)
184; ZVFHMIN64-NEXT:    ld a0, 16(a0)
185; ZVFHMIN64-NEXT:    vsetivli zero, 4, e8, mf4, ta, ma
186; ZVFHMIN64-NEXT:    vmv.v.x v8, a1
187; ZVFHMIN64-NEXT:    vslide1down.vx v8, v8, a2
188; ZVFHMIN64-NEXT:    vslide1down.vx v8, v8, a0
189; ZVFHMIN64-NEXT:    vslidedown.vi v8, v8, 1
190; ZVFHMIN64-NEXT:    vadd.vv v8, v8, v8
191; ZVFHMIN64-NEXT:    vsra.vi v8, v8, 1
192; ZVFHMIN64-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma
193; ZVFHMIN64-NEXT:    vsext.vf2 v9, v8
194; ZVFHMIN64-NEXT:    vfwcvt.f.x.v v8, v9
195; ZVFHMIN64-NEXT:    ret
196  %z = sitofp <3 x i7> %x to <3 x float>
197  ret <3 x float> %z
198}
199
200; FIXME: This gets expanded instead of widened + promoted
201define <3 x float> @ui2fp_v3i7_v3f32(<3 x i7> %x) {
202; ZVFH32-LABEL: ui2fp_v3i7_v3f32:
203; ZVFH32:       # %bb.0:
204; ZVFH32-NEXT:    lw a1, 0(a0)
205; ZVFH32-NEXT:    lw a2, 4(a0)
206; ZVFH32-NEXT:    lw a0, 8(a0)
207; ZVFH32-NEXT:    vsetivli zero, 4, e8, mf4, ta, ma
208; ZVFH32-NEXT:    vmv.v.x v8, a1
209; ZVFH32-NEXT:    vslide1down.vx v8, v8, a2
210; ZVFH32-NEXT:    vslide1down.vx v8, v8, a0
211; ZVFH32-NEXT:    vslidedown.vi v8, v8, 1
212; ZVFH32-NEXT:    li a0, 127
213; ZVFH32-NEXT:    vand.vx v8, v8, a0
214; ZVFH32-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma
215; ZVFH32-NEXT:    vzext.vf2 v9, v8
216; ZVFH32-NEXT:    vfwcvt.f.xu.v v8, v9
217; ZVFH32-NEXT:    ret
218;
219; ZVFH64-LABEL: ui2fp_v3i7_v3f32:
220; ZVFH64:       # %bb.0:
221; ZVFH64-NEXT:    ld a1, 0(a0)
222; ZVFH64-NEXT:    ld a2, 8(a0)
223; ZVFH64-NEXT:    ld a0, 16(a0)
224; ZVFH64-NEXT:    vsetivli zero, 4, e8, mf4, ta, ma
225; ZVFH64-NEXT:    vmv.v.x v8, a1
226; ZVFH64-NEXT:    vslide1down.vx v8, v8, a2
227; ZVFH64-NEXT:    vslide1down.vx v8, v8, a0
228; ZVFH64-NEXT:    vslidedown.vi v8, v8, 1
229; ZVFH64-NEXT:    li a0, 127
230; ZVFH64-NEXT:    vand.vx v8, v8, a0
231; ZVFH64-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma
232; ZVFH64-NEXT:    vzext.vf2 v9, v8
233; ZVFH64-NEXT:    vfwcvt.f.xu.v v8, v9
234; ZVFH64-NEXT:    ret
235;
236; ZVFHMIN32-LABEL: ui2fp_v3i7_v3f32:
237; ZVFHMIN32:       # %bb.0:
238; ZVFHMIN32-NEXT:    lw a1, 0(a0)
239; ZVFHMIN32-NEXT:    lw a2, 4(a0)
240; ZVFHMIN32-NEXT:    lw a0, 8(a0)
241; ZVFHMIN32-NEXT:    vsetivli zero, 4, e8, mf4, ta, ma
242; ZVFHMIN32-NEXT:    vmv.v.x v8, a1
243; ZVFHMIN32-NEXT:    vslide1down.vx v8, v8, a2
244; ZVFHMIN32-NEXT:    vslide1down.vx v8, v8, a0
245; ZVFHMIN32-NEXT:    vslidedown.vi v8, v8, 1
246; ZVFHMIN32-NEXT:    li a0, 127
247; ZVFHMIN32-NEXT:    vand.vx v8, v8, a0
248; ZVFHMIN32-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma
249; ZVFHMIN32-NEXT:    vzext.vf2 v9, v8
250; ZVFHMIN32-NEXT:    vfwcvt.f.xu.v v8, v9
251; ZVFHMIN32-NEXT:    ret
252;
253; ZVFHMIN64-LABEL: ui2fp_v3i7_v3f32:
254; ZVFHMIN64:       # %bb.0:
255; ZVFHMIN64-NEXT:    ld a1, 0(a0)
256; ZVFHMIN64-NEXT:    ld a2, 8(a0)
257; ZVFHMIN64-NEXT:    ld a0, 16(a0)
258; ZVFHMIN64-NEXT:    vsetivli zero, 4, e8, mf4, ta, ma
259; ZVFHMIN64-NEXT:    vmv.v.x v8, a1
260; ZVFHMIN64-NEXT:    vslide1down.vx v8, v8, a2
261; ZVFHMIN64-NEXT:    vslide1down.vx v8, v8, a0
262; ZVFHMIN64-NEXT:    vslidedown.vi v8, v8, 1
263; ZVFHMIN64-NEXT:    li a0, 127
264; ZVFHMIN64-NEXT:    vand.vx v8, v8, a0
265; ZVFHMIN64-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma
266; ZVFHMIN64-NEXT:    vzext.vf2 v9, v8
267; ZVFHMIN64-NEXT:    vfwcvt.f.xu.v v8, v9
268; ZVFHMIN64-NEXT:    ret
269  %z = uitofp <3 x i7> %x to <3 x float>
270  ret <3 x float> %z
271}
272
273define <3 x float> @ui2fp_v3i1_v3f32(<3 x i1> %x) {
274; CHECK-LABEL: ui2fp_v3i1_v3f32:
275; CHECK:       # %bb.0:
276; CHECK-NEXT:    vsetivli zero, 4, e16, mf2, ta, ma
277; CHECK-NEXT:    vmv.v.i v8, 0
278; CHECK-NEXT:    vmerge.vim v9, v8, 1, v0
279; CHECK-NEXT:    vfwcvt.f.xu.v v8, v9
280; CHECK-NEXT:    ret
281  %z = uitofp <3 x i1> %x to <3 x float>
282  ret <3 x float> %z
283}
284
285define void @si2fp_v8i32_v8f32(ptr %x, ptr %y) {
286; CHECK-LABEL: si2fp_v8i32_v8f32:
287; CHECK:       # %bb.0:
288; CHECK-NEXT:    vsetivli zero, 8, e32, m2, ta, ma
289; CHECK-NEXT:    vle32.v v8, (a0)
290; CHECK-NEXT:    vfcvt.f.x.v v8, v8
291; CHECK-NEXT:    vse32.v v8, (a1)
292; CHECK-NEXT:    ret
293  %a = load <8 x i32>, ptr %x
294  %d = sitofp <8 x i32> %a to <8 x float>
295  store <8 x float> %d, ptr %y
296  ret void
297}
298
299define void @ui2fp_v8i32_v8f32(ptr %x, ptr %y) {
300; CHECK-LABEL: ui2fp_v8i32_v8f32:
301; CHECK:       # %bb.0:
302; CHECK-NEXT:    vsetivli zero, 8, e32, m2, ta, ma
303; CHECK-NEXT:    vle32.v v8, (a0)
304; CHECK-NEXT:    vfcvt.f.xu.v v8, v8
305; CHECK-NEXT:    vse32.v v8, (a1)
306; CHECK-NEXT:    ret
307  %a = load <8 x i32>, ptr %x
308  %d = uitofp <8 x i32> %a to <8 x float>
309  store <8 x float> %d, ptr %y
310  ret void
311}
312
313define <8 x float> @si2fp_v8i1_v8f32(<8 x i1> %x) {
314; CHECK-LABEL: si2fp_v8i1_v8f32:
315; CHECK:       # %bb.0:
316; CHECK-NEXT:    vsetivli zero, 8, e16, m1, ta, ma
317; CHECK-NEXT:    vmv.v.i v8, 0
318; CHECK-NEXT:    vmerge.vim v10, v8, -1, v0
319; CHECK-NEXT:    vfwcvt.f.x.v v8, v10
320; CHECK-NEXT:    ret
321  %z = sitofp <8 x i1> %x to <8 x float>
322  ret <8 x float> %z
323}
324
325define <8 x float> @ui2fp_v8i1_v8f32(<8 x i1> %x) {
326; CHECK-LABEL: ui2fp_v8i1_v8f32:
327; CHECK:       # %bb.0:
328; CHECK-NEXT:    vsetivli zero, 8, e16, m1, ta, ma
329; CHECK-NEXT:    vmv.v.i v8, 0
330; CHECK-NEXT:    vmerge.vim v10, v8, 1, v0
331; CHECK-NEXT:    vfwcvt.f.xu.v v8, v10
332; CHECK-NEXT:    ret
333  %z = uitofp <8 x i1> %x to <8 x float>
334  ret <8 x float> %z
335}
336
337define void @si2fp_v2i16_v2f64(ptr %x, ptr %y) {
338; CHECK-LABEL: si2fp_v2i16_v2f64:
339; CHECK:       # %bb.0:
340; CHECK-NEXT:    vsetivli zero, 2, e32, mf2, ta, ma
341; CHECK-NEXT:    vle16.v v8, (a0)
342; CHECK-NEXT:    vsext.vf2 v9, v8
343; CHECK-NEXT:    vfwcvt.f.x.v v8, v9
344; CHECK-NEXT:    vse64.v v8, (a1)
345; CHECK-NEXT:    ret
346  %a = load <2 x i16>, ptr %x
347  %d = sitofp <2 x i16> %a to <2 x double>
348  store <2 x double> %d, ptr %y
349  ret void
350}
351
352define void @ui2fp_v2i16_v2f64(ptr %x, ptr %y) {
353; CHECK-LABEL: ui2fp_v2i16_v2f64:
354; CHECK:       # %bb.0:
355; CHECK-NEXT:    vsetivli zero, 2, e32, mf2, ta, ma
356; CHECK-NEXT:    vle16.v v8, (a0)
357; CHECK-NEXT:    vzext.vf2 v9, v8
358; CHECK-NEXT:    vfwcvt.f.xu.v v8, v9
359; CHECK-NEXT:    vse64.v v8, (a1)
360; CHECK-NEXT:    ret
361  %a = load <2 x i16>, ptr %x
362  %d = uitofp <2 x i16> %a to <2 x double>
363  store <2 x double> %d, ptr %y
364  ret void
365}
366
367define void @si2fp_v8i16_v8f64(ptr %x, ptr %y) {
368; CHECK-LABEL: si2fp_v8i16_v8f64:
369; CHECK:       # %bb.0:
370; CHECK-NEXT:    vsetivli zero, 8, e32, m2, ta, ma
371; CHECK-NEXT:    vle16.v v8, (a0)
372; CHECK-NEXT:    vsext.vf2 v10, v8
373; CHECK-NEXT:    vfwcvt.f.x.v v12, v10
374; CHECK-NEXT:    vse64.v v12, (a1)
375; CHECK-NEXT:    ret
376  %a = load <8 x i16>, ptr %x
377  %d = sitofp <8 x i16> %a to <8 x double>
378  store <8 x double> %d, ptr %y
379  ret void
380}
381
382define void @ui2fp_v8i16_v8f64(ptr %x, ptr %y) {
383; CHECK-LABEL: ui2fp_v8i16_v8f64:
384; CHECK:       # %bb.0:
385; CHECK-NEXT:    vsetivli zero, 8, e32, m2, ta, ma
386; CHECK-NEXT:    vle16.v v8, (a0)
387; CHECK-NEXT:    vzext.vf2 v10, v8
388; CHECK-NEXT:    vfwcvt.f.xu.v v12, v10
389; CHECK-NEXT:    vse64.v v12, (a1)
390; CHECK-NEXT:    ret
391  %a = load <8 x i16>, ptr %x
392  %d = uitofp <8 x i16> %a to <8 x double>
393  store <8 x double> %d, ptr %y
394  ret void
395}
396
397define <8 x double> @si2fp_v8i1_v8f64(<8 x i1> %x) {
398; CHECK-LABEL: si2fp_v8i1_v8f64:
399; CHECK:       # %bb.0:
400; CHECK-NEXT:    vsetivli zero, 8, e32, m2, ta, ma
401; CHECK-NEXT:    vmv.v.i v8, 0
402; CHECK-NEXT:    vmerge.vim v12, v8, -1, v0
403; CHECK-NEXT:    vfwcvt.f.x.v v8, v12
404; CHECK-NEXT:    ret
405  %z = sitofp <8 x i1> %x to <8 x double>
406  ret <8 x double> %z
407}
408
409define <8 x double> @ui2fp_v8i1_v8f64(<8 x i1> %x) {
410; CHECK-LABEL: ui2fp_v8i1_v8f64:
411; CHECK:       # %bb.0:
412; CHECK-NEXT:    vsetivli zero, 8, e32, m2, ta, ma
413; CHECK-NEXT:    vmv.v.i v8, 0
414; CHECK-NEXT:    vmerge.vim v12, v8, 1, v0
415; CHECK-NEXT:    vfwcvt.f.xu.v v8, v12
416; CHECK-NEXT:    ret
417  %z = uitofp <8 x i1> %x to <8 x double>
418  ret <8 x double> %z
419}
420
421define void @si2fp_v2i64_v2bf16(ptr %x, ptr %y) {
422; CHECK-LABEL: si2fp_v2i64_v2bf16:
423; CHECK:       # %bb.0:
424; CHECK-NEXT:    vsetivli zero, 2, e32, mf2, ta, ma
425; CHECK-NEXT:    vle64.v v8, (a0)
426; CHECK-NEXT:    vfncvt.f.x.w v9, v8
427; CHECK-NEXT:    vsetvli zero, zero, e16, mf4, ta, ma
428; CHECK-NEXT:    vfncvtbf16.f.f.w v8, v9
429; CHECK-NEXT:    vse16.v v8, (a1)
430; CHECK-NEXT:    ret
431  %a = load <2 x i64>, ptr %x
432  %d = sitofp <2 x i64> %a to <2 x bfloat>
433  store <2 x bfloat> %d, ptr %y
434  ret void
435}
436
437define void @ui2fp_v2i64_v2bf16(ptr %x, ptr %y) {
438; CHECK-LABEL: ui2fp_v2i64_v2bf16:
439; CHECK:       # %bb.0:
440; CHECK-NEXT:    vsetivli zero, 2, e32, mf2, ta, ma
441; CHECK-NEXT:    vle64.v v8, (a0)
442; CHECK-NEXT:    vfncvt.f.xu.w v9, v8
443; CHECK-NEXT:    vsetvli zero, zero, e16, mf4, ta, ma
444; CHECK-NEXT:    vfncvtbf16.f.f.w v8, v9
445; CHECK-NEXT:    vse16.v v8, (a1)
446; CHECK-NEXT:    ret
447  %a = load <2 x i64>, ptr %x
448  %d = uitofp <2 x i64> %a to <2 x bfloat>
449  store <2 x bfloat> %d, ptr %y
450  ret void
451}
452
453define <2 x bfloat> @si2fp_v2i1_v2bf16(<2 x i1> %x) {
454; CHECK-LABEL: si2fp_v2i1_v2bf16:
455; CHECK:       # %bb.0:
456; CHECK-NEXT:    vsetivli zero, 2, e16, mf4, ta, ma
457; CHECK-NEXT:    vmv.v.i v8, 0
458; CHECK-NEXT:    vmerge.vim v8, v8, -1, v0
459; CHECK-NEXT:    vfwcvt.f.x.v v9, v8
460; CHECK-NEXT:    vfncvtbf16.f.f.w v8, v9
461; CHECK-NEXT:    ret
462  %z = sitofp <2 x i1> %x to <2 x bfloat>
463  ret <2 x bfloat> %z
464}
465
466define <2 x bfloat> @ui2fp_v2i1_v2bf16(<2 x i1> %x) {
467; CHECK-LABEL: ui2fp_v2i1_v2bf16:
468; CHECK:       # %bb.0:
469; CHECK-NEXT:    vsetivli zero, 2, e16, mf4, ta, ma
470; CHECK-NEXT:    vmv.v.i v8, 0
471; CHECK-NEXT:    vmerge.vim v8, v8, 1, v0
472; CHECK-NEXT:    vfwcvt.f.xu.v v9, v8
473; CHECK-NEXT:    vfncvtbf16.f.f.w v8, v9
474; CHECK-NEXT:    ret
475  %z = uitofp <2 x i1> %x to <2 x bfloat>
476  ret <2 x bfloat> %z
477}
478
479define void @si2fp_v8i64_v8bf16(ptr %x, ptr %y) {
480; CHECK-LABEL: si2fp_v8i64_v8bf16:
481; CHECK:       # %bb.0:
482; CHECK-NEXT:    vsetivli zero, 8, e32, m2, ta, ma
483; CHECK-NEXT:    vle64.v v8, (a0)
484; CHECK-NEXT:    vfncvt.f.x.w v12, v8
485; CHECK-NEXT:    vsetvli zero, zero, e16, m1, ta, ma
486; CHECK-NEXT:    vfncvtbf16.f.f.w v8, v12
487; CHECK-NEXT:    vse16.v v8, (a1)
488; CHECK-NEXT:    ret
489  %a = load <8 x i64>, ptr %x
490  %d = sitofp <8 x i64> %a to <8 x bfloat>
491  store <8 x bfloat> %d, ptr %y
492  ret void
493}
494
495define void @ui2fp_v8i64_v8bf16(ptr %x, ptr %y) {
496; CHECK-LABEL: ui2fp_v8i64_v8bf16:
497; CHECK:       # %bb.0:
498; CHECK-NEXT:    vsetivli zero, 8, e32, m2, ta, ma
499; CHECK-NEXT:    vle64.v v8, (a0)
500; CHECK-NEXT:    vfncvt.f.xu.w v12, v8
501; CHECK-NEXT:    vsetvli zero, zero, e16, m1, ta, ma
502; CHECK-NEXT:    vfncvtbf16.f.f.w v8, v12
503; CHECK-NEXT:    vse16.v v8, (a1)
504; CHECK-NEXT:    ret
505  %a = load <8 x i64>, ptr %x
506  %d = uitofp <8 x i64> %a to <8 x bfloat>
507  store <8 x bfloat> %d, ptr %y
508  ret void
509}
510
511define <8 x bfloat> @si2fp_v8i1_v8bf16(<8 x i1> %x) {
512; CHECK-LABEL: si2fp_v8i1_v8bf16:
513; CHECK:       # %bb.0:
514; CHECK-NEXT:    vsetivli zero, 8, e16, m1, ta, ma
515; CHECK-NEXT:    vmv.v.i v8, 0
516; CHECK-NEXT:    vmerge.vim v8, v8, -1, v0
517; CHECK-NEXT:    vfwcvt.f.x.v v10, v8
518; CHECK-NEXT:    vfncvtbf16.f.f.w v8, v10
519; CHECK-NEXT:    ret
520  %z = sitofp <8 x i1> %x to <8 x bfloat>
521  ret <8 x bfloat> %z
522}
523
524define <8 x bfloat> @ui2fp_v8i1_v8bf16(<8 x i1> %x) {
525; CHECK-LABEL: ui2fp_v8i1_v8bf16:
526; CHECK:       # %bb.0:
527; CHECK-NEXT:    vsetivli zero, 8, e16, m1, ta, ma
528; CHECK-NEXT:    vmv.v.i v8, 0
529; CHECK-NEXT:    vmerge.vim v8, v8, 1, v0
530; CHECK-NEXT:    vfwcvt.f.xu.v v10, v8
531; CHECK-NEXT:    vfncvtbf16.f.f.w v8, v10
532; CHECK-NEXT:    ret
533  %z = uitofp <8 x i1> %x to <8 x bfloat>
534  ret <8 x bfloat> %z
535}
536
537define void @si2fp_v2i64_v2f16(ptr %x, ptr %y) {
538; CHECK-LABEL: si2fp_v2i64_v2f16:
539; CHECK:       # %bb.0:
540; CHECK-NEXT:    vsetivli zero, 2, e32, mf2, ta, ma
541; CHECK-NEXT:    vle64.v v8, (a0)
542; CHECK-NEXT:    vfncvt.f.x.w v9, v8
543; CHECK-NEXT:    vsetvli zero, zero, e16, mf4, ta, ma
544; CHECK-NEXT:    vfncvt.f.f.w v8, v9
545; CHECK-NEXT:    vse16.v v8, (a1)
546; CHECK-NEXT:    ret
547  %a = load <2 x i64>, ptr %x
548  %d = sitofp <2 x i64> %a to <2 x half>
549  store <2 x half> %d, ptr %y
550  ret void
551}
552
553define void @ui2fp_v2i64_v2f16(ptr %x, ptr %y) {
554; CHECK-LABEL: ui2fp_v2i64_v2f16:
555; CHECK:       # %bb.0:
556; CHECK-NEXT:    vsetivli zero, 2, e32, mf2, ta, ma
557; CHECK-NEXT:    vle64.v v8, (a0)
558; CHECK-NEXT:    vfncvt.f.xu.w v9, v8
559; CHECK-NEXT:    vsetvli zero, zero, e16, mf4, ta, ma
560; CHECK-NEXT:    vfncvt.f.f.w v8, v9
561; CHECK-NEXT:    vse16.v v8, (a1)
562; CHECK-NEXT:    ret
563  %a = load <2 x i64>, ptr %x
564  %d = uitofp <2 x i64> %a to <2 x half>
565  store <2 x half> %d, ptr %y
566  ret void
567}
568
569define <2 x half> @si2fp_v2i1_v2f16(<2 x i1> %x) {
570; ZVFH-LABEL: si2fp_v2i1_v2f16:
571; ZVFH:       # %bb.0:
572; ZVFH-NEXT:    vsetivli zero, 2, e8, mf8, ta, ma
573; ZVFH-NEXT:    vmv.v.i v8, 0
574; ZVFH-NEXT:    vmerge.vim v9, v8, -1, v0
575; ZVFH-NEXT:    vfwcvt.f.x.v v8, v9
576; ZVFH-NEXT:    ret
577;
578; ZVFHMIN-LABEL: si2fp_v2i1_v2f16:
579; ZVFHMIN:       # %bb.0:
580; ZVFHMIN-NEXT:    vsetivli zero, 2, e16, mf4, ta, ma
581; ZVFHMIN-NEXT:    vmv.v.i v8, 0
582; ZVFHMIN-NEXT:    vmerge.vim v8, v8, -1, v0
583; ZVFHMIN-NEXT:    vfwcvt.f.x.v v9, v8
584; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v9
585; ZVFHMIN-NEXT:    ret
586  %z = sitofp <2 x i1> %x to <2 x half>
587  ret <2 x half> %z
588}
589
590define <2 x half> @ui2fp_v2i1_v2f16(<2 x i1> %x) {
591; ZVFH-LABEL: ui2fp_v2i1_v2f16:
592; ZVFH:       # %bb.0:
593; ZVFH-NEXT:    vsetivli zero, 2, e8, mf8, ta, ma
594; ZVFH-NEXT:    vmv.v.i v8, 0
595; ZVFH-NEXT:    vmerge.vim v9, v8, 1, v0
596; ZVFH-NEXT:    vfwcvt.f.xu.v v8, v9
597; ZVFH-NEXT:    ret
598;
599; ZVFHMIN-LABEL: ui2fp_v2i1_v2f16:
600; ZVFHMIN:       # %bb.0:
601; ZVFHMIN-NEXT:    vsetivli zero, 2, e16, mf4, ta, ma
602; ZVFHMIN-NEXT:    vmv.v.i v8, 0
603; ZVFHMIN-NEXT:    vmerge.vim v8, v8, 1, v0
604; ZVFHMIN-NEXT:    vfwcvt.f.xu.v v9, v8
605; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v9
606; ZVFHMIN-NEXT:    ret
607  %z = uitofp <2 x i1> %x to <2 x half>
608  ret <2 x half> %z
609}
610
611define void @si2fp_v8i64_v8f16(ptr %x, ptr %y) {
612; CHECK-LABEL: si2fp_v8i64_v8f16:
613; CHECK:       # %bb.0:
614; CHECK-NEXT:    vsetivli zero, 8, e32, m2, ta, ma
615; CHECK-NEXT:    vle64.v v8, (a0)
616; CHECK-NEXT:    vfncvt.f.x.w v12, v8
617; CHECK-NEXT:    vsetvli zero, zero, e16, m1, ta, ma
618; CHECK-NEXT:    vfncvt.f.f.w v8, v12
619; CHECK-NEXT:    vse16.v v8, (a1)
620; CHECK-NEXT:    ret
621  %a = load <8 x i64>, ptr %x
622  %d = sitofp <8 x i64> %a to <8 x half>
623  store <8 x half> %d, ptr %y
624  ret void
625}
626
627define void @ui2fp_v8i64_v8f16(ptr %x, ptr %y) {
628; CHECK-LABEL: ui2fp_v8i64_v8f16:
629; CHECK:       # %bb.0:
630; CHECK-NEXT:    vsetivli zero, 8, e32, m2, ta, ma
631; CHECK-NEXT:    vle64.v v8, (a0)
632; CHECK-NEXT:    vfncvt.f.xu.w v12, v8
633; CHECK-NEXT:    vsetvli zero, zero, e16, m1, ta, ma
634; CHECK-NEXT:    vfncvt.f.f.w v8, v12
635; CHECK-NEXT:    vse16.v v8, (a1)
636; CHECK-NEXT:    ret
637  %a = load <8 x i64>, ptr %x
638  %d = uitofp <8 x i64> %a to <8 x half>
639  store <8 x half> %d, ptr %y
640  ret void
641}
642
643define <8 x half> @si2fp_v8i1_v8f16(<8 x i1> %x) {
644; ZVFH-LABEL: si2fp_v8i1_v8f16:
645; ZVFH:       # %bb.0:
646; ZVFH-NEXT:    vsetivli zero, 8, e8, mf2, ta, ma
647; ZVFH-NEXT:    vmv.v.i v8, 0
648; ZVFH-NEXT:    vmerge.vim v9, v8, -1, v0
649; ZVFH-NEXT:    vfwcvt.f.x.v v8, v9
650; ZVFH-NEXT:    ret
651;
652; ZVFHMIN-LABEL: si2fp_v8i1_v8f16:
653; ZVFHMIN:       # %bb.0:
654; ZVFHMIN-NEXT:    vsetivli zero, 8, e16, m1, ta, ma
655; ZVFHMIN-NEXT:    vmv.v.i v8, 0
656; ZVFHMIN-NEXT:    vmerge.vim v8, v8, -1, v0
657; ZVFHMIN-NEXT:    vfwcvt.f.x.v v10, v8
658; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v10
659; ZVFHMIN-NEXT:    ret
660  %z = sitofp <8 x i1> %x to <8 x half>
661  ret <8 x half> %z
662}
663
664define <8 x half> @ui2fp_v8i1_v8f16(<8 x i1> %x) {
665; ZVFH-LABEL: ui2fp_v8i1_v8f16:
666; ZVFH:       # %bb.0:
667; ZVFH-NEXT:    vsetivli zero, 8, e8, mf2, ta, ma
668; ZVFH-NEXT:    vmv.v.i v8, 0
669; ZVFH-NEXT:    vmerge.vim v9, v8, 1, v0
670; ZVFH-NEXT:    vfwcvt.f.xu.v v8, v9
671; ZVFH-NEXT:    ret
672;
673; ZVFHMIN-LABEL: ui2fp_v8i1_v8f16:
674; ZVFHMIN:       # %bb.0:
675; ZVFHMIN-NEXT:    vsetivli zero, 8, e16, m1, ta, ma
676; ZVFHMIN-NEXT:    vmv.v.i v8, 0
677; ZVFHMIN-NEXT:    vmerge.vim v8, v8, 1, v0
678; ZVFHMIN-NEXT:    vfwcvt.f.xu.v v10, v8
679; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v10
680; ZVFHMIN-NEXT:    ret
681  %z = uitofp <8 x i1> %x to <8 x half>
682  ret <8 x half> %z
683}
684