1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=riscv32 -target-abi=ilp32d -mattr=+v,+zfh,+zvfh,+f,+d -verify-machineinstrs < %s | FileCheck %s 3; RUN: llc -mtriple=riscv64 -target-abi=lp64d -mattr=+v,+zfh,+zvfh,+f,+d -verify-machineinstrs < %s | FileCheck %s 4 5define void @gather_const_v8f16(ptr %x) { 6; CHECK-LABEL: gather_const_v8f16: 7; CHECK: # %bb.0: 8; CHECK-NEXT: flh fa5, 10(a0) 9; CHECK-NEXT: vsetivli zero, 8, e16, m1, ta, ma 10; CHECK-NEXT: vfmv.v.f v8, fa5 11; CHECK-NEXT: vse16.v v8, (a0) 12; CHECK-NEXT: ret 13 %a = load <8 x half>, ptr %x 14 %b = extractelement <8 x half> %a, i32 5 15 %c = insertelement <8 x half> poison, half %b, i32 0 16 %d = shufflevector <8 x half> %c, <8 x half> poison, <8 x i32> zeroinitializer 17 store <8 x half> %d, ptr %x 18 ret void 19} 20 21define void @gather_const_v4f32(ptr %x) { 22; CHECK-LABEL: gather_const_v4f32: 23; CHECK: # %bb.0: 24; CHECK-NEXT: flw fa5, 8(a0) 25; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, ma 26; CHECK-NEXT: vfmv.v.f v8, fa5 27; CHECK-NEXT: vse32.v v8, (a0) 28; CHECK-NEXT: ret 29 %a = load <4 x float>, ptr %x 30 %b = extractelement <4 x float> %a, i32 2 31 %c = insertelement <4 x float> poison, float %b, i32 0 32 %d = shufflevector <4 x float> %c, <4 x float> poison, <4 x i32> zeroinitializer 33 store <4 x float> %d, ptr %x 34 ret void 35} 36 37define void @gather_const_v2f64(ptr %x) { 38; CHECK-LABEL: gather_const_v2f64: 39; CHECK: # %bb.0: 40; CHECK-NEXT: fld fa5, 0(a0) 41; CHECK-NEXT: vsetivli zero, 2, e64, m1, ta, ma 42; CHECK-NEXT: vfmv.v.f v8, fa5 43; CHECK-NEXT: vse64.v v8, (a0) 44; CHECK-NEXT: ret 45 %a = load <2 x double>, ptr %x 46 %b = extractelement <2 x double> %a, i32 0 47 %c = insertelement <2 x double> poison, double %b, i32 0 48 %d = shufflevector <2 x double> %c, <2 x double> poison, <2 x i32> zeroinitializer 49 store <2 x double> %d, ptr %x 50 ret void 51} 52 53define void @gather_const_v64f16(ptr %x) { 54; CHECK-LABEL: gather_const_v64f16: 55; CHECK: # %bb.0: 56; CHECK-NEXT: flh fa5, 94(a0) 57; CHECK-NEXT: li a1, 64 58; CHECK-NEXT: vsetvli zero, a1, e16, m8, ta, ma 59; CHECK-NEXT: vfmv.v.f v8, fa5 60; CHECK-NEXT: vse16.v v8, (a0) 61; CHECK-NEXT: ret 62 %a = load <64 x half>, ptr %x 63 %b = extractelement <64 x half> %a, i32 47 64 %c = insertelement <64 x half> poison, half %b, i32 0 65 %d = shufflevector <64 x half> %c, <64 x half> poison, <64 x i32> zeroinitializer 66 store <64 x half> %d, ptr %x 67 ret void 68} 69 70define void @gather_const_v32f32(ptr %x) { 71; CHECK-LABEL: gather_const_v32f32: 72; CHECK: # %bb.0: 73; CHECK-NEXT: flw fa5, 68(a0) 74; CHECK-NEXT: li a1, 32 75; CHECK-NEXT: vsetvli zero, a1, e32, m8, ta, ma 76; CHECK-NEXT: vfmv.v.f v8, fa5 77; CHECK-NEXT: vse32.v v8, (a0) 78; CHECK-NEXT: ret 79 %a = load <32 x float>, ptr %x 80 %b = extractelement <32 x float> %a, i32 17 81 %c = insertelement <32 x float> poison, float %b, i32 0 82 %d = shufflevector <32 x float> %c, <32 x float> poison, <32 x i32> zeroinitializer 83 store <32 x float> %d, ptr %x 84 ret void 85} 86 87define void @gather_const_v16f64(ptr %x) { 88; CHECK-LABEL: gather_const_v16f64: 89; CHECK: # %bb.0: 90; CHECK-NEXT: fld fa5, 80(a0) 91; CHECK-NEXT: vsetivli zero, 16, e64, m8, ta, ma 92; CHECK-NEXT: vfmv.v.f v8, fa5 93; CHECK-NEXT: vse64.v v8, (a0) 94; CHECK-NEXT: ret 95 %a = load <16 x double>, ptr %x 96 %b = extractelement <16 x double> %a, i32 10 97 %c = insertelement <16 x double> poison, double %b, i32 0 98 %d = shufflevector <16 x double> %c, <16 x double> poison, <16 x i32> zeroinitializer 99 store <16 x double> %d, ptr %x 100 ret void 101} 102