xref: /llvm-project/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bitcast-large-vector.ll (revision 74f985b793bf4005e49736f8c2cef8b5cbf7c1ab)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=riscv64 -mattr=+v,+zvl256b -verify-machineinstrs < %s | FileCheck %s --check-prefix=VLEN256
3; RUN: llc -mtriple=riscv64 -mattr=+v,+zvl512b -verify-machineinstrs < %s | FileCheck %s --check-prefix=VLEN512
4; RUN: llc -mtriple=riscv64 -mattr=+v,+zvl1024b -verify-machineinstrs < %s | FileCheck %s --check-prefix=VLEN1024
5
6define <512 x i8> @bitcast_1024B(<256 x i16> %a, <512 x i8> %b) {
7; VLEN256-LABEL: bitcast_1024B:
8; VLEN256:       # %bb.0:
9; VLEN256-NEXT:    addi a1, a0, 256
10; VLEN256-NEXT:    li a2, 256
11; VLEN256-NEXT:    vsetvli zero, a2, e8, m8, ta, ma
12; VLEN256-NEXT:    vle8.v v24, (a0)
13; VLEN256-NEXT:    vle8.v v0, (a1)
14; VLEN256-NEXT:    vadd.vv v8, v24, v8
15; VLEN256-NEXT:    vadd.vv v16, v0, v16
16; VLEN256-NEXT:    ret
17;
18; VLEN512-LABEL: bitcast_1024B:
19; VLEN512:       # %bb.0:
20; VLEN512-NEXT:    li a0, 512
21; VLEN512-NEXT:    vsetvli zero, a0, e8, m8, ta, ma
22; VLEN512-NEXT:    vadd.vv v8, v16, v8
23; VLEN512-NEXT:    ret
24;
25; VLEN1024-LABEL: bitcast_1024B:
26; VLEN1024:       # %bb.0:
27; VLEN1024-NEXT:    li a0, 512
28; VLEN1024-NEXT:    vsetvli zero, a0, e8, m4, ta, ma
29; VLEN1024-NEXT:    vadd.vv v8, v12, v8
30; VLEN1024-NEXT:    ret
31  %c = bitcast <256 x i16> %a to <512 x i8>
32  %v = add <512 x i8> %b, %c
33  ret <512 x i8> %v
34}
35