1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=riscv64 -mattr=+v -verify-machineinstrs < %s | FileCheck %s 3 4target datalayout = "e-m:e-p:64:64-i64:64-i128:128-n64-S128" 5target triple = "riscv64-unknown-unknown-elf" 6 7define dso_local <16 x i16> @interleave(<8 x i16> %v0, <8 x i16> %v1) { 8; CHECK-LABEL: interleave: 9; CHECK: # %bb.0: # %entry 10; CHECK-NEXT: vsetivli zero, 8, e16, m1, ta, ma 11; CHECK-NEXT: vwaddu.vv v10, v8, v9 12; CHECK-NEXT: li a0, -1 13; CHECK-NEXT: vwmaccu.vx v10, a0, v9 14; CHECK-NEXT: vmv2r.v v8, v10 15; CHECK-NEXT: ret 16entry: 17 %v2 = shufflevector <8 x i16> %v0, <8 x i16> poison, <16 x i32> <i32 0, i32 undef, i32 1, i32 undef, i32 2, i32 undef, i32 3, i32 undef, i32 4, i32 undef, i32 5, i32 undef, i32 6, i32 undef, i32 7, i32 undef> 18 %v3 = shufflevector <8 x i16> %v1, <8 x i16> poison, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef> 19 %v4 = shufflevector <16 x i16> %v2, <16 x i16> %v3, <16 x i32> <i32 0, i32 16, i32 2, i32 17, i32 4, i32 18, i32 6, i32 19, i32 8, i32 20, i32 10, i32 21, i32 12, i32 22, i32 14, i32 23> 20 ret <16 x i16> %v4 21} 22