xref: /llvm-project/llvm/test/CodeGen/RISCV/rv64zksed-intrinsic.ll (revision a64b3e92c7cb0dd474e0ecbdb9fb86c29487451f)
1615d71d9SWu Xinlong; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2615d71d9SWu Xinlong; RUN: llc -mtriple=riscv64 -mattr=+zksed -verify-machineinstrs < %s \
3615d71d9SWu Xinlong; RUN:   | FileCheck %s -check-prefix=RV64ZKSED
4615d71d9SWu Xinlong
5*a64b3e92SCraig Topperdeclare i32 @llvm.riscv.sm4ks(i32, i32, i32);
6615d71d9SWu Xinlong
7*a64b3e92SCraig Topperdefine signext i32 @sm4ks_i32(i32 signext %a, i32 signext %b) nounwind {
8*a64b3e92SCraig Topper; RV64ZKSED-LABEL: sm4ks_i32:
9615d71d9SWu Xinlong; RV64ZKSED:       # %bb.0:
10*a64b3e92SCraig Topper; RV64ZKSED-NEXT:    sm4ks a0, a0, a1, 2
11615d71d9SWu Xinlong; RV64ZKSED-NEXT:    ret
12*a64b3e92SCraig Topper  %val = call i32 @llvm.riscv.sm4ks(i32 %a, i32 %b, i32 2)
13*a64b3e92SCraig Topper  ret i32 %val
14615d71d9SWu Xinlong}
15615d71d9SWu Xinlong
16*a64b3e92SCraig Topperdeclare i32 @llvm.riscv.sm4ed(i32, i32, i32);
17615d71d9SWu Xinlong
18*a64b3e92SCraig Topperdefine signext i32 @sm4ed_i32(i32 signext %a, i32 signext %b) nounwind {
19*a64b3e92SCraig Topper; RV64ZKSED-LABEL: sm4ed_i32:
20615d71d9SWu Xinlong; RV64ZKSED:       # %bb.0:
21*a64b3e92SCraig Topper; RV64ZKSED-NEXT:    sm4ed a0, a0, a1, 3
22615d71d9SWu Xinlong; RV64ZKSED-NEXT:    ret
23*a64b3e92SCraig Topper  %val = call i32 @llvm.riscv.sm4ed(i32 %a, i32 %b, i32 3)
24*a64b3e92SCraig Topper  ret i32 %val
25615d71d9SWu Xinlong}
26