1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=riscv64 -mattr=+zksed -verify-machineinstrs < %s \ 3; RUN: | FileCheck %s -check-prefix=RV64ZKSED 4 5declare i32 @llvm.riscv.sm4ks(i32, i32, i32); 6 7define signext i32 @sm4ks_i32(i32 signext %a, i32 signext %b) nounwind { 8; RV64ZKSED-LABEL: sm4ks_i32: 9; RV64ZKSED: # %bb.0: 10; RV64ZKSED-NEXT: sm4ks a0, a0, a1, 2 11; RV64ZKSED-NEXT: ret 12 %val = call i32 @llvm.riscv.sm4ks(i32 %a, i32 %b, i32 2) 13 ret i32 %val 14} 15 16declare i32 @llvm.riscv.sm4ed(i32, i32, i32); 17 18define signext i32 @sm4ed_i32(i32 signext %a, i32 signext %b) nounwind { 19; RV64ZKSED-LABEL: sm4ed_i32: 20; RV64ZKSED: # %bb.0: 21; RV64ZKSED-NEXT: sm4ed a0, a0, a1, 3 22; RV64ZKSED-NEXT: ret 23 %val = call i32 @llvm.riscv.sm4ed(i32 %a, i32 %b, i32 3) 24 ret i32 %val 25} 26