1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=riscv64 -mattr=+m -verify-machineinstrs < %s | FileCheck %s 3 4define signext i32 @addw(i32 signext %s, i32 signext %n, i32 signext %k) nounwind { 5; CHECK-LABEL: addw: 6; CHECK: # %bb.0: # %entry 7; CHECK-NEXT: bge a0, a1, .LBB0_2 8; CHECK-NEXT: # %bb.1: # %for.body.preheader 9; CHECK-NEXT: not a2, a0 10; CHECK-NEXT: addi a3, a0, 1 11; CHECK-NEXT: add a2, a2, a1 12; CHECK-NEXT: subw a1, a1, a0 13; CHECK-NEXT: addi a1, a1, -2 14; CHECK-NEXT: mul a3, a2, a3 15; CHECK-NEXT: slli a1, a1, 32 16; CHECK-NEXT: slli a2, a2, 32 17; CHECK-NEXT: mulhu a1, a2, a1 18; CHECK-NEXT: srli a1, a1, 1 19; CHECK-NEXT: add a0, a3, a0 20; CHECK-NEXT: addw a0, a0, a1 21; CHECK-NEXT: ret 22; CHECK-NEXT: .LBB0_2: 23; CHECK-NEXT: li a0, 0 24; CHECK-NEXT: ret 25entry: 26 %cmp6 = icmp slt i32 %s, %n 27 br i1 %cmp6, label %for.body.preheader, label %for.cond.cleanup 28 29for.body.preheader: ; preds = %entry 30 %0 = xor i32 %s, -1 31 %1 = add i32 %0, %n 32 %2 = add i32 %s, 1 33 %3 = mul i32 %1, %2 34 %4 = zext i32 %1 to i33 35 %5 = add i32 %n, -2 36 %6 = sub i32 %5, %s 37 %7 = zext i32 %6 to i33 38 %8 = mul i33 %4, %7 39 %9 = lshr i33 %8, 1 40 %10 = trunc i33 %9 to i32 41 %11 = add i32 %3, %s 42 %12 = add i32 %11, %10 43 br label %for.cond.cleanup 44 45for.cond.cleanup: ; preds = %for.body.preheader, %entry 46 %sum.0.lcssa = phi i32 [ 0, %entry ], [ %12, %for.body.preheader ] 47 ret i32 %sum.0.lcssa 48} 49 50define signext i32 @subw(i32 signext %s, i32 signext %n, i32 signext %k) nounwind { 51; CHECK-LABEL: subw: 52; CHECK: # %bb.0: # %entry 53; CHECK-NEXT: bge a0, a1, .LBB1_2 54; CHECK-NEXT: # %bb.1: # %for.body.preheader 55; CHECK-NEXT: not a2, a0 56; CHECK-NEXT: subw a3, a1, a0 57; CHECK-NEXT: add a1, a2, a1 58; CHECK-NEXT: addi a3, a3, -2 59; CHECK-NEXT: mul a2, a1, a2 60; CHECK-NEXT: slli a3, a3, 32 61; CHECK-NEXT: slli a1, a1, 32 62; CHECK-NEXT: mulhu a1, a1, a3 63; CHECK-NEXT: srli a1, a1, 1 64; CHECK-NEXT: subw a0, a2, a0 65; CHECK-NEXT: subw a0, a0, a1 66; CHECK-NEXT: ret 67; CHECK-NEXT: .LBB1_2: 68; CHECK-NEXT: li a0, 0 69; CHECK-NEXT: ret 70entry: 71 %cmp6 = icmp slt i32 %s, %n 72 br i1 %cmp6, label %for.body.preheader, label %for.cond.cleanup 73 74for.body.preheader: ; preds = %entry 75 %0 = xor i32 %s, -1 76 %1 = add i32 %0, %n 77 %2 = xor i32 %s, -1 78 %3 = mul i32 %1, %2 79 %4 = zext i32 %1 to i33 80 %5 = add i32 %n, -2 81 %6 = sub i32 %5, %s 82 %7 = zext i32 %6 to i33 83 %8 = mul i33 %4, %7 84 %9 = lshr i33 %8, 1 85 %10 = trunc i33 %9 to i32 86 %11 = sub i32 %3, %s 87 %12 = sub i32 %11, %10 88 br label %for.cond.cleanup 89 90for.cond.cleanup: ; preds = %for.body.preheader, %entry 91 %sum.0.lcssa = phi i32 [ 0, %entry ], [ %12, %for.body.preheader ] 92 ret i32 %sum.0.lcssa 93} 94