xref: /llvm-project/llvm/test/CodeGen/RISCV/rv32zksed-intrinsic-autoupgrade.ll (revision 2f2af2d01763374ed55f5fb598e5005c1b9af957)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=riscv32 -mattr=+zksed -verify-machineinstrs < %s \
3; RUN:   | FileCheck %s -check-prefix=RV32ZKSED
4
5declare i32 @llvm.riscv.sm4ks.i32(i32, i32, i8);
6
7define i32 @sm4ks_i32(i32 %a, i32 %b) nounwind {
8; RV32ZKSED-LABEL: sm4ks_i32:
9; RV32ZKSED:       # %bb.0:
10; RV32ZKSED-NEXT:    sm4ks a0, a0, a1, 2
11; RV32ZKSED-NEXT:    ret
12  %val = call i32 @llvm.riscv.sm4ks.i32(i32 %a, i32 %b, i8 2)
13  ret i32 %val
14}
15
16declare i32 @llvm.riscv.sm4ed.i32(i32, i32, i8);
17
18define i32 @sm4ed_i32(i32 %a, i32 %b) nounwind {
19; RV32ZKSED-LABEL: sm4ed_i32:
20; RV32ZKSED:       # %bb.0:
21; RV32ZKSED-NEXT:    sm4ed a0, a0, a1, 3
22; RV32ZKSED-NEXT:    ret
23  %val = call i32 @llvm.riscv.sm4ed.i32(i32 %a, i32 %b, i8 3)
24  ret i32 %val
25}
26