xref: /llvm-project/llvm/test/CodeGen/RISCV/rv32zknd-intrinsic.ll (revision 2f2af2d01763374ed55f5fb598e5005c1b9af957)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=riscv32 -mattr=+zknd -verify-machineinstrs < %s \
3; RUN:   | FileCheck %s -check-prefix=RV32ZKND
4
5declare i32 @llvm.riscv.aes32dsi(i32, i32, i32);
6
7define i32 @aes32dsi(i32 %a, i32 %b) nounwind {
8; RV32ZKND-LABEL: aes32dsi:
9; RV32ZKND:       # %bb.0:
10; RV32ZKND-NEXT:    aes32dsi a0, a0, a1, 0
11; RV32ZKND-NEXT:    ret
12    %val = call i32 @llvm.riscv.aes32dsi(i32 %a, i32 %b, i32 0)
13    ret i32 %val
14}
15
16declare i32 @llvm.riscv.aes32dsmi(i32, i32, i32);
17
18define i32 @aes32dsmi(i32 %a, i32 %b) nounwind {
19; RV32ZKND-LABEL: aes32dsmi:
20; RV32ZKND:       # %bb.0:
21; RV32ZKND-NEXT:    aes32dsmi a0, a0, a1, 1
22; RV32ZKND-NEXT:    ret
23    %val = call i32 @llvm.riscv.aes32dsmi(i32 %a, i32 %b, i32 1)
24    ret i32 %val
25}
26