1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=riscv32 -mattr=+zimop -verify-machineinstrs < %s \ 3; RUN: | FileCheck %s -check-prefix=RV32ZIMOP 4 5declare i32 @llvm.riscv.mopr.i32(i32 %a, i32 %b) 6 7define i32 @mopr0_32(i32 %a) nounwind { 8; RV32ZIMOP-LABEL: mopr0_32: 9; RV32ZIMOP: # %bb.0: 10; RV32ZIMOP-NEXT: mop.r.0 a0, a0 11; RV32ZIMOP-NEXT: ret 12 %tmp = call i32 @llvm.riscv.mopr.i32(i32 %a, i32 0) 13 ret i32 %tmp 14} 15 16define i32 @mopr31_32(i32 %a) nounwind { 17; RV32ZIMOP-LABEL: mopr31_32: 18; RV32ZIMOP: # %bb.0: 19; RV32ZIMOP-NEXT: mop.r.31 a0, a0 20; RV32ZIMOP-NEXT: ret 21 %tmp = call i32 @llvm.riscv.mopr.i32(i32 %a, i32 31) 22 ret i32 %tmp 23} 24 25declare i32 @llvm.riscv.moprr.i32(i32 %a, i32 %b, i32 %c) 26 27define i32 @moprr0_32(i32 %a, i32 %b) nounwind { 28; RV32ZIMOP-LABEL: moprr0_32: 29; RV32ZIMOP: # %bb.0: 30; RV32ZIMOP-NEXT: mop.rr.0 a0, a0, a1 31; RV32ZIMOP-NEXT: ret 32 %tmp = call i32 @llvm.riscv.moprr.i32(i32 %a, i32 %b, i32 0) 33 ret i32 %tmp 34} 35 36define i32 @moprr7_32(i32 %a, i32 %b) nounwind { 37; RV32ZIMOP-LABEL: moprr7_32: 38; RV32ZIMOP: # %bb.0: 39; RV32ZIMOP-NEXT: mop.rr.7 a0, a0, a1 40; RV32ZIMOP-NEXT: ret 41 %tmp = call i32 @llvm.riscv.moprr.i32(i32 %a, i32 %b, i32 7) 42 ret i32 %tmp 43} 44 45