12def1c44SPiyou Chen; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4 22def1c44SPiyou Chen; RUN: llc < %s -mtriple=riscv64 -mattr=+v | FileCheck %s 32def1c44SPiyou Chen 42def1c44SPiyou Chen 52def1c44SPiyou Chendefine signext i32 @sum(ptr %a, i32 signext %n, i1 %prof.min.iters.check, <vscale x 8 x i1> %0, <vscale x 8 x i1> %1) { 62def1c44SPiyou Chen; CHECK-LABEL: sum: 72def1c44SPiyou Chen; CHECK: # %bb.0: # %entry 82def1c44SPiyou Chen; CHECK-NEXT: andi a2, a2, 1 92def1c44SPiyou Chen; CHECK-NEXT: beqz a2, .LBB0_4 102def1c44SPiyou Chen; CHECK-NEXT: # %bb.1: # %for.body.preheader 112def1c44SPiyou Chen; CHECK-NEXT: li a3, 0 122def1c44SPiyou Chen; CHECK-NEXT: .LBB0_2: # %for.body 132def1c44SPiyou Chen; CHECK-NEXT: # =>This Inner Loop Header: Depth=1 142def1c44SPiyou Chen; CHECK-NEXT: mv a2, a3 152def1c44SPiyou Chen; CHECK-NEXT: lw a3, 0(a0) 162def1c44SPiyou Chen; CHECK-NEXT: addi a0, a0, 4 172def1c44SPiyou Chen; CHECK-NEXT: bnez a1, .LBB0_2 182def1c44SPiyou Chen; CHECK-NEXT: # %bb.3: # %for.end 192def1c44SPiyou Chen; CHECK-NEXT: mv a0, a2 202def1c44SPiyou Chen; CHECK-NEXT: ret 212def1c44SPiyou Chen; CHECK-NEXT: .LBB0_4: # %vector.ph 22*12530015SPhilip Reames; CHECK-NEXT: vsetivli zero, 1, e32, m1, ta, ma 232def1c44SPiyou Chen; CHECK-NEXT: vmv.s.x v8, zero 242def1c44SPiyou Chen; CHECK-NEXT: vmv.v.i v12, 0 252def1c44SPiyou Chen; CHECK-NEXT: vsetivli zero, 1, e32, m4, ta, ma 262def1c44SPiyou Chen; CHECK-NEXT: vredsum.vs v8, v12, v8, v0.t 272def1c44SPiyou Chen; CHECK-NEXT: vmv.x.s a0, v8 282def1c44SPiyou Chen; CHECK-NEXT: ret 292def1c44SPiyou Chenentry: 302def1c44SPiyou Chen br i1 %prof.min.iters.check, label %for.body, label %vector.ph 312def1c44SPiyou Chen 322def1c44SPiyou Chenvector.ph: ; preds = %entry 332def1c44SPiyou Chen %2 = tail call i32 @llvm.vp.reduce.add.nxv8i32(i32 0, <vscale x 8 x i32> zeroinitializer, <vscale x 8 x i1> %0, i32 1) 342def1c44SPiyou Chen br label %for.end 352def1c44SPiyou Chen 362def1c44SPiyou Chenfor.body: ; preds = %for.body, %entry 372def1c44SPiyou Chen %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ] 382def1c44SPiyou Chen %red.05 = phi i32 [ %3, %for.body ], [ 0, %entry ] 392def1c44SPiyou Chen %arrayidx = getelementptr i32, ptr %a, i64 %indvars.iv 402def1c44SPiyou Chen %3 = load i32, ptr %arrayidx, align 4 412def1c44SPiyou Chen %indvars.iv.next = add i64 %indvars.iv, 1 422def1c44SPiyou Chen %exitcond.not = icmp eq i32 %n, 0 432def1c44SPiyou Chen br i1 %exitcond.not, label %for.end, label %for.body 442def1c44SPiyou Chen 452def1c44SPiyou Chenfor.end: ; preds = %for.body, %vector.ph 462def1c44SPiyou Chen %red.0.lcssa = phi i32 [ %2, %vector.ph ], [ %red.05, %for.body ] 472def1c44SPiyou Chen ret i32 %red.0.lcssa 482def1c44SPiyou Chen} 492def1c44SPiyou Chen 502def1c44SPiyou Chendeclare i32 @llvm.vp.reduce.add.nxv8i32(i32, <vscale x 8 x i32>, <vscale x 8 x i1>, i32) 51