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Revision tags: llvmorg-21-init, llvmorg-19.1.7, llvmorg-19.1.6, llvmorg-19.1.5, llvmorg-19.1.4, llvmorg-19.1.3, llvmorg-19.1.2, llvmorg-19.1.1, llvmorg-19.1.0 |
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| #
12530015 |
| 11-Sep-2024 |
Philip Reames <preames@rivosinc.com> |
[RISCV] Add reductions to list of roots in tryToReduceVL (#107595)
This allows us to reduce VLs feeding reduction instructions. In
particular, this means that <3 x Ty> reduce(load) like sequences n
[RISCV] Add reductions to list of roots in tryToReduceVL (#107595)
This allows us to reduce VLs feeding reduction instructions. In
particular, this means that <3 x Ty> reduce(load) like sequences no
longer require a VL toggle.
This was waiting on 3d72957; now that the latent correctness issue is
fixed, we can expand this transform.
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Revision tags: llvmorg-19.1.0-rc4 |
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| #
2def1c44 |
| 28-Aug-2024 |
Piyou Chen <piyou.chen@sifive.com> |
[RISCV][MCP] Remove redundant move from tail duplication (#89865)
Tail duplication will generate the redundant move before return. It is
because the MachineCopyPropogation can't recognize COPY aft
[RISCV][MCP] Remove redundant move from tail duplication (#89865)
Tail duplication will generate the redundant move before return. It is
because the MachineCopyPropogation can't recognize COPY after post-RA
pseudoExpand.
This patch make MachineCopyPropogation recognize `%0 = ADDI %1, 0` as
COPY
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