1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4 2; RUN: llc < %s -mtriple=riscv64 -mattr=+zbb | FileCheck %s 3 4define i32 @pr90730(i32 %x, i1 %y, ptr %p) { 5; CHECK-LABEL: pr90730: 6; CHECK: # %bb.0: # %entry 7; CHECK-NEXT: lui a1, 8 8; CHECK-NEXT: addiw a1, a1, -960 9; CHECK-NEXT: andn a0, a1, a0 10; CHECK-NEXT: sw zero, 0(a2) 11; CHECK-NEXT: ret 12entry: 13 %ext = zext i1 %y to i32 14 %xor1 = xor i32 %ext, 31817 15 %and1 = and i32 %xor1, %x 16 store i32 %and1, ptr %p, align 4 17 %v = load i32, ptr %p, align 4 18 %and2 = and i32 %v, 31808 19 %xor2 = xor i32 %and2, 31808 20 store i32 0, ptr %p, align 4 21 ret i32 %xor2 22} 23