18d7c865cSPiyou Chen; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2 2*f8087884SJianjian GUAN; RUN: llc -mtriple=riscv64 -mattr=+zihintntl,+f,+d,+zfh,+v < %s | FileCheck %s -check-prefix=CHECK-RV64V 3*f8087884SJianjian GUAN; RUN: llc -mtriple=riscv32 -mattr=+zihintntl,+f,+d,+zfh,+v < %s | FileCheck %s -check-prefix=CHECK-RV32V 48d7c865cSPiyou Chen 58d7c865cSPiyou Chendefine <vscale x 2 x i64> @test_nontemporal_load_nxv2i64(ptr %p) { 68d7c865cSPiyou Chen; CHECK-RV64V-LABEL: test_nontemporal_load_nxv2i64: 78d7c865cSPiyou Chen; CHECK-RV64V: # %bb.0: 88d7c865cSPiyou Chen; CHECK-RV64V-NEXT: ntl.all 98d7c865cSPiyou Chen; CHECK-RV64V-NEXT: vl2re64.v v8, (a0) 108d7c865cSPiyou Chen; CHECK-RV64V-NEXT: ret 118d7c865cSPiyou Chen; 128d7c865cSPiyou Chen; CHECK-RV32V-LABEL: test_nontemporal_load_nxv2i64: 138d7c865cSPiyou Chen; CHECK-RV32V: # %bb.0: 148d7c865cSPiyou Chen; CHECK-RV32V-NEXT: ntl.all 158d7c865cSPiyou Chen; CHECK-RV32V-NEXT: vl2re64.v v8, (a0) 168d7c865cSPiyou Chen; CHECK-RV32V-NEXT: ret 178d7c865cSPiyou Chen %1 = load <vscale x 2 x i64>, ptr %p, !nontemporal !0 188d7c865cSPiyou Chen ret <vscale x 2 x i64> %1 198d7c865cSPiyou Chen} 208d7c865cSPiyou Chen 218d7c865cSPiyou Chendefine <vscale x 4 x i32> @test_nontemporal_load_nxv4i32(ptr %p) { 228d7c865cSPiyou Chen; CHECK-RV64V-LABEL: test_nontemporal_load_nxv4i32: 238d7c865cSPiyou Chen; CHECK-RV64V: # %bb.0: 248d7c865cSPiyou Chen; CHECK-RV64V-NEXT: ntl.all 258d7c865cSPiyou Chen; CHECK-RV64V-NEXT: vl2re32.v v8, (a0) 268d7c865cSPiyou Chen; CHECK-RV64V-NEXT: ret 278d7c865cSPiyou Chen; 288d7c865cSPiyou Chen; CHECK-RV32V-LABEL: test_nontemporal_load_nxv4i32: 298d7c865cSPiyou Chen; CHECK-RV32V: # %bb.0: 308d7c865cSPiyou Chen; CHECK-RV32V-NEXT: ntl.all 318d7c865cSPiyou Chen; CHECK-RV32V-NEXT: vl2re32.v v8, (a0) 328d7c865cSPiyou Chen; CHECK-RV32V-NEXT: ret 338d7c865cSPiyou Chen %1 = load <vscale x 4 x i32>, ptr %p, !nontemporal !0 348d7c865cSPiyou Chen ret <vscale x 4 x i32> %1 358d7c865cSPiyou Chen} 368d7c865cSPiyou Chen 378d7c865cSPiyou Chendefine <vscale x 8 x i16> @test_nontemporal_load_nxv8i16(ptr %p) { 388d7c865cSPiyou Chen; CHECK-RV64V-LABEL: test_nontemporal_load_nxv8i16: 398d7c865cSPiyou Chen; CHECK-RV64V: # %bb.0: 408d7c865cSPiyou Chen; CHECK-RV64V-NEXT: ntl.all 418d7c865cSPiyou Chen; CHECK-RV64V-NEXT: vl2re16.v v8, (a0) 428d7c865cSPiyou Chen; CHECK-RV64V-NEXT: ret 438d7c865cSPiyou Chen; 448d7c865cSPiyou Chen; CHECK-RV32V-LABEL: test_nontemporal_load_nxv8i16: 458d7c865cSPiyou Chen; CHECK-RV32V: # %bb.0: 468d7c865cSPiyou Chen; CHECK-RV32V-NEXT: ntl.all 478d7c865cSPiyou Chen; CHECK-RV32V-NEXT: vl2re16.v v8, (a0) 488d7c865cSPiyou Chen; CHECK-RV32V-NEXT: ret 498d7c865cSPiyou Chen %1 = load <vscale x 8 x i16>, ptr %p, !nontemporal !0 508d7c865cSPiyou Chen ret <vscale x 8 x i16> %1 518d7c865cSPiyou Chen} 528d7c865cSPiyou Chen 538d7c865cSPiyou Chendefine <vscale x 16 x i8> @test_nontemporal_load_nxv16i8(ptr %p) { 548d7c865cSPiyou Chen; CHECK-RV64V-LABEL: test_nontemporal_load_nxv16i8: 558d7c865cSPiyou Chen; CHECK-RV64V: # %bb.0: 568d7c865cSPiyou Chen; CHECK-RV64V-NEXT: ntl.all 578d7c865cSPiyou Chen; CHECK-RV64V-NEXT: vl2r.v v8, (a0) 588d7c865cSPiyou Chen; CHECK-RV64V-NEXT: ret 598d7c865cSPiyou Chen; 608d7c865cSPiyou Chen; CHECK-RV32V-LABEL: test_nontemporal_load_nxv16i8: 618d7c865cSPiyou Chen; CHECK-RV32V: # %bb.0: 628d7c865cSPiyou Chen; CHECK-RV32V-NEXT: ntl.all 638d7c865cSPiyou Chen; CHECK-RV32V-NEXT: vl2r.v v8, (a0) 648d7c865cSPiyou Chen; CHECK-RV32V-NEXT: ret 658d7c865cSPiyou Chen %1 = load <vscale x 16 x i8>, ptr %p, !nontemporal !0 668d7c865cSPiyou Chen ret <vscale x 16 x i8> %1 678d7c865cSPiyou Chen} 688d7c865cSPiyou Chen 698d7c865cSPiyou Chendefine void @test_nontemporal_store_nxv2i64(ptr %p, <vscale x 2 x i64> %v) { 708d7c865cSPiyou Chen; CHECK-RV64V-LABEL: test_nontemporal_store_nxv2i64: 718d7c865cSPiyou Chen; CHECK-RV64V: # %bb.0: 728d7c865cSPiyou Chen; CHECK-RV64V-NEXT: ntl.all 738d7c865cSPiyou Chen; CHECK-RV64V-NEXT: vs2r.v v8, (a0) 748d7c865cSPiyou Chen; CHECK-RV64V-NEXT: ret 758d7c865cSPiyou Chen; 768d7c865cSPiyou Chen; CHECK-RV32V-LABEL: test_nontemporal_store_nxv2i64: 778d7c865cSPiyou Chen; CHECK-RV32V: # %bb.0: 788d7c865cSPiyou Chen; CHECK-RV32V-NEXT: ntl.all 798d7c865cSPiyou Chen; CHECK-RV32V-NEXT: vs2r.v v8, (a0) 808d7c865cSPiyou Chen; CHECK-RV32V-NEXT: ret 818d7c865cSPiyou Chen store <vscale x 2 x i64> %v, ptr %p, !nontemporal !0 828d7c865cSPiyou Chen ret void 838d7c865cSPiyou Chen} 848d7c865cSPiyou Chen 858d7c865cSPiyou Chendefine void @test_nontemporal_store_nxv4i32(ptr %p, <vscale x 4 x i32> %v) { 868d7c865cSPiyou Chen; CHECK-RV64V-LABEL: test_nontemporal_store_nxv4i32: 878d7c865cSPiyou Chen; CHECK-RV64V: # %bb.0: 888d7c865cSPiyou Chen; CHECK-RV64V-NEXT: ntl.all 898d7c865cSPiyou Chen; CHECK-RV64V-NEXT: vs2r.v v8, (a0) 908d7c865cSPiyou Chen; CHECK-RV64V-NEXT: ret 918d7c865cSPiyou Chen; 928d7c865cSPiyou Chen; CHECK-RV32V-LABEL: test_nontemporal_store_nxv4i32: 938d7c865cSPiyou Chen; CHECK-RV32V: # %bb.0: 948d7c865cSPiyou Chen; CHECK-RV32V-NEXT: ntl.all 958d7c865cSPiyou Chen; CHECK-RV32V-NEXT: vs2r.v v8, (a0) 968d7c865cSPiyou Chen; CHECK-RV32V-NEXT: ret 978d7c865cSPiyou Chen store <vscale x 4 x i32> %v, ptr %p, !nontemporal !0 988d7c865cSPiyou Chen ret void 998d7c865cSPiyou Chen} 1008d7c865cSPiyou Chen 1018d7c865cSPiyou Chendefine void @test_nontemporal_store_nxv8i16(ptr %p, <vscale x 8 x i16> %v) { 1028d7c865cSPiyou Chen; CHECK-RV64V-LABEL: test_nontemporal_store_nxv8i16: 1038d7c865cSPiyou Chen; CHECK-RV64V: # %bb.0: 1048d7c865cSPiyou Chen; CHECK-RV64V-NEXT: ntl.all 1058d7c865cSPiyou Chen; CHECK-RV64V-NEXT: vs2r.v v8, (a0) 1068d7c865cSPiyou Chen; CHECK-RV64V-NEXT: ret 1078d7c865cSPiyou Chen; 1088d7c865cSPiyou Chen; CHECK-RV32V-LABEL: test_nontemporal_store_nxv8i16: 1098d7c865cSPiyou Chen; CHECK-RV32V: # %bb.0: 1108d7c865cSPiyou Chen; CHECK-RV32V-NEXT: ntl.all 1118d7c865cSPiyou Chen; CHECK-RV32V-NEXT: vs2r.v v8, (a0) 1128d7c865cSPiyou Chen; CHECK-RV32V-NEXT: ret 1138d7c865cSPiyou Chen store <vscale x 8 x i16> %v, ptr %p, !nontemporal !0 1148d7c865cSPiyou Chen ret void 1158d7c865cSPiyou Chen} 1168d7c865cSPiyou Chen 1178d7c865cSPiyou Chendefine void @test_nontemporal_store_nxv16i8(ptr %p, <vscale x 16 x i8> %v) { 1188d7c865cSPiyou Chen; CHECK-RV64V-LABEL: test_nontemporal_store_nxv16i8: 1198d7c865cSPiyou Chen; CHECK-RV64V: # %bb.0: 1208d7c865cSPiyou Chen; CHECK-RV64V-NEXT: ntl.all 1218d7c865cSPiyou Chen; CHECK-RV64V-NEXT: vs2r.v v8, (a0) 1228d7c865cSPiyou Chen; CHECK-RV64V-NEXT: ret 1238d7c865cSPiyou Chen; 1248d7c865cSPiyou Chen; CHECK-RV32V-LABEL: test_nontemporal_store_nxv16i8: 1258d7c865cSPiyou Chen; CHECK-RV32V: # %bb.0: 1268d7c865cSPiyou Chen; CHECK-RV32V-NEXT: ntl.all 1278d7c865cSPiyou Chen; CHECK-RV32V-NEXT: vs2r.v v8, (a0) 1288d7c865cSPiyou Chen; CHECK-RV32V-NEXT: ret 1298d7c865cSPiyou Chen store <vscale x 16 x i8> %v, ptr %p, !nontemporal !0 1308d7c865cSPiyou Chen ret void 1318d7c865cSPiyou Chen} 1328d7c865cSPiyou Chen 1338a395051SPiyou Chendefine <vscale x 2 x i64> @test_nontemporal_P1_load_nxv2i64(ptr %p) { 1348a395051SPiyou Chen; CHECK-RV64V-LABEL: test_nontemporal_P1_load_nxv2i64: 1358a395051SPiyou Chen; CHECK-RV64V: # %bb.0: 1368a395051SPiyou Chen; CHECK-RV64V-NEXT: ntl.p1 1378a395051SPiyou Chen; CHECK-RV64V-NEXT: vl2re64.v v8, (a0) 1388a395051SPiyou Chen; CHECK-RV64V-NEXT: ret 1398a395051SPiyou Chen; 1408a395051SPiyou Chen; CHECK-RV32V-LABEL: test_nontemporal_P1_load_nxv2i64: 1418a395051SPiyou Chen; CHECK-RV32V: # %bb.0: 1428a395051SPiyou Chen; CHECK-RV32V-NEXT: ntl.p1 1438a395051SPiyou Chen; CHECK-RV32V-NEXT: vl2re64.v v8, (a0) 1448a395051SPiyou Chen; CHECK-RV32V-NEXT: ret 1458a395051SPiyou Chen %1 = load <vscale x 2 x i64>, ptr %p, !nontemporal !0, !riscv-nontemporal-domain !1 1468a395051SPiyou Chen ret <vscale x 2 x i64> %1 1478a395051SPiyou Chen} 1488a395051SPiyou Chen 1498a395051SPiyou Chendefine <vscale x 4 x i32> @test_nontemporal_P1_load_nxv4i32(ptr %p) { 1508a395051SPiyou Chen; CHECK-RV64V-LABEL: test_nontemporal_P1_load_nxv4i32: 1518a395051SPiyou Chen; CHECK-RV64V: # %bb.0: 1528a395051SPiyou Chen; CHECK-RV64V-NEXT: ntl.p1 1538a395051SPiyou Chen; CHECK-RV64V-NEXT: vl2re32.v v8, (a0) 1548a395051SPiyou Chen; CHECK-RV64V-NEXT: ret 1558a395051SPiyou Chen; 1568a395051SPiyou Chen; CHECK-RV32V-LABEL: test_nontemporal_P1_load_nxv4i32: 1578a395051SPiyou Chen; CHECK-RV32V: # %bb.0: 1588a395051SPiyou Chen; CHECK-RV32V-NEXT: ntl.p1 1598a395051SPiyou Chen; CHECK-RV32V-NEXT: vl2re32.v v8, (a0) 1608a395051SPiyou Chen; CHECK-RV32V-NEXT: ret 1618a395051SPiyou Chen %1 = load <vscale x 4 x i32>, ptr %p, !nontemporal !0, !riscv-nontemporal-domain !1 1628a395051SPiyou Chen ret <vscale x 4 x i32> %1 1638a395051SPiyou Chen} 1648a395051SPiyou Chen 1658a395051SPiyou Chendefine <vscale x 8 x i16> @test_nontemporal_P1_load_nxv8i16(ptr %p) { 1668a395051SPiyou Chen; CHECK-RV64V-LABEL: test_nontemporal_P1_load_nxv8i16: 1678a395051SPiyou Chen; CHECK-RV64V: # %bb.0: 1688a395051SPiyou Chen; CHECK-RV64V-NEXT: ntl.p1 1698a395051SPiyou Chen; CHECK-RV64V-NEXT: vl2re16.v v8, (a0) 1708a395051SPiyou Chen; CHECK-RV64V-NEXT: ret 1718a395051SPiyou Chen; 1728a395051SPiyou Chen; CHECK-RV32V-LABEL: test_nontemporal_P1_load_nxv8i16: 1738a395051SPiyou Chen; CHECK-RV32V: # %bb.0: 1748a395051SPiyou Chen; CHECK-RV32V-NEXT: ntl.p1 1758a395051SPiyou Chen; CHECK-RV32V-NEXT: vl2re16.v v8, (a0) 1768a395051SPiyou Chen; CHECK-RV32V-NEXT: ret 1778a395051SPiyou Chen %1 = load <vscale x 8 x i16>, ptr %p, !nontemporal !0, !riscv-nontemporal-domain !1 1788a395051SPiyou Chen ret <vscale x 8 x i16> %1 1798a395051SPiyou Chen} 1808a395051SPiyou Chen 1818a395051SPiyou Chendefine <vscale x 16 x i8> @test_nontemporal_P1_load_nxv16i8(ptr %p) { 1828a395051SPiyou Chen; CHECK-RV64V-LABEL: test_nontemporal_P1_load_nxv16i8: 1838a395051SPiyou Chen; CHECK-RV64V: # %bb.0: 1848a395051SPiyou Chen; CHECK-RV64V-NEXT: ntl.p1 1858a395051SPiyou Chen; CHECK-RV64V-NEXT: vl2r.v v8, (a0) 1868a395051SPiyou Chen; CHECK-RV64V-NEXT: ret 1878a395051SPiyou Chen; 1888a395051SPiyou Chen; CHECK-RV32V-LABEL: test_nontemporal_P1_load_nxv16i8: 1898a395051SPiyou Chen; CHECK-RV32V: # %bb.0: 1908a395051SPiyou Chen; CHECK-RV32V-NEXT: ntl.p1 1918a395051SPiyou Chen; CHECK-RV32V-NEXT: vl2r.v v8, (a0) 1928a395051SPiyou Chen; CHECK-RV32V-NEXT: ret 1938a395051SPiyou Chen %1 = load <vscale x 16 x i8>, ptr %p, !nontemporal !0, !riscv-nontemporal-domain !1 1948a395051SPiyou Chen ret <vscale x 16 x i8> %1 1958a395051SPiyou Chen} 1968a395051SPiyou Chen 1978a395051SPiyou Chendefine void @test_nontemporal_P1_store_nxv2i64(ptr %p, <vscale x 2 x i64> %v) { 1988a395051SPiyou Chen; CHECK-RV64V-LABEL: test_nontemporal_P1_store_nxv2i64: 1998a395051SPiyou Chen; CHECK-RV64V: # %bb.0: 2008a395051SPiyou Chen; CHECK-RV64V-NEXT: ntl.p1 2018a395051SPiyou Chen; CHECK-RV64V-NEXT: vs2r.v v8, (a0) 2028a395051SPiyou Chen; CHECK-RV64V-NEXT: ret 2038a395051SPiyou Chen; 2048a395051SPiyou Chen; CHECK-RV32V-LABEL: test_nontemporal_P1_store_nxv2i64: 2058a395051SPiyou Chen; CHECK-RV32V: # %bb.0: 2068a395051SPiyou Chen; CHECK-RV32V-NEXT: ntl.p1 2078a395051SPiyou Chen; CHECK-RV32V-NEXT: vs2r.v v8, (a0) 2088a395051SPiyou Chen; CHECK-RV32V-NEXT: ret 2098a395051SPiyou Chen store <vscale x 2 x i64> %v, ptr %p, !nontemporal !0, !riscv-nontemporal-domain !1 2108a395051SPiyou Chen ret void 2118a395051SPiyou Chen} 2128a395051SPiyou Chen 2138a395051SPiyou Chendefine void @test_nontemporal_P1_store_nxv4i32(ptr %p, <vscale x 4 x i32> %v) { 2148a395051SPiyou Chen; CHECK-RV64V-LABEL: test_nontemporal_P1_store_nxv4i32: 2158a395051SPiyou Chen; CHECK-RV64V: # %bb.0: 2168a395051SPiyou Chen; CHECK-RV64V-NEXT: ntl.p1 2178a395051SPiyou Chen; CHECK-RV64V-NEXT: vs2r.v v8, (a0) 2188a395051SPiyou Chen; CHECK-RV64V-NEXT: ret 2198a395051SPiyou Chen; 2208a395051SPiyou Chen; CHECK-RV32V-LABEL: test_nontemporal_P1_store_nxv4i32: 2218a395051SPiyou Chen; CHECK-RV32V: # %bb.0: 2228a395051SPiyou Chen; CHECK-RV32V-NEXT: ntl.p1 2238a395051SPiyou Chen; CHECK-RV32V-NEXT: vs2r.v v8, (a0) 2248a395051SPiyou Chen; CHECK-RV32V-NEXT: ret 2258a395051SPiyou Chen store <vscale x 4 x i32> %v, ptr %p, !nontemporal !0, !riscv-nontemporal-domain !1 2268a395051SPiyou Chen ret void 2278a395051SPiyou Chen} 2288a395051SPiyou Chen 2298a395051SPiyou Chendefine void @test_nontemporal_P1_store_nxv8i16(ptr %p, <vscale x 8 x i16> %v) { 2308a395051SPiyou Chen; CHECK-RV64V-LABEL: test_nontemporal_P1_store_nxv8i16: 2318a395051SPiyou Chen; CHECK-RV64V: # %bb.0: 2328a395051SPiyou Chen; CHECK-RV64V-NEXT: ntl.p1 2338a395051SPiyou Chen; CHECK-RV64V-NEXT: vs2r.v v8, (a0) 2348a395051SPiyou Chen; CHECK-RV64V-NEXT: ret 2358a395051SPiyou Chen; 2368a395051SPiyou Chen; CHECK-RV32V-LABEL: test_nontemporal_P1_store_nxv8i16: 2378a395051SPiyou Chen; CHECK-RV32V: # %bb.0: 2388a395051SPiyou Chen; CHECK-RV32V-NEXT: ntl.p1 2398a395051SPiyou Chen; CHECK-RV32V-NEXT: vs2r.v v8, (a0) 2408a395051SPiyou Chen; CHECK-RV32V-NEXT: ret 2418a395051SPiyou Chen store <vscale x 8 x i16> %v, ptr %p, !nontemporal !0, !riscv-nontemporal-domain !1 2428a395051SPiyou Chen ret void 2438a395051SPiyou Chen} 2448a395051SPiyou Chen 2458a395051SPiyou Chendefine void @test_nontemporal_P1_store_nxv16i8(ptr %p, <vscale x 16 x i8> %v) { 2468a395051SPiyou Chen; CHECK-RV64V-LABEL: test_nontemporal_P1_store_nxv16i8: 2478a395051SPiyou Chen; CHECK-RV64V: # %bb.0: 2488a395051SPiyou Chen; CHECK-RV64V-NEXT: ntl.p1 2498a395051SPiyou Chen; CHECK-RV64V-NEXT: vs2r.v v8, (a0) 2508a395051SPiyou Chen; CHECK-RV64V-NEXT: ret 2518a395051SPiyou Chen; 2528a395051SPiyou Chen; CHECK-RV32V-LABEL: test_nontemporal_P1_store_nxv16i8: 2538a395051SPiyou Chen; CHECK-RV32V: # %bb.0: 2548a395051SPiyou Chen; CHECK-RV32V-NEXT: ntl.p1 2558a395051SPiyou Chen; CHECK-RV32V-NEXT: vs2r.v v8, (a0) 2568a395051SPiyou Chen; CHECK-RV32V-NEXT: ret 2578a395051SPiyou Chen store <vscale x 16 x i8> %v, ptr %p, !nontemporal !0, !riscv-nontemporal-domain !1 2588a395051SPiyou Chen ret void 2598a395051SPiyou Chen} 2608a395051SPiyou Chen 2618a395051SPiyou Chendefine <vscale x 2 x i64> @test_nontemporal_PALL_load_nxv2i64(ptr %p) { 2628a395051SPiyou Chen; CHECK-RV64V-LABEL: test_nontemporal_PALL_load_nxv2i64: 2638a395051SPiyou Chen; CHECK-RV64V: # %bb.0: 2648a395051SPiyou Chen; CHECK-RV64V-NEXT: ntl.pall 2658a395051SPiyou Chen; CHECK-RV64V-NEXT: vl2re64.v v8, (a0) 2668a395051SPiyou Chen; CHECK-RV64V-NEXT: ret 2678a395051SPiyou Chen; 2688a395051SPiyou Chen; CHECK-RV32V-LABEL: test_nontemporal_PALL_load_nxv2i64: 2698a395051SPiyou Chen; CHECK-RV32V: # %bb.0: 2708a395051SPiyou Chen; CHECK-RV32V-NEXT: ntl.pall 2718a395051SPiyou Chen; CHECK-RV32V-NEXT: vl2re64.v v8, (a0) 2728a395051SPiyou Chen; CHECK-RV32V-NEXT: ret 2738a395051SPiyou Chen %1 = load <vscale x 2 x i64>, ptr %p, !nontemporal !0, !riscv-nontemporal-domain !2 2748a395051SPiyou Chen ret <vscale x 2 x i64> %1 2758a395051SPiyou Chen} 2768a395051SPiyou Chen 2778a395051SPiyou Chendefine <vscale x 4 x i32> @test_nontemporal_PALL_load_nxv4i32(ptr %p) { 2788a395051SPiyou Chen; CHECK-RV64V-LABEL: test_nontemporal_PALL_load_nxv4i32: 2798a395051SPiyou Chen; CHECK-RV64V: # %bb.0: 2808a395051SPiyou Chen; CHECK-RV64V-NEXT: ntl.pall 2818a395051SPiyou Chen; CHECK-RV64V-NEXT: vl2re32.v v8, (a0) 2828a395051SPiyou Chen; CHECK-RV64V-NEXT: ret 2838a395051SPiyou Chen; 2848a395051SPiyou Chen; CHECK-RV32V-LABEL: test_nontemporal_PALL_load_nxv4i32: 2858a395051SPiyou Chen; CHECK-RV32V: # %bb.0: 2868a395051SPiyou Chen; CHECK-RV32V-NEXT: ntl.pall 2878a395051SPiyou Chen; CHECK-RV32V-NEXT: vl2re32.v v8, (a0) 2888a395051SPiyou Chen; CHECK-RV32V-NEXT: ret 2898a395051SPiyou Chen %1 = load <vscale x 4 x i32>, ptr %p, !nontemporal !0, !riscv-nontemporal-domain !2 2908a395051SPiyou Chen ret <vscale x 4 x i32> %1 2918a395051SPiyou Chen} 2928a395051SPiyou Chen 2938a395051SPiyou Chendefine <vscale x 8 x i16> @test_nontemporal_PALL_load_nxv8i16(ptr %p) { 2948a395051SPiyou Chen; CHECK-RV64V-LABEL: test_nontemporal_PALL_load_nxv8i16: 2958a395051SPiyou Chen; CHECK-RV64V: # %bb.0: 2968a395051SPiyou Chen; CHECK-RV64V-NEXT: ntl.pall 2978a395051SPiyou Chen; CHECK-RV64V-NEXT: vl2re16.v v8, (a0) 2988a395051SPiyou Chen; CHECK-RV64V-NEXT: ret 2998a395051SPiyou Chen; 3008a395051SPiyou Chen; CHECK-RV32V-LABEL: test_nontemporal_PALL_load_nxv8i16: 3018a395051SPiyou Chen; CHECK-RV32V: # %bb.0: 3028a395051SPiyou Chen; CHECK-RV32V-NEXT: ntl.pall 3038a395051SPiyou Chen; CHECK-RV32V-NEXT: vl2re16.v v8, (a0) 3048a395051SPiyou Chen; CHECK-RV32V-NEXT: ret 3058a395051SPiyou Chen %1 = load <vscale x 8 x i16>, ptr %p, !nontemporal !0, !riscv-nontemporal-domain !2 3068a395051SPiyou Chen ret <vscale x 8 x i16> %1 3078a395051SPiyou Chen} 3088a395051SPiyou Chen 3098a395051SPiyou Chendefine <vscale x 16 x i8> @test_nontemporal_PALL_load_nxv16i8(ptr %p) { 3108a395051SPiyou Chen; CHECK-RV64V-LABEL: test_nontemporal_PALL_load_nxv16i8: 3118a395051SPiyou Chen; CHECK-RV64V: # %bb.0: 3128a395051SPiyou Chen; CHECK-RV64V-NEXT: ntl.pall 3138a395051SPiyou Chen; CHECK-RV64V-NEXT: vl2r.v v8, (a0) 3148a395051SPiyou Chen; CHECK-RV64V-NEXT: ret 3158a395051SPiyou Chen; 3168a395051SPiyou Chen; CHECK-RV32V-LABEL: test_nontemporal_PALL_load_nxv16i8: 3178a395051SPiyou Chen; CHECK-RV32V: # %bb.0: 3188a395051SPiyou Chen; CHECK-RV32V-NEXT: ntl.pall 3198a395051SPiyou Chen; CHECK-RV32V-NEXT: vl2r.v v8, (a0) 3208a395051SPiyou Chen; CHECK-RV32V-NEXT: ret 3218a395051SPiyou Chen %1 = load <vscale x 16 x i8>, ptr %p, !nontemporal !0, !riscv-nontemporal-domain !2 3228a395051SPiyou Chen ret <vscale x 16 x i8> %1 3238a395051SPiyou Chen} 3248a395051SPiyou Chen 3258a395051SPiyou Chendefine void @test_nontemporal_PALL_store_nxv2i64(ptr %p, <vscale x 2 x i64> %v) { 3268a395051SPiyou Chen; CHECK-RV64V-LABEL: test_nontemporal_PALL_store_nxv2i64: 3278a395051SPiyou Chen; CHECK-RV64V: # %bb.0: 3288a395051SPiyou Chen; CHECK-RV64V-NEXT: ntl.pall 3298a395051SPiyou Chen; CHECK-RV64V-NEXT: vs2r.v v8, (a0) 3308a395051SPiyou Chen; CHECK-RV64V-NEXT: ret 3318a395051SPiyou Chen; 3328a395051SPiyou Chen; CHECK-RV32V-LABEL: test_nontemporal_PALL_store_nxv2i64: 3338a395051SPiyou Chen; CHECK-RV32V: # %bb.0: 3348a395051SPiyou Chen; CHECK-RV32V-NEXT: ntl.pall 3358a395051SPiyou Chen; CHECK-RV32V-NEXT: vs2r.v v8, (a0) 3368a395051SPiyou Chen; CHECK-RV32V-NEXT: ret 3378a395051SPiyou Chen store <vscale x 2 x i64> %v, ptr %p, !nontemporal !0, !riscv-nontemporal-domain !2 3388a395051SPiyou Chen ret void 3398a395051SPiyou Chen} 3408a395051SPiyou Chen 3418a395051SPiyou Chendefine void @test_nontemporal_PALL_store_nxv4i32(ptr %p, <vscale x 4 x i32> %v) { 3428a395051SPiyou Chen; CHECK-RV64V-LABEL: test_nontemporal_PALL_store_nxv4i32: 3438a395051SPiyou Chen; CHECK-RV64V: # %bb.0: 3448a395051SPiyou Chen; CHECK-RV64V-NEXT: ntl.pall 3458a395051SPiyou Chen; CHECK-RV64V-NEXT: vs2r.v v8, (a0) 3468a395051SPiyou Chen; CHECK-RV64V-NEXT: ret 3478a395051SPiyou Chen; 3488a395051SPiyou Chen; CHECK-RV32V-LABEL: test_nontemporal_PALL_store_nxv4i32: 3498a395051SPiyou Chen; CHECK-RV32V: # %bb.0: 3508a395051SPiyou Chen; CHECK-RV32V-NEXT: ntl.pall 3518a395051SPiyou Chen; CHECK-RV32V-NEXT: vs2r.v v8, (a0) 3528a395051SPiyou Chen; CHECK-RV32V-NEXT: ret 3538a395051SPiyou Chen store <vscale x 4 x i32> %v, ptr %p, !nontemporal !0, !riscv-nontemporal-domain !2 3548a395051SPiyou Chen ret void 3558a395051SPiyou Chen} 3568a395051SPiyou Chen 3578a395051SPiyou Chendefine void @test_nontemporal_PALL_store_nxv8i16(ptr %p, <vscale x 8 x i16> %v) { 3588a395051SPiyou Chen; CHECK-RV64V-LABEL: test_nontemporal_PALL_store_nxv8i16: 3598a395051SPiyou Chen; CHECK-RV64V: # %bb.0: 3608a395051SPiyou Chen; CHECK-RV64V-NEXT: ntl.pall 3618a395051SPiyou Chen; CHECK-RV64V-NEXT: vs2r.v v8, (a0) 3628a395051SPiyou Chen; CHECK-RV64V-NEXT: ret 3638a395051SPiyou Chen; 3648a395051SPiyou Chen; CHECK-RV32V-LABEL: test_nontemporal_PALL_store_nxv8i16: 3658a395051SPiyou Chen; CHECK-RV32V: # %bb.0: 3668a395051SPiyou Chen; CHECK-RV32V-NEXT: ntl.pall 3678a395051SPiyou Chen; CHECK-RV32V-NEXT: vs2r.v v8, (a0) 3688a395051SPiyou Chen; CHECK-RV32V-NEXT: ret 3698a395051SPiyou Chen store <vscale x 8 x i16> %v, ptr %p, !nontemporal !0, !riscv-nontemporal-domain !2 3708a395051SPiyou Chen ret void 3718a395051SPiyou Chen} 3728a395051SPiyou Chen 3738a395051SPiyou Chendefine void @test_nontemporal_PALL_store_nxv16i8(ptr %p, <vscale x 16 x i8> %v) { 3748a395051SPiyou Chen; CHECK-RV64V-LABEL: test_nontemporal_PALL_store_nxv16i8: 3758a395051SPiyou Chen; CHECK-RV64V: # %bb.0: 3768a395051SPiyou Chen; CHECK-RV64V-NEXT: ntl.pall 3778a395051SPiyou Chen; CHECK-RV64V-NEXT: vs2r.v v8, (a0) 3788a395051SPiyou Chen; CHECK-RV64V-NEXT: ret 3798a395051SPiyou Chen; 3808a395051SPiyou Chen; CHECK-RV32V-LABEL: test_nontemporal_PALL_store_nxv16i8: 3818a395051SPiyou Chen; CHECK-RV32V: # %bb.0: 3828a395051SPiyou Chen; CHECK-RV32V-NEXT: ntl.pall 3838a395051SPiyou Chen; CHECK-RV32V-NEXT: vs2r.v v8, (a0) 3848a395051SPiyou Chen; CHECK-RV32V-NEXT: ret 3858a395051SPiyou Chen store <vscale x 16 x i8> %v, ptr %p, !nontemporal !0, !riscv-nontemporal-domain !2 3868a395051SPiyou Chen ret void 3878a395051SPiyou Chen} 3888a395051SPiyou Chen 3898a395051SPiyou Chendefine <vscale x 2 x i64> @test_nontemporal_S1_load_nxv2i64(ptr %p) { 3908a395051SPiyou Chen; CHECK-RV64V-LABEL: test_nontemporal_S1_load_nxv2i64: 3918a395051SPiyou Chen; CHECK-RV64V: # %bb.0: 3928a395051SPiyou Chen; CHECK-RV64V-NEXT: ntl.s1 3938a395051SPiyou Chen; CHECK-RV64V-NEXT: vl2re64.v v8, (a0) 3948a395051SPiyou Chen; CHECK-RV64V-NEXT: ret 3958a395051SPiyou Chen; 3968a395051SPiyou Chen; CHECK-RV32V-LABEL: test_nontemporal_S1_load_nxv2i64: 3978a395051SPiyou Chen; CHECK-RV32V: # %bb.0: 3988a395051SPiyou Chen; CHECK-RV32V-NEXT: ntl.s1 3998a395051SPiyou Chen; CHECK-RV32V-NEXT: vl2re64.v v8, (a0) 4008a395051SPiyou Chen; CHECK-RV32V-NEXT: ret 4018a395051SPiyou Chen %1 = load <vscale x 2 x i64>, ptr %p, !nontemporal !0, !riscv-nontemporal-domain !3 4028a395051SPiyou Chen ret <vscale x 2 x i64> %1 4038a395051SPiyou Chen} 4048a395051SPiyou Chen 4058a395051SPiyou Chendefine <vscale x 4 x i32> @test_nontemporal_S1_load_nxv4i32(ptr %p) { 4068a395051SPiyou Chen; CHECK-RV64V-LABEL: test_nontemporal_S1_load_nxv4i32: 4078a395051SPiyou Chen; CHECK-RV64V: # %bb.0: 4088a395051SPiyou Chen; CHECK-RV64V-NEXT: ntl.s1 4098a395051SPiyou Chen; CHECK-RV64V-NEXT: vl2re32.v v8, (a0) 4108a395051SPiyou Chen; CHECK-RV64V-NEXT: ret 4118a395051SPiyou Chen; 4128a395051SPiyou Chen; CHECK-RV32V-LABEL: test_nontemporal_S1_load_nxv4i32: 4138a395051SPiyou Chen; CHECK-RV32V: # %bb.0: 4148a395051SPiyou Chen; CHECK-RV32V-NEXT: ntl.s1 4158a395051SPiyou Chen; CHECK-RV32V-NEXT: vl2re32.v v8, (a0) 4168a395051SPiyou Chen; CHECK-RV32V-NEXT: ret 4178a395051SPiyou Chen %1 = load <vscale x 4 x i32>, ptr %p, !nontemporal !0, !riscv-nontemporal-domain !3 4188a395051SPiyou Chen ret <vscale x 4 x i32> %1 4198a395051SPiyou Chen} 4208a395051SPiyou Chen 4218a395051SPiyou Chendefine <vscale x 8 x i16> @test_nontemporal_S1_load_nxv8i16(ptr %p) { 4228a395051SPiyou Chen; CHECK-RV64V-LABEL: test_nontemporal_S1_load_nxv8i16: 4238a395051SPiyou Chen; CHECK-RV64V: # %bb.0: 4248a395051SPiyou Chen; CHECK-RV64V-NEXT: ntl.s1 4258a395051SPiyou Chen; CHECK-RV64V-NEXT: vl2re16.v v8, (a0) 4268a395051SPiyou Chen; CHECK-RV64V-NEXT: ret 4278a395051SPiyou Chen; 4288a395051SPiyou Chen; CHECK-RV32V-LABEL: test_nontemporal_S1_load_nxv8i16: 4298a395051SPiyou Chen; CHECK-RV32V: # %bb.0: 4308a395051SPiyou Chen; CHECK-RV32V-NEXT: ntl.s1 4318a395051SPiyou Chen; CHECK-RV32V-NEXT: vl2re16.v v8, (a0) 4328a395051SPiyou Chen; CHECK-RV32V-NEXT: ret 4338a395051SPiyou Chen %1 = load <vscale x 8 x i16>, ptr %p, !nontemporal !0, !riscv-nontemporal-domain !3 4348a395051SPiyou Chen ret <vscale x 8 x i16> %1 4358a395051SPiyou Chen} 4368a395051SPiyou Chen 4378a395051SPiyou Chendefine <vscale x 16 x i8> @test_nontemporal_S1_load_nxv16i8(ptr %p) { 4388a395051SPiyou Chen; CHECK-RV64V-LABEL: test_nontemporal_S1_load_nxv16i8: 4398a395051SPiyou Chen; CHECK-RV64V: # %bb.0: 4408a395051SPiyou Chen; CHECK-RV64V-NEXT: ntl.s1 4418a395051SPiyou Chen; CHECK-RV64V-NEXT: vl2r.v v8, (a0) 4428a395051SPiyou Chen; CHECK-RV64V-NEXT: ret 4438a395051SPiyou Chen; 4448a395051SPiyou Chen; CHECK-RV32V-LABEL: test_nontemporal_S1_load_nxv16i8: 4458a395051SPiyou Chen; CHECK-RV32V: # %bb.0: 4468a395051SPiyou Chen; CHECK-RV32V-NEXT: ntl.s1 4478a395051SPiyou Chen; CHECK-RV32V-NEXT: vl2r.v v8, (a0) 4488a395051SPiyou Chen; CHECK-RV32V-NEXT: ret 4498a395051SPiyou Chen %1 = load <vscale x 16 x i8>, ptr %p, !nontemporal !0, !riscv-nontemporal-domain !3 4508a395051SPiyou Chen ret <vscale x 16 x i8> %1 4518a395051SPiyou Chen} 4528a395051SPiyou Chen 4538a395051SPiyou Chendefine void @test_nontemporal_S1_store_nxv2i64(ptr %p, <vscale x 2 x i64> %v) { 4548a395051SPiyou Chen; CHECK-RV64V-LABEL: test_nontemporal_S1_store_nxv2i64: 4558a395051SPiyou Chen; CHECK-RV64V: # %bb.0: 4568a395051SPiyou Chen; CHECK-RV64V-NEXT: ntl.s1 4578a395051SPiyou Chen; CHECK-RV64V-NEXT: vs2r.v v8, (a0) 4588a395051SPiyou Chen; CHECK-RV64V-NEXT: ret 4598a395051SPiyou Chen; 4608a395051SPiyou Chen; CHECK-RV32V-LABEL: test_nontemporal_S1_store_nxv2i64: 4618a395051SPiyou Chen; CHECK-RV32V: # %bb.0: 4628a395051SPiyou Chen; CHECK-RV32V-NEXT: ntl.s1 4638a395051SPiyou Chen; CHECK-RV32V-NEXT: vs2r.v v8, (a0) 4648a395051SPiyou Chen; CHECK-RV32V-NEXT: ret 4658a395051SPiyou Chen store <vscale x 2 x i64> %v, ptr %p, !nontemporal !0, !riscv-nontemporal-domain !3 4668a395051SPiyou Chen ret void 4678a395051SPiyou Chen} 4688a395051SPiyou Chen 4698a395051SPiyou Chendefine void @test_nontemporal_S1_store_nxv4i32(ptr %p, <vscale x 4 x i32> %v) { 4708a395051SPiyou Chen; CHECK-RV64V-LABEL: test_nontemporal_S1_store_nxv4i32: 4718a395051SPiyou Chen; CHECK-RV64V: # %bb.0: 4728a395051SPiyou Chen; CHECK-RV64V-NEXT: ntl.s1 4738a395051SPiyou Chen; CHECK-RV64V-NEXT: vs2r.v v8, (a0) 4748a395051SPiyou Chen; CHECK-RV64V-NEXT: ret 4758a395051SPiyou Chen; 4768a395051SPiyou Chen; CHECK-RV32V-LABEL: test_nontemporal_S1_store_nxv4i32: 4778a395051SPiyou Chen; CHECK-RV32V: # %bb.0: 4788a395051SPiyou Chen; CHECK-RV32V-NEXT: ntl.s1 4798a395051SPiyou Chen; CHECK-RV32V-NEXT: vs2r.v v8, (a0) 4808a395051SPiyou Chen; CHECK-RV32V-NEXT: ret 4818a395051SPiyou Chen store <vscale x 4 x i32> %v, ptr %p, !nontemporal !0, !riscv-nontemporal-domain !3 4828a395051SPiyou Chen ret void 4838a395051SPiyou Chen} 4848a395051SPiyou Chen 4858a395051SPiyou Chendefine void @test_nontemporal_S1_store_nxv8i16(ptr %p, <vscale x 8 x i16> %v) { 4868a395051SPiyou Chen; CHECK-RV64V-LABEL: test_nontemporal_S1_store_nxv8i16: 4878a395051SPiyou Chen; CHECK-RV64V: # %bb.0: 4888a395051SPiyou Chen; CHECK-RV64V-NEXT: ntl.s1 4898a395051SPiyou Chen; CHECK-RV64V-NEXT: vs2r.v v8, (a0) 4908a395051SPiyou Chen; CHECK-RV64V-NEXT: ret 4918a395051SPiyou Chen; 4928a395051SPiyou Chen; CHECK-RV32V-LABEL: test_nontemporal_S1_store_nxv8i16: 4938a395051SPiyou Chen; CHECK-RV32V: # %bb.0: 4948a395051SPiyou Chen; CHECK-RV32V-NEXT: ntl.s1 4958a395051SPiyou Chen; CHECK-RV32V-NEXT: vs2r.v v8, (a0) 4968a395051SPiyou Chen; CHECK-RV32V-NEXT: ret 4978a395051SPiyou Chen store <vscale x 8 x i16> %v, ptr %p, !nontemporal !0, !riscv-nontemporal-domain !3 4988a395051SPiyou Chen ret void 4998a395051SPiyou Chen} 5008a395051SPiyou Chen 5018a395051SPiyou Chendefine void @test_nontemporal_S1_store_nxv16i8(ptr %p, <vscale x 16 x i8> %v) { 5028a395051SPiyou Chen; CHECK-RV64V-LABEL: test_nontemporal_S1_store_nxv16i8: 5038a395051SPiyou Chen; CHECK-RV64V: # %bb.0: 5048a395051SPiyou Chen; CHECK-RV64V-NEXT: ntl.s1 5058a395051SPiyou Chen; CHECK-RV64V-NEXT: vs2r.v v8, (a0) 5068a395051SPiyou Chen; CHECK-RV64V-NEXT: ret 5078a395051SPiyou Chen; 5088a395051SPiyou Chen; CHECK-RV32V-LABEL: test_nontemporal_S1_store_nxv16i8: 5098a395051SPiyou Chen; CHECK-RV32V: # %bb.0: 5108a395051SPiyou Chen; CHECK-RV32V-NEXT: ntl.s1 5118a395051SPiyou Chen; CHECK-RV32V-NEXT: vs2r.v v8, (a0) 5128a395051SPiyou Chen; CHECK-RV32V-NEXT: ret 5138a395051SPiyou Chen store <vscale x 16 x i8> %v, ptr %p, !nontemporal !0, !riscv-nontemporal-domain !3 5148a395051SPiyou Chen ret void 5158a395051SPiyou Chen} 5168a395051SPiyou Chen 5178a395051SPiyou Chendefine <vscale x 2 x i64> @test_nontemporal_ALL_load_nxv2i64(ptr %p) { 5188a395051SPiyou Chen; CHECK-RV64V-LABEL: test_nontemporal_ALL_load_nxv2i64: 5198a395051SPiyou Chen; CHECK-RV64V: # %bb.0: 5208a395051SPiyou Chen; CHECK-RV64V-NEXT: ntl.all 5218a395051SPiyou Chen; CHECK-RV64V-NEXT: vl2re64.v v8, (a0) 5228a395051SPiyou Chen; CHECK-RV64V-NEXT: ret 5238a395051SPiyou Chen; 5248a395051SPiyou Chen; CHECK-RV32V-LABEL: test_nontemporal_ALL_load_nxv2i64: 5258a395051SPiyou Chen; CHECK-RV32V: # %bb.0: 5268a395051SPiyou Chen; CHECK-RV32V-NEXT: ntl.all 5278a395051SPiyou Chen; CHECK-RV32V-NEXT: vl2re64.v v8, (a0) 5288a395051SPiyou Chen; CHECK-RV32V-NEXT: ret 5298a395051SPiyou Chen %1 = load <vscale x 2 x i64>, ptr %p, !nontemporal !0, !riscv-nontemporal-domain !4 5308a395051SPiyou Chen ret <vscale x 2 x i64> %1 5318a395051SPiyou Chen} 5328a395051SPiyou Chen 5338a395051SPiyou Chendefine <vscale x 4 x i32> @test_nontemporal_ALL_load_nxv4i32(ptr %p) { 5348a395051SPiyou Chen; CHECK-RV64V-LABEL: test_nontemporal_ALL_load_nxv4i32: 5358a395051SPiyou Chen; CHECK-RV64V: # %bb.0: 5368a395051SPiyou Chen; CHECK-RV64V-NEXT: ntl.all 5378a395051SPiyou Chen; CHECK-RV64V-NEXT: vl2re32.v v8, (a0) 5388a395051SPiyou Chen; CHECK-RV64V-NEXT: ret 5398a395051SPiyou Chen; 5408a395051SPiyou Chen; CHECK-RV32V-LABEL: test_nontemporal_ALL_load_nxv4i32: 5418a395051SPiyou Chen; CHECK-RV32V: # %bb.0: 5428a395051SPiyou Chen; CHECK-RV32V-NEXT: ntl.all 5438a395051SPiyou Chen; CHECK-RV32V-NEXT: vl2re32.v v8, (a0) 5448a395051SPiyou Chen; CHECK-RV32V-NEXT: ret 5458a395051SPiyou Chen %1 = load <vscale x 4 x i32>, ptr %p, !nontemporal !0, !riscv-nontemporal-domain !4 5468a395051SPiyou Chen ret <vscale x 4 x i32> %1 5478a395051SPiyou Chen} 5488a395051SPiyou Chen 5498a395051SPiyou Chendefine <vscale x 8 x i16> @test_nontemporal_ALL_load_nxv8i16(ptr %p) { 5508a395051SPiyou Chen; CHECK-RV64V-LABEL: test_nontemporal_ALL_load_nxv8i16: 5518a395051SPiyou Chen; CHECK-RV64V: # %bb.0: 5528a395051SPiyou Chen; CHECK-RV64V-NEXT: ntl.all 5538a395051SPiyou Chen; CHECK-RV64V-NEXT: vl2re16.v v8, (a0) 5548a395051SPiyou Chen; CHECK-RV64V-NEXT: ret 5558a395051SPiyou Chen; 5568a395051SPiyou Chen; CHECK-RV32V-LABEL: test_nontemporal_ALL_load_nxv8i16: 5578a395051SPiyou Chen; CHECK-RV32V: # %bb.0: 5588a395051SPiyou Chen; CHECK-RV32V-NEXT: ntl.all 5598a395051SPiyou Chen; CHECK-RV32V-NEXT: vl2re16.v v8, (a0) 5608a395051SPiyou Chen; CHECK-RV32V-NEXT: ret 5618a395051SPiyou Chen %1 = load <vscale x 8 x i16>, ptr %p, !nontemporal !0, !riscv-nontemporal-domain !4 5628a395051SPiyou Chen ret <vscale x 8 x i16> %1 5638a395051SPiyou Chen} 5648a395051SPiyou Chen 5658a395051SPiyou Chendefine <vscale x 16 x i8> @test_nontemporal_ALL_load_nxv16i8(ptr %p) { 5668a395051SPiyou Chen; CHECK-RV64V-LABEL: test_nontemporal_ALL_load_nxv16i8: 5678a395051SPiyou Chen; CHECK-RV64V: # %bb.0: 5688a395051SPiyou Chen; CHECK-RV64V-NEXT: ntl.all 5698a395051SPiyou Chen; CHECK-RV64V-NEXT: vl2r.v v8, (a0) 5708a395051SPiyou Chen; CHECK-RV64V-NEXT: ret 5718a395051SPiyou Chen; 5728a395051SPiyou Chen; CHECK-RV32V-LABEL: test_nontemporal_ALL_load_nxv16i8: 5738a395051SPiyou Chen; CHECK-RV32V: # %bb.0: 5748a395051SPiyou Chen; CHECK-RV32V-NEXT: ntl.all 5758a395051SPiyou Chen; CHECK-RV32V-NEXT: vl2r.v v8, (a0) 5768a395051SPiyou Chen; CHECK-RV32V-NEXT: ret 5778a395051SPiyou Chen %1 = load <vscale x 16 x i8>, ptr %p, !nontemporal !0, !riscv-nontemporal-domain !4 5788a395051SPiyou Chen ret <vscale x 16 x i8> %1 5798a395051SPiyou Chen} 5808a395051SPiyou Chen 5818a395051SPiyou Chendefine void @test_nontemporal_ALL_store_nxv2i64(ptr %p, <vscale x 2 x i64> %v) { 5828a395051SPiyou Chen; CHECK-RV64V-LABEL: test_nontemporal_ALL_store_nxv2i64: 5838a395051SPiyou Chen; CHECK-RV64V: # %bb.0: 5848a395051SPiyou Chen; CHECK-RV64V-NEXT: ntl.all 5858a395051SPiyou Chen; CHECK-RV64V-NEXT: vs2r.v v8, (a0) 5868a395051SPiyou Chen; CHECK-RV64V-NEXT: ret 5878a395051SPiyou Chen; 5888a395051SPiyou Chen; CHECK-RV32V-LABEL: test_nontemporal_ALL_store_nxv2i64: 5898a395051SPiyou Chen; CHECK-RV32V: # %bb.0: 5908a395051SPiyou Chen; CHECK-RV32V-NEXT: ntl.all 5918a395051SPiyou Chen; CHECK-RV32V-NEXT: vs2r.v v8, (a0) 5928a395051SPiyou Chen; CHECK-RV32V-NEXT: ret 5938a395051SPiyou Chen store <vscale x 2 x i64> %v, ptr %p, !nontemporal !0, !riscv-nontemporal-domain !4 5948a395051SPiyou Chen ret void 5958a395051SPiyou Chen} 5968a395051SPiyou Chen 5978a395051SPiyou Chendefine void @test_nontemporal_ALL_store_nxv4i32(ptr %p, <vscale x 4 x i32> %v) { 5988a395051SPiyou Chen; CHECK-RV64V-LABEL: test_nontemporal_ALL_store_nxv4i32: 5998a395051SPiyou Chen; CHECK-RV64V: # %bb.0: 6008a395051SPiyou Chen; CHECK-RV64V-NEXT: ntl.all 6018a395051SPiyou Chen; CHECK-RV64V-NEXT: vs2r.v v8, (a0) 6028a395051SPiyou Chen; CHECK-RV64V-NEXT: ret 6038a395051SPiyou Chen; 6048a395051SPiyou Chen; CHECK-RV32V-LABEL: test_nontemporal_ALL_store_nxv4i32: 6058a395051SPiyou Chen; CHECK-RV32V: # %bb.0: 6068a395051SPiyou Chen; CHECK-RV32V-NEXT: ntl.all 6078a395051SPiyou Chen; CHECK-RV32V-NEXT: vs2r.v v8, (a0) 6088a395051SPiyou Chen; CHECK-RV32V-NEXT: ret 6098a395051SPiyou Chen store <vscale x 4 x i32> %v, ptr %p, !nontemporal !0, !riscv-nontemporal-domain !4 6108a395051SPiyou Chen ret void 6118a395051SPiyou Chen} 6128a395051SPiyou Chen 6138a395051SPiyou Chendefine void @test_nontemporal_ALL_store_nxv8i16(ptr %p, <vscale x 8 x i16> %v) { 6148a395051SPiyou Chen; CHECK-RV64V-LABEL: test_nontemporal_ALL_store_nxv8i16: 6158a395051SPiyou Chen; CHECK-RV64V: # %bb.0: 6168a395051SPiyou Chen; CHECK-RV64V-NEXT: ntl.all 6178a395051SPiyou Chen; CHECK-RV64V-NEXT: vs2r.v v8, (a0) 6188a395051SPiyou Chen; CHECK-RV64V-NEXT: ret 6198a395051SPiyou Chen; 6208a395051SPiyou Chen; CHECK-RV32V-LABEL: test_nontemporal_ALL_store_nxv8i16: 6218a395051SPiyou Chen; CHECK-RV32V: # %bb.0: 6228a395051SPiyou Chen; CHECK-RV32V-NEXT: ntl.all 6238a395051SPiyou Chen; CHECK-RV32V-NEXT: vs2r.v v8, (a0) 6248a395051SPiyou Chen; CHECK-RV32V-NEXT: ret 6258a395051SPiyou Chen store <vscale x 8 x i16> %v, ptr %p, !nontemporal !0, !riscv-nontemporal-domain !4 6268a395051SPiyou Chen ret void 6278a395051SPiyou Chen} 6288a395051SPiyou Chen 6298a395051SPiyou Chendefine void @test_nontemporal_ALL_store_nxv16i8(ptr %p, <vscale x 16 x i8> %v) { 6308a395051SPiyou Chen; CHECK-RV64V-LABEL: test_nontemporal_ALL_store_nxv16i8: 6318a395051SPiyou Chen; CHECK-RV64V: # %bb.0: 6328a395051SPiyou Chen; CHECK-RV64V-NEXT: ntl.all 6338a395051SPiyou Chen; CHECK-RV64V-NEXT: vs2r.v v8, (a0) 6348a395051SPiyou Chen; CHECK-RV64V-NEXT: ret 6358a395051SPiyou Chen; 6368a395051SPiyou Chen; CHECK-RV32V-LABEL: test_nontemporal_ALL_store_nxv16i8: 6378a395051SPiyou Chen; CHECK-RV32V: # %bb.0: 6388a395051SPiyou Chen; CHECK-RV32V-NEXT: ntl.all 6398a395051SPiyou Chen; CHECK-RV32V-NEXT: vs2r.v v8, (a0) 6408a395051SPiyou Chen; CHECK-RV32V-NEXT: ret 6418a395051SPiyou Chen store <vscale x 16 x i8> %v, ptr %p, !nontemporal !0, !riscv-nontemporal-domain !4 6428a395051SPiyou Chen ret void 6438a395051SPiyou Chen} 6448a395051SPiyou Chen 6458d7c865cSPiyou Chen!0 = !{i32 1} 6468a395051SPiyou Chen!1 = !{i32 2} 6478a395051SPiyou Chen!2 = !{i32 3} 6488a395051SPiyou Chen!3 = !{i32 4} 6498a395051SPiyou Chen!4 = !{i32 5} 650