xref: /llvm-project/llvm/test/CodeGen/RISCV/make-compressible-zfinx.mir (revision bc91f3cdd57cbe4b0a456626f52960158cb3232f)
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -o - %s -mtriple=riscv32 -mattr=+c,+zfinx -simplify-mir \
3# RUN:   -run-pass=riscv-make-compressible | FileCheck --check-prefixes=CHECK %s
4# RUN: llc -o - %s -mtriple=riscv64 -mattr=+c,+zfinx -simplify-mir \
5# RUN:   -run-pass=riscv-make-compressible | FileCheck --check-prefixes=CHECK %s
6
7--- |
8
9  define void @store_common_value_float(ptr %a, ptr %b, ptr %c, float %d, float %e, float %f, float %g, float %h, float %i, float %j) #0 {
10  entry:
11    store float %j, ptr %a, align 4
12    store float %j, ptr %b, align 4
13    store float %j, ptr %c, align 4
14    ret void
15  }
16
17  define void @store_common_ptr_float(float %a, float %b, float %c, i32 %d, i32 %e, i32 %f, i32 %g, i32 %h, i32 %i, ptr %p) #0 {
18  entry:
19    store volatile float %a, ptr %p, align 4
20    store volatile float %b, ptr %p, align 4
21    store volatile float %c, ptr %p, align 4
22    ret void
23  }
24
25  define void @load_common_ptr_float(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, ptr %g) #0 {
26  entry:
27    %0 = load float, ptr %g, align 4
28    %arrayidx1 = getelementptr inbounds float, ptr %g, i32 1
29    %1 = load float, ptr %arrayidx1, align 4
30    %arrayidx2 = getelementptr inbounds float, ptr %g, i32 2
31    %2 = load float, ptr %arrayidx2, align 4
32    tail call void @load_common_ptr_float_1(float %0, float %1, float %2)
33    ret void
34  }
35
36  declare void @load_common_ptr_float_1(float, float, float) #0
37
38  define void @store_large_offset_float(ptr %p, float %a, float %b, float %c, float %d) #0 {
39  entry:
40    %0 = getelementptr inbounds float, ptr %p, i32 100
41    store volatile float %a, ptr %0, align 4
42    %1 = getelementptr inbounds float, ptr %p, i32 101
43    store volatile float %b, ptr %1, align 4
44    %2 = getelementptr inbounds float, ptr %p, i32 102
45    store volatile float %c, ptr %2, align 4
46    %3 = getelementptr inbounds float, ptr %p, i32 103
47    store volatile float %d, ptr %3, align 4
48    ret void
49  }
50
51  define void @load_large_offset_float(ptr %p) #0 {
52  entry:
53    %arrayidx = getelementptr inbounds float, ptr %p, i32 100
54    %0 = load float, ptr %arrayidx, align 4
55    %arrayidx1 = getelementptr inbounds float, ptr %p, i32 101
56    %1 = load float, ptr %arrayidx1, align 4
57    %arrayidx2 = getelementptr inbounds float, ptr %p, i32 102
58    %2 = load float, ptr %arrayidx2, align 4
59    tail call void @load_large_offset_float_1(float %0, float %1, float %2)
60    ret void
61  }
62
63  declare void @load_large_offset_float_1(float, float, float) #0
64
65  define void @store_common_value_float_no_opt(ptr %a, float %b, float %c, float %d, float %e, float %f, float %g, float %h) #0 {
66  entry:
67    store float %h, ptr %a, align 4
68    ret void
69  }
70
71  define void @store_common_ptr_float_no_opt(float %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i32 %g, ptr %p) #0 {
72  entry:
73    store volatile float %a, ptr %p, align 4
74    ret void
75  }
76
77  define float @load_common_ptr_float_no_opt(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, ptr %g) #0 {
78  entry:
79    %0 = load float, ptr %g, align 4
80    ret float %0
81  }
82
83  define void @store_large_offset_float_no_opt(ptr %p, float %a, float %b) #0 {
84  entry:
85    %0 = getelementptr inbounds float, ptr %p, i32 100
86    store volatile float %a, ptr %0, align 4
87    %1 = getelementptr inbounds float, ptr %p, i32 101
88    store volatile float %b, ptr %1, align 4
89    ret void
90  }
91
92  define { float, float } @load_large_offset_float_no_opt(ptr %p) #0 {
93  entry:
94    %arrayidx = getelementptr inbounds float, ptr %p, i32 100
95    %0 = load float, ptr %arrayidx, align 4
96    %arrayidx1 = getelementptr inbounds float, ptr %p, i32 101
97    %1 = load float, ptr %arrayidx1, align 4
98    %2 = insertvalue { float, float } undef, float %0, 0
99    %3 = insertvalue { float, float } %2, float %1, 1
100    ret { float, float } %3
101  }
102
103  attributes #0 = { minsize }
104
105...
106---
107name:            store_common_value_float
108tracksRegLiveness: true
109body:             |
110  bb.0.entry:
111    liveins: $x10, $x11, $x12
112
113    ; CHECK-LABEL: name: store_common_value_float
114    ; CHECK: liveins: $x10, $x11, $x12
115    ; CHECK-NEXT: {{  $}}
116    ; CHECK-NEXT: $x13_w = PseudoMV_FPR32INX $x0_w
117    ; CHECK-NEXT: SW_INX $x13_w, killed renamable $x10, 0 :: (store (s32) into %ir.a)
118    ; CHECK-NEXT: SW_INX $x13_w, killed renamable $x11, 0 :: (store (s32) into %ir.b)
119    ; CHECK-NEXT: SW_INX killed $x13_w, killed renamable $x12, 0 :: (store (s32) into %ir.c)
120    ; CHECK-NEXT: PseudoRET
121    SW_INX $x0_w, killed renamable $x10, 0 :: (store (s32) into %ir.a)
122    SW_INX $x0_w, killed renamable $x11, 0 :: (store (s32) into %ir.b)
123    SW_INX killed $x0_w, killed renamable $x12, 0 :: (store (s32) into %ir.c)
124    PseudoRET
125
126...
127---
128name:            store_common_ptr_float
129tracksRegLiveness: true
130body:             |
131  bb.0.entry:
132    liveins: $x10_w, $x11_w, $x12_w, $x16
133
134    ; CHECK-LABEL: name: store_common_ptr_float
135    ; CHECK: liveins: $x10_w, $x11_w, $x12_w, $x16
136    ; CHECK-NEXT: {{  $}}
137    ; CHECK-NEXT: $x13 = ADDI $x16, 0
138    ; CHECK-NEXT: SW_INX killed renamable $x10_w, $x13, 0 :: (volatile store (s32) into %ir.p)
139    ; CHECK-NEXT: SW_INX killed renamable $x11_w, $x13, 0 :: (volatile store (s32) into %ir.p)
140    ; CHECK-NEXT: SW_INX killed renamable $x12_w, killed $x13, 0 :: (volatile store (s32) into %ir.p)
141    ; CHECK-NEXT: PseudoRET
142    SW_INX killed renamable $x10_w, renamable $x16, 0 :: (volatile store (s32) into %ir.p)
143    SW_INX killed renamable $x11_w, renamable $x16, 0 :: (volatile store (s32) into %ir.p)
144    SW_INX killed renamable $x12_w, killed renamable $x16, 0 :: (volatile store (s32) into %ir.p)
145    PseudoRET
146
147...
148---
149name:            load_common_ptr_float
150tracksRegLiveness: true
151body:             |
152  bb.0.entry:
153    liveins: $x16
154
155    ; CHECK-LABEL: name: load_common_ptr_float
156    ; CHECK: liveins: $x16
157    ; CHECK-NEXT: {{  $}}
158    ; CHECK-NEXT: $x13 = ADDI $x16, 0
159    ; CHECK-NEXT: renamable $x10_w = LW_INX $x13, 0 :: (load (s32) from %ir.g)
160    ; CHECK-NEXT: renamable $x11_w = LW_INX $x13, 4 :: (load (s32) from %ir.arrayidx1)
161    ; CHECK-NEXT: renamable $x12_w = LW_INX killed $x13, 8 :: (load (s32) from %ir.arrayidx2)
162    ; CHECK-NEXT: PseudoTAIL target-flags(riscv-call) @load_common_ptr_float_1, implicit $x2, implicit $x10_w, implicit $x11_w, implicit $x12_w
163    renamable $x10_w = LW_INX renamable $x16, 0 :: (load (s32) from %ir.g)
164    renamable $x11_w = LW_INX renamable $x16, 4 :: (load (s32) from %ir.arrayidx1)
165    renamable $x12_w = LW_INX killed renamable $x16, 8 :: (load (s32) from %ir.arrayidx2)
166    PseudoTAIL target-flags(riscv-call) @load_common_ptr_float_1, implicit $x2, implicit $x10_w, implicit $x11_w, implicit $x12_w
167
168...
169---
170name:            store_large_offset_float
171tracksRegLiveness: true
172body:             |
173  bb.0.entry:
174    liveins: $x10, $x11_w, $x11_w, $x12_w, $x13_w
175
176    ; CHECK-LABEL: name: store_large_offset_float
177    ; CHECK: liveins: $x10, $x11_w, $x11_w, $x12_w, $x13_w
178    ; CHECK-NEXT: {{  $}}
179    ; CHECK-NEXT: $x14 = ADDI $x10, 384
180    ; CHECK-NEXT: SW_INX killed renamable $x10_w, $x14, 16 :: (volatile store (s32) into %ir.0)
181    ; CHECK-NEXT: SW_INX killed renamable $x11_w, $x14, 20 :: (volatile store (s32) into %ir.1)
182    ; CHECK-NEXT: SW_INX killed renamable $x12_w, $x14, 24 :: (volatile store (s32) into %ir.2)
183    ; CHECK-NEXT: SW_INX killed renamable $x13_w, killed $x14, 28 :: (volatile store (s32) into %ir.3)
184    ; CHECK-NEXT: PseudoRET
185    SW_INX killed renamable $x10_w, renamable $x10, 400 :: (volatile store (s32) into %ir.0)
186    SW_INX killed renamable $x11_w, renamable $x10, 404 :: (volatile store (s32) into %ir.1)
187    SW_INX killed renamable $x12_w, renamable $x10, 408 :: (volatile store (s32) into %ir.2)
188    SW_INX killed renamable $x13_w, killed renamable $x10, 412 :: (volatile store (s32) into %ir.3)
189    PseudoRET
190
191...
192---
193name:            load_large_offset_float
194tracksRegLiveness: true
195body:             |
196  bb.0.entry:
197    liveins: $x10
198
199    ; CHECK-LABEL: name: load_large_offset_float
200    ; CHECK: liveins: $x10
201    ; CHECK-NEXT: {{  $}}
202    ; CHECK-NEXT: $x14 = ADDI $x10, 384
203    ; CHECK-NEXT: renamable $x11_w = LW_INX $x14, 16 :: (load (s32) from %ir.arrayidx)
204    ; CHECK-NEXT: renamable $x12_w = LW_INX $x14, 20 :: (load (s32) from %ir.arrayidx1)
205    ; CHECK-NEXT: renamable $x13_w = LW_INX killed $x14, 24 :: (load (s32) from %ir.arrayidx2)
206    ; CHECK-NEXT: PseudoTAIL target-flags(riscv-call) @load_large_offset_float_1, implicit $x2, implicit $x11_w, implicit $x12_w, implicit $x12_w
207    renamable $x11_w = LW_INX renamable $x10, 400 :: (load (s32) from %ir.arrayidx)
208    renamable $x12_w = LW_INX renamable $x10, 404 :: (load (s32) from %ir.arrayidx1)
209    renamable $x13_w = LW_INX killed renamable $x10, 408 :: (load (s32) from %ir.arrayidx2)
210    PseudoTAIL target-flags(riscv-call) @load_large_offset_float_1, implicit $x2, implicit $x11_w, implicit $x12_w, implicit $x12_w
211
212...
213---
214name:            store_common_value_float_no_opt
215tracksRegLiveness: true
216body:             |
217  bb.0.entry:
218    liveins: $x10, $x16_w
219
220    ; CHECK-LABEL: name: store_common_value_float_no_opt
221    ; CHECK: liveins: $x10, $x16_w
222    ; CHECK-NEXT: {{  $}}
223    ; CHECK-NEXT: SW_INX killed renamable $x16_w, killed renamable $x10, 0 :: (store (s32) into %ir.a)
224    ; CHECK-NEXT: PseudoRET
225    SW_INX killed renamable $x16_w, killed renamable $x10, 0 :: (store (s32) into %ir.a)
226    PseudoRET
227
228...
229---
230name:            store_common_ptr_float_no_opt
231tracksRegLiveness: true
232body:             |
233  bb.0.entry:
234    liveins: $x16, $x10_w
235
236    ; CHECK-LABEL: name: store_common_ptr_float_no_opt
237    ; CHECK: liveins: $x16, $x10_w
238    ; CHECK-NEXT: {{  $}}
239    ; CHECK-NEXT: SW_INX killed renamable $x10_w, killed renamable $x16, 0 :: (volatile store (s32) into %ir.p)
240    ; CHECK-NEXT: PseudoRET
241    SW_INX killed renamable $x10_w, killed renamable $x16, 0 :: (volatile store (s32) into %ir.p)
242    PseudoRET
243
244...
245---
246name:            load_common_ptr_float_no_opt
247tracksRegLiveness: true
248body:             |
249  bb.0.entry:
250    liveins: $x16
251
252    ; CHECK-LABEL: name: load_common_ptr_float_no_opt
253    ; CHECK: liveins: $x16
254    ; CHECK-NEXT: {{  $}}
255    ; CHECK-NEXT: renamable $x10_w = LW_INX killed renamable $x16, 0 :: (load (s32) from %ir.g)
256    ; CHECK-NEXT: PseudoRET implicit $x10_w
257    renamable $x10_w = LW_INX killed renamable $x16, 0 :: (load (s32) from %ir.g)
258    PseudoRET implicit $x10_w
259
260...
261---
262name:            store_large_offset_float_no_opt
263tracksRegLiveness: true
264body:             |
265  bb.0.entry:
266    liveins: $x10, $x11_w, $x12_w
267
268    ; CHECK-LABEL: name: store_large_offset_float_no_opt
269    ; CHECK: liveins: $x10, $x11_w, $x12_w
270    ; CHECK-NEXT: {{  $}}
271    ; CHECK-NEXT: SW_INX killed renamable $x11_w, renamable $x10, 400 :: (volatile store (s32) into %ir.0)
272    ; CHECK-NEXT: SW_INX killed renamable $x12_w, killed renamable $x10, 404 :: (volatile store (s32) into %ir.1)
273    ; CHECK-NEXT: PseudoRET
274    SW_INX killed renamable $x11_w, renamable $x10, 400 :: (volatile store (s32) into %ir.0)
275    SW_INX killed renamable $x12_w, killed renamable $x10, 404 :: (volatile store (s32) into %ir.1)
276    PseudoRET
277
278...
279---
280name:            load_large_offset_float_no_opt
281tracksRegLiveness: true
282body:             |
283  bb.0.entry:
284    liveins: $x10
285
286    ; CHECK-LABEL: name: load_large_offset_float_no_opt
287    ; CHECK: liveins: $x10
288    ; CHECK-NEXT: {{  $}}
289    ; CHECK-NEXT: renamable $x11_w = LW_INX renamable $x10, 400 :: (load (s32) from %ir.arrayidx)
290    ; CHECK-NEXT: renamable $x12_w = LW_INX killed renamable $x10, 404 :: (load (s32) from %ir.arrayidx1)
291    ; CHECK-NEXT: PseudoRET implicit $x11_w, implicit $x12_w
292    renamable $x11_w = LW_INX renamable $x10, 400 :: (load (s32) from %ir.arrayidx)
293    renamable $x12_w = LW_INX killed renamable $x10, 404 :: (load (s32) from %ir.arrayidx1)
294    PseudoRET implicit $x11_w, implicit $x12_w
295
296...
297