xref: /llvm-project/llvm/test/CodeGen/RISCV/macro-fusions.mir (revision 59eebb40fbedf6bc35746a0639f823a19ab0f030)
1# REQUIRES: asserts
2# RUN: llc -mtriple=riscv64-linux-gnu -x=mir < %s \
3# RUN:   -debug-only=machine-scheduler -start-before=machine-scheduler 2>&1 \
4# RUN:   -mattr=+lui-addi-fusion,+auipc-addi-fusion,+zexth-fusion,+zextw-fusion,+shifted-zextw-fusion,+ld-add-fusion \
5# RUN:   | FileCheck %s
6
7# CHECK: lui_addi:%bb.0
8# CHECK: Macro fuse: {{.*}}LUI - ADDI
9---
10name: lui_addi
11tracksRegLiveness: true
12body:             |
13  bb.0.entry:
14    liveins: $x10
15    %1:gpr = COPY $x10
16    %2:gpr = LUI 1
17    %3:gpr = XORI %1, 2
18    %4:gpr = ADDI %2, 3
19    $x10 = COPY %3
20    $x11 = COPY %4
21    PseudoRET
22...
23
24# CHECK: auipc_addi
25# CHECK: Macro fuse: {{.*}}AUIPC - ADDI
26---
27name: auipc_addi
28tracksRegLiveness: true
29body:             |
30  bb.0.entry:
31    liveins: $x10
32    %1:gpr = COPY $x10
33    %2:gpr = AUIPC 1
34    %3:gpr = XORI %1, 2
35    %4:gpr = ADDI %2, 3
36    $x10 = COPY %3
37    $x11 = COPY %4
38    PseudoRET
39...
40
41# CHECK: slli_srli_shifted_zext
42# CHECK: Macro fuse: {{.*}}SLLI - SRLI
43---
44name: slli_srli_shifted_zext
45tracksRegLiveness: true
46body:             |
47  bb.0.entry:
48    liveins: $x10
49    %1:gpr = COPY $x10
50    %2:gpr = SLLI %1, 32
51    %3:gpr = XORI %1, 3
52    %4:gpr = SRLI %2, 4
53    $x10 = COPY %3
54    $x11 = COPY %4
55    PseudoRET
56...
57
58# CHECK: slli_srli_zexth
59# CHECK: Macro fuse: {{.*}}SLLI - SRLI
60---
61name: slli_srli_zexth
62tracksRegLiveness: true
63body:             |
64  bb.0.entry:
65    liveins: $x10
66    %1:gpr = COPY $x10
67    %2:gpr = SLLI %1, 48
68    %3:gpr = XORI %1, 3
69    %4:gpr = SRLI %2, 48
70    $x10 = COPY %3
71    $x11 = COPY %4
72    PseudoRET
73...
74
75# CHECK: slli_srli_zextw
76# CHECK: Macro fuse: {{.*}}SLLI - SRLI
77---
78name: slli_srli_zextw
79tracksRegLiveness: true
80body:             |
81  bb.0.entry:
82    liveins: $x10
83    %1:gpr = COPY $x10
84    %2:gpr = SLLI %1, 32
85    %3:gpr = XORI %1, 3
86    %4:gpr = SRLI %2, 32
87    $x10 = COPY %3
88    $x11 = COPY %4
89    PseudoRET
90...
91
92# CHECK: slli_srli_no_fusion_0
93# CHECK-NOT: Macro fuse: {{.*}}SLLI - SRLI
94---
95name: slli_srli_no_fusion_0
96tracksRegLiveness: true
97body:             |
98  bb.0.entry:
99    liveins: $x10
100    %1:gpr = COPY $x10
101    %2:gpr = SLLI %1, 32
102    %3:gpr = XORI %1, 3
103    %4:gpr = SRLI %2, 33
104    $x10 = COPY %3
105    $x11 = COPY %4
106    PseudoRET
107...
108
109# CHECK: slli_srli_no_fusion_1
110# CHECK-NOT: Macro fuse: {{.*}}SLLI - SRLI
111---
112name: slli_srli_no_fusion_1
113tracksRegLiveness: true
114body:             |
115  bb.0.entry:
116    liveins: $x10
117    %1:gpr = COPY $x10
118    %2:gpr = SLLI %1, 48
119    %3:gpr = XORI %1, 3
120    %4:gpr = SRLI %2, 4
121    $x10 = COPY %3
122    $x11 = COPY %4
123    PseudoRET
124...
125
126# CHECK: slli_srli_no_fusion_2
127# CHECK-NOT: Macro fuse: {{.*}}SLLI - SRLI
128---
129name: slli_srli_no_fusion_2
130tracksRegLiveness: true
131body:             |
132  bb.0.entry:
133    liveins: $x10
134    %1:gpr = COPY $x10
135    %2:gpr = SLLI %1, 31
136    %3:gpr = XORI %1, 3
137    %4:gpr = SRLI %2, 4
138    $x10 = COPY %3
139    $x11 = COPY %4
140    PseudoRET
141...
142
143# CHECK: slli_srli_no_fusion_3
144# CHECK-NOT: Macro fuse: {{.*}}SLLI - SRLI
145---
146name: slli_srli_no_fusion_3
147tracksRegLiveness: true
148body:             |
149  bb.0.entry:
150    liveins: $x10
151    %1:gpr = COPY $x10
152    %2:gpr = SLLI %1, 31
153    %3:gpr = XORI %1, 3
154    %4:gpr = SRLI %2, 48
155    $x10 = COPY %3
156    $x11 = COPY %4
157    PseudoRET
158...
159
160# CHECK: ld_add
161# CHECK: Macro fuse: {{.*}}ADD - LD
162---
163name: ld_add
164tracksRegLiveness: true
165body:             |
166  bb.0.entry:
167    liveins: $x10, $x11
168    %1:gpr = COPY $x10
169    %2:gpr = COPY $x11
170    %3:gpr = ADD %1, %2
171    %4:gpr = XORI %2, 3
172    %5:gpr = LD %3, 0
173    $x10 = COPY %4
174    $x11 = COPY %5
175    PseudoRET
176...
177