xref: /llvm-project/llvm/test/CodeGen/RISCV/live-sp.mir (revision a0b049055df592759e4ac1d8032139f385581c63) 
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -mtriple=riscv64 -run-pass=prologepilog -simplify-mir  -o - %s | FileCheck %s
3# verify live-on-entry registers are not marked killed by spills
4--- |
5
6  declare void @vararg(i32 signext, ...)
7
8  define void @test1() {
9  entry:
10    %a = alloca i32, align 4
11    %0 = call ptr @llvm.returnaddress(i32 0)
12    %1 = ptrtoint ptr %0 to i64
13    %conv = trunc i64 %1 to i32
14    store i32 %conv, ptr %a, align 4
15    %2 = load i32, ptr %a, align 4
16    call void (i32, ...) @vararg(i32 signext 0, i32 signext %2)
17    ret void
18  }
19
20  ; Function Attrs: nofree nosync nounwind readnone willreturn
21  declare ptr @llvm.returnaddress(i32 immarg) #0
22
23  attributes #0 = { nofree nosync nounwind readnone willreturn }
24
25...
26---
27name:            test1
28alignment:       4
29exposesReturnsTwice: false
30legalized:       false
31regBankSelected: false
32selected:        false
33failedISel:      false
34tracksRegLiveness: true
35hasWinCFI:       false
36registers:       []
37liveins:
38  - { reg: '$x1', virtual-reg: '' }
39frameInfo:
40  isFrameAddressTaken: false
41  isReturnAddressTaken: true
42  hasStackMap:     false
43  hasPatchPoint:   false
44  stackSize:       0
45  offsetAdjustment: 0
46  maxAlignment:    4
47  adjustsStack:    true
48  hasCalls:        true
49  stackProtector:  ''
50  maxCallFrameSize: 4294967295
51  cvBytesOfCalleeSavedRegisters: 0
52  hasOpaqueSPAdjustment: false
53  hasVAStart:      false
54  hasMustTailInVarArgFunc: false
55  hasTailCall:     false
56  localFrameSize:  0
57  savePoint:       ''
58  restorePoint:    ''
59fixedStack:      []
60stack:
61  - { id: 0, name: a, type: default, offset: 0, size: 4, alignment: 4,
62      stack-id: default, callee-saved-register: '', callee-saved-restored: true,
63      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
64callSites:       []
65debugValueSubstitutions: []
66constants:       []
67machineFunctionInfo: {}
68body:             |
69  bb.0.entry:
70    liveins: $x1
71
72    ; CHECK-LABEL: name: test1
73    ; CHECK: liveins: $x1
74    ; CHECK-NEXT: {{  $}}
75    ; CHECK-NEXT: $x2 = frame-setup ADDI $x2, -16
76    ; CHECK-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 16
77    ; CHECK-NEXT: frame-setup SD $x1, $x2, 8 :: (store (s64) into %stack.1)
78    ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $x1, -8
79    ; CHECK-NEXT: SW renamable $x1, $x2, 4 :: (store (s32) into %ir.a)
80    ; CHECK-NEXT: renamable $x11 = ADDIW killed renamable $x1, 0
81    ; CHECK-NEXT: $x10 = COPY $x0
82    ; CHECK-NEXT: PseudoCALL target-flags(riscv-call) @vararg, csr_ilp32_lp64, implicit-def dead $x1, implicit killed $x10, implicit $x11, implicit-def $x2
83    ; CHECK-NEXT: $x1 = frame-destroy LD $x2, 8 :: (load (s64) from %stack.1)
84    ; CHECK-NEXT: frame-destroy CFI_INSTRUCTION restore $x1
85    ; CHECK-NEXT: $x2 = frame-destroy ADDI $x2, 16
86    ; CHECK-NEXT: frame-destroy CFI_INSTRUCTION def_cfa_offset 0
87    ; CHECK-NEXT: PseudoRET
88    SW renamable $x1, %stack.0.a, 0 :: (store (s32) into %ir.a)
89    renamable $x11 = ADDIW killed renamable $x1, 0
90    ADJCALLSTACKDOWN 0, 0, implicit-def dead $x2, implicit $x2
91    $x10 = COPY $x0
92    PseudoCALL target-flags(riscv-call) @vararg, csr_ilp32_lp64, implicit-def dead $x1, implicit killed $x10, implicit $x11, implicit-def $x2
93    ADJCALLSTACKUP 0, 0, implicit-def dead $x2, implicit $x2
94    PseudoRET
95
96...
97