xref: /llvm-project/llvm/test/CodeGen/RISCV/get-register-reserve.ll (revision 4ad76852584480b646d1ce360202e18591ea8938)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: not --crash llc < %s -mtriple=riscv32 -mattr +reserve-x8 2>&1 \
3; RUN:   | FileCheck -check-prefix=NO-RESERVE-A1 %s
4; RUN: not --crash llc < %s -mtriple=riscv32 -mattr +reserve-x11 2>&1 \
5; RUN:   | FileCheck -check-prefix=NO-RESERVE-FP %s
6; RUN: llc < %s -mtriple=riscv32 -mattr +reserve-x8 -mattr +reserve-x11 \
7; RUN:   | FileCheck -check-prefix=RESERVE %s
8
9define i32 @get_reg_a1() nounwind {
10; NO-RESERVE-A1: Trying to obtain non-reserved register "a1".
11; RESERVE-LABEL: get_reg_a1:
12; RESERVE:       # %bb.0: # %entry
13; RESERVE-NEXT:    mv a0, a1
14; RESERVE-NEXT:    ret
15entry:
16  %a1 = call i32 @llvm.read_register.i32(metadata !0)
17  ret i32 %a1
18}
19
20define i32 @get_reg_fp() nounwind {
21; NO-RESERVE-FP: Trying to obtain non-reserved register "fp".
22; RESERVE-LABEL: get_reg_fp:
23; RESERVE:       # %bb.0: # %entry
24; RESERVE-NEXT:    mv a0, s0
25; RESERVE-NEXT:    ret
26entry:
27  %fp = call i32 @llvm.read_register.i32(metadata !1)
28  ret i32 %fp
29}
30
31declare i32 @llvm.read_register.i32(metadata) nounwind
32
33!0 = !{!"a1\00"}
34!1 = !{!"fp\00"}
35