1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=riscv32 -mattr=+f -target-abi ilp32e -verify-machineinstrs < %s \ 3; RUN: | FileCheck %s -check-prefix=RV32IF-ILP32E 4 5; Exercises the ILP32E calling convention code in the case that f32 is a legal 6; type. As well as testing that lowering is correct, these tests also aim to 7; check that floating point load/store or integer load/store is chosen 8; optimally when floats are passed on the stack. 9 10define float @onstack_f32_noop(i64 %a, i64 %b, i64 %c, i64 %d, float %e, float %f) nounwind { 11; RV32IF-ILP32E-LABEL: onstack_f32_noop: 12; RV32IF-ILP32E: # %bb.0: 13; RV32IF-ILP32E-NEXT: lw a0, 12(sp) 14; RV32IF-ILP32E-NEXT: ret 15 ret float %f 16} 17 18define float @onstack_f32_fadd(i64 %a, i64 %b, i64 %c, i64 %d, float %e, float %f) nounwind { 19; RV32IF-ILP32E-LABEL: onstack_f32_fadd: 20; RV32IF-ILP32E: # %bb.0: 21; RV32IF-ILP32E-NEXT: flw fa5, 12(sp) 22; RV32IF-ILP32E-NEXT: flw fa4, 8(sp) 23; RV32IF-ILP32E-NEXT: fadd.s fa5, fa4, fa5 24; RV32IF-ILP32E-NEXT: fmv.x.w a0, fa5 25; RV32IF-ILP32E-NEXT: ret 26 %1 = fadd float %e, %f 27 ret float %1 28} 29 30define float @caller_onstack_f32_noop(float %a) nounwind { 31; RV32IF-ILP32E-LABEL: caller_onstack_f32_noop: 32; RV32IF-ILP32E: # %bb.0: 33; RV32IF-ILP32E-NEXT: addi sp, sp, -20 34; RV32IF-ILP32E-NEXT: sw ra, 16(sp) # 4-byte Folded Spill 35; RV32IF-ILP32E-NEXT: mv a1, a0 36; RV32IF-ILP32E-NEXT: lui a3, 264704 37; RV32IF-ILP32E-NEXT: li a5, 4 38; RV32IF-ILP32E-NEXT: li a0, 1 39; RV32IF-ILP32E-NEXT: li a2, 2 40; RV32IF-ILP32E-NEXT: li a4, 3 41; RV32IF-ILP32E-NEXT: sw a5, 0(sp) 42; RV32IF-ILP32E-NEXT: sw zero, 4(sp) 43; RV32IF-ILP32E-NEXT: sw a3, 8(sp) 44; RV32IF-ILP32E-NEXT: sw a1, 12(sp) 45; RV32IF-ILP32E-NEXT: li a1, 0 46; RV32IF-ILP32E-NEXT: li a3, 0 47; RV32IF-ILP32E-NEXT: li a5, 0 48; RV32IF-ILP32E-NEXT: call onstack_f32_noop 49; RV32IF-ILP32E-NEXT: lw ra, 16(sp) # 4-byte Folded Reload 50; RV32IF-ILP32E-NEXT: addi sp, sp, 20 51; RV32IF-ILP32E-NEXT: ret 52 %1 = call float @onstack_f32_noop(i64 1, i64 2, i64 3, i64 4, float 5.0, float %a) 53 ret float %1 54} 55 56define float @caller_onstack_f32_fadd(float %a, float %b) nounwind { 57; RV32IF-ILP32E-LABEL: caller_onstack_f32_fadd: 58; RV32IF-ILP32E: # %bb.0: 59; RV32IF-ILP32E-NEXT: addi sp, sp, -20 60; RV32IF-ILP32E-NEXT: sw ra, 16(sp) # 4-byte Folded Spill 61; RV32IF-ILP32E-NEXT: fmv.w.x fa5, a1 62; RV32IF-ILP32E-NEXT: fmv.w.x fa4, a0 63; RV32IF-ILP32E-NEXT: fadd.s fa3, fa4, fa5 64; RV32IF-ILP32E-NEXT: fsub.s fa5, fa5, fa4 65; RV32IF-ILP32E-NEXT: li a1, 4 66; RV32IF-ILP32E-NEXT: li a0, 1 67; RV32IF-ILP32E-NEXT: li a2, 2 68; RV32IF-ILP32E-NEXT: li a4, 3 69; RV32IF-ILP32E-NEXT: sw a1, 0(sp) 70; RV32IF-ILP32E-NEXT: sw zero, 4(sp) 71; RV32IF-ILP32E-NEXT: fsw fa3, 8(sp) 72; RV32IF-ILP32E-NEXT: fsw fa5, 12(sp) 73; RV32IF-ILP32E-NEXT: li a1, 0 74; RV32IF-ILP32E-NEXT: li a3, 0 75; RV32IF-ILP32E-NEXT: li a5, 0 76; RV32IF-ILP32E-NEXT: call onstack_f32_noop 77; RV32IF-ILP32E-NEXT: lw ra, 16(sp) # 4-byte Folded Reload 78; RV32IF-ILP32E-NEXT: addi sp, sp, 20 79; RV32IF-ILP32E-NEXT: ret 80 %1 = fadd float %a, %b 81 %2 = fsub float %b, %a 82 %3 = call float @onstack_f32_noop(i64 1, i64 2, i64 3, i64 4, float %1, float %2) 83 ret float %3 84} 85