xref: /llvm-project/llvm/test/CodeGen/RISCV/calling-conv-rv32f-ilp32.ll (revision 2967e5f8007d873a3e9d97870d2461d0827a3976)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=riscv32 -mattr=+f -target-abi=ilp32 -verify-machineinstrs < %s \
3; RUN:   | FileCheck %s -check-prefix=RV32IF
4
5; Exercises the ILP32 calling convention code in the case that f32 is a legal
6; type. As well as testing that lowering is correct, these tests also aim to
7; check that floating point load/store or integer load/store is chosen
8; optimally when floats are passed on the stack.
9
10define float @onstack_f32_noop(i64 %a, i64 %b, i64 %c, i64 %d, float %e, float %f) nounwind {
11; RV32IF-LABEL: onstack_f32_noop:
12; RV32IF:       # %bb.0:
13; RV32IF-NEXT:    lw a0, 4(sp)
14; RV32IF-NEXT:    ret
15  ret float %f
16}
17
18define float @onstack_f32_fadd(i64 %a, i64 %b, i64 %c, i64 %d, float %e, float %f) nounwind {
19; RV32IF-LABEL: onstack_f32_fadd:
20; RV32IF:       # %bb.0:
21; RV32IF-NEXT:    flw fa5, 4(sp)
22; RV32IF-NEXT:    flw fa4, 0(sp)
23; RV32IF-NEXT:    fadd.s fa5, fa4, fa5
24; RV32IF-NEXT:    fmv.x.w a0, fa5
25; RV32IF-NEXT:    ret
26  %1 = fadd float %e, %f
27  ret float %1
28}
29
30define float @caller_onstack_f32_noop(float %a) nounwind {
31; RV32IF-LABEL: caller_onstack_f32_noop:
32; RV32IF:       # %bb.0:
33; RV32IF-NEXT:    addi sp, sp, -16
34; RV32IF-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
35; RV32IF-NEXT:    mv a1, a0
36; RV32IF-NEXT:    lui a3, 264704
37; RV32IF-NEXT:    li a0, 1
38; RV32IF-NEXT:    li a2, 2
39; RV32IF-NEXT:    li a4, 3
40; RV32IF-NEXT:    li a6, 4
41; RV32IF-NEXT:    sw a3, 0(sp)
42; RV32IF-NEXT:    sw a1, 4(sp)
43; RV32IF-NEXT:    li a1, 0
44; RV32IF-NEXT:    li a3, 0
45; RV32IF-NEXT:    li a5, 0
46; RV32IF-NEXT:    li a7, 0
47; RV32IF-NEXT:    call onstack_f32_noop
48; RV32IF-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
49; RV32IF-NEXT:    addi sp, sp, 16
50; RV32IF-NEXT:    ret
51  %1 = call float @onstack_f32_noop(i64 1, i64 2, i64 3, i64 4, float 5.0, float %a)
52  ret float %1
53}
54
55define float @caller_onstack_f32_fadd(float %a, float %b) nounwind {
56; RV32IF-LABEL: caller_onstack_f32_fadd:
57; RV32IF:       # %bb.0:
58; RV32IF-NEXT:    addi sp, sp, -16
59; RV32IF-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
60; RV32IF-NEXT:    fmv.w.x fa5, a1
61; RV32IF-NEXT:    fmv.w.x fa4, a0
62; RV32IF-NEXT:    fadd.s fa3, fa4, fa5
63; RV32IF-NEXT:    fsub.s fa5, fa5, fa4
64; RV32IF-NEXT:    li a0, 1
65; RV32IF-NEXT:    li a2, 2
66; RV32IF-NEXT:    li a4, 3
67; RV32IF-NEXT:    li a6, 4
68; RV32IF-NEXT:    fsw fa3, 0(sp)
69; RV32IF-NEXT:    fsw fa5, 4(sp)
70; RV32IF-NEXT:    li a1, 0
71; RV32IF-NEXT:    li a3, 0
72; RV32IF-NEXT:    li a5, 0
73; RV32IF-NEXT:    li a7, 0
74; RV32IF-NEXT:    call onstack_f32_noop
75; RV32IF-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
76; RV32IF-NEXT:    addi sp, sp, 16
77; RV32IF-NEXT:    ret
78  %1 = fadd float %a, %b
79  %2 = fsub float %b, %a
80  %3 = call float @onstack_f32_noop(i64 1, i64 2, i64 3, i64 4, float %1, float %2)
81  ret float %3
82}
83