xref: /llvm-project/llvm/test/CodeGen/RISCV/branch-relaxation-rv32.ll (revision 6d91d7ce6aeb46d948a5a476909825b71b0c84a2) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=riscv32 -verify-machineinstrs -filetype=obj < %s \
3; RUN:   -o /dev/null 2>&1
4; RUN: llc -mtriple=riscv32 -relocation-model=pic -verify-machineinstrs \
5; RUN:   -filetype=obj < %s -o /dev/null 2>&1
6; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \
7; RUN:   | FileCheck %s
8; RUN: llc -mtriple=riscv32 -relocation-model=pic -verify-machineinstrs < %s \
9; RUN:   | FileCheck %s
10
11define void @relax_bcc(i1 %a) nounwind {
12; CHECK-LABEL: relax_bcc:
13; CHECK:       # %bb.0:
14; CHECK-NEXT:    andi a0, a0, 1
15; CHECK-NEXT:    bnez a0, .LBB0_1
16; CHECK-NEXT:    j .LBB0_2
17; CHECK-NEXT:  .LBB0_1: # %iftrue
18; CHECK-NEXT:    #APP
19; CHECK-NEXT:    .zero 4096
20; CHECK-NEXT:    #NO_APP
21; CHECK-NEXT:  .LBB0_2: # %tail
22; CHECK-NEXT:    ret
23  br i1 %a, label %iftrue, label %tail
24
25iftrue:
26  call void asm sideeffect ".space 4096", ""()
27  br label %tail
28
29tail:
30  ret void
31}
32
33define i32 @relax_jal(i1 %a) nounwind {
34; CHECK-LABEL: relax_jal:
35; CHECK:       # %bb.0:
36; CHECK-NEXT:    addi sp, sp, -16
37; CHECK-NEXT:    andi a0, a0, 1
38; CHECK-NEXT:    bnez a0, .LBB1_1
39; CHECK-NEXT:  # %bb.4:
40; CHECK-NEXT:    jump .LBB1_2, a0
41; CHECK-NEXT:  .LBB1_1: # %iftrue
42; CHECK-NEXT:    #APP
43; CHECK-NEXT:    #NO_APP
44; CHECK-NEXT:    #APP
45; CHECK-NEXT:    .zero 1048576
46; CHECK-NEXT:    #NO_APP
47; CHECK-NEXT:    j .LBB1_3
48; CHECK-NEXT:  .LBB1_2: # %jmp
49; CHECK-NEXT:    #APP
50; CHECK-NEXT:    #NO_APP
51; CHECK-NEXT:  .LBB1_3: # %tail
52; CHECK-NEXT:    li a0, 1
53; CHECK-NEXT:    addi sp, sp, 16
54; CHECK-NEXT:    ret
55  br i1 %a, label %iftrue, label %jmp
56
57jmp:
58  call void asm sideeffect "", ""()
59  br label %tail
60
61iftrue:
62  call void asm sideeffect "", ""()
63  br label %space
64
65space:
66  call void asm sideeffect ".space 1048576", ""()
67  br label %tail
68
69tail:
70  ret i32 1
71}
72
73define void @relax_jal_spill_32() {
74; CHECK-LABEL: relax_jal_spill_32:
75; CHECK:       # %bb.0:
76; CHECK-NEXT:    addi sp, sp, -64
77; CHECK-NEXT:    .cfi_def_cfa_offset 64
78; CHECK-NEXT:    sw ra, 60(sp) # 4-byte Folded Spill
79; CHECK-NEXT:    sw s0, 56(sp) # 4-byte Folded Spill
80; CHECK-NEXT:    sw s1, 52(sp) # 4-byte Folded Spill
81; CHECK-NEXT:    sw s2, 48(sp) # 4-byte Folded Spill
82; CHECK-NEXT:    sw s3, 44(sp) # 4-byte Folded Spill
83; CHECK-NEXT:    sw s4, 40(sp) # 4-byte Folded Spill
84; CHECK-NEXT:    sw s5, 36(sp) # 4-byte Folded Spill
85; CHECK-NEXT:    sw s6, 32(sp) # 4-byte Folded Spill
86; CHECK-NEXT:    sw s7, 28(sp) # 4-byte Folded Spill
87; CHECK-NEXT:    sw s8, 24(sp) # 4-byte Folded Spill
88; CHECK-NEXT:    sw s9, 20(sp) # 4-byte Folded Spill
89; CHECK-NEXT:    sw s10, 16(sp) # 4-byte Folded Spill
90; CHECK-NEXT:    sw s11, 12(sp) # 4-byte Folded Spill
91; CHECK-NEXT:    .cfi_offset ra, -4
92; CHECK-NEXT:    .cfi_offset s0, -8
93; CHECK-NEXT:    .cfi_offset s1, -12
94; CHECK-NEXT:    .cfi_offset s2, -16
95; CHECK-NEXT:    .cfi_offset s3, -20
96; CHECK-NEXT:    .cfi_offset s4, -24
97; CHECK-NEXT:    .cfi_offset s5, -28
98; CHECK-NEXT:    .cfi_offset s6, -32
99; CHECK-NEXT:    .cfi_offset s7, -36
100; CHECK-NEXT:    .cfi_offset s8, -40
101; CHECK-NEXT:    .cfi_offset s9, -44
102; CHECK-NEXT:    .cfi_offset s10, -48
103; CHECK-NEXT:    .cfi_offset s11, -52
104; CHECK-NEXT:    #APP
105; CHECK-NEXT:    li ra, 1
106; CHECK-NEXT:    #NO_APP
107; CHECK-NEXT:    #APP
108; CHECK-NEXT:    li t0, 5
109; CHECK-NEXT:    #NO_APP
110; CHECK-NEXT:    #APP
111; CHECK-NEXT:    li t1, 6
112; CHECK-NEXT:    #NO_APP
113; CHECK-NEXT:    #APP
114; CHECK-NEXT:    li t2, 7
115; CHECK-NEXT:    #NO_APP
116; CHECK-NEXT:    #APP
117; CHECK-NEXT:    li s0, 8
118; CHECK-NEXT:    #NO_APP
119; CHECK-NEXT:    #APP
120; CHECK-NEXT:    li s1, 9
121; CHECK-NEXT:    #NO_APP
122; CHECK-NEXT:    #APP
123; CHECK-NEXT:    li a0, 10
124; CHECK-NEXT:    #NO_APP
125; CHECK-NEXT:    #APP
126; CHECK-NEXT:    li a1, 11
127; CHECK-NEXT:    #NO_APP
128; CHECK-NEXT:    #APP
129; CHECK-NEXT:    li a2, 12
130; CHECK-NEXT:    #NO_APP
131; CHECK-NEXT:    #APP
132; CHECK-NEXT:    li a3, 13
133; CHECK-NEXT:    #NO_APP
134; CHECK-NEXT:    #APP
135; CHECK-NEXT:    li a4, 14
136; CHECK-NEXT:    #NO_APP
137; CHECK-NEXT:    #APP
138; CHECK-NEXT:    li a5, 15
139; CHECK-NEXT:    #NO_APP
140; CHECK-NEXT:    #APP
141; CHECK-NEXT:    li a6, 16
142; CHECK-NEXT:    #NO_APP
143; CHECK-NEXT:    #APP
144; CHECK-NEXT:    li a7, 17
145; CHECK-NEXT:    #NO_APP
146; CHECK-NEXT:    #APP
147; CHECK-NEXT:    li s2, 18
148; CHECK-NEXT:    #NO_APP
149; CHECK-NEXT:    #APP
150; CHECK-NEXT:    li s3, 19
151; CHECK-NEXT:    #NO_APP
152; CHECK-NEXT:    #APP
153; CHECK-NEXT:    li s4, 20
154; CHECK-NEXT:    #NO_APP
155; CHECK-NEXT:    #APP
156; CHECK-NEXT:    li s5, 21
157; CHECK-NEXT:    #NO_APP
158; CHECK-NEXT:    #APP
159; CHECK-NEXT:    li s6, 22
160; CHECK-NEXT:    #NO_APP
161; CHECK-NEXT:    #APP
162; CHECK-NEXT:    li s7, 23
163; CHECK-NEXT:    #NO_APP
164; CHECK-NEXT:    #APP
165; CHECK-NEXT:    li s8, 24
166; CHECK-NEXT:    #NO_APP
167; CHECK-NEXT:    #APP
168; CHECK-NEXT:    li s9, 25
169; CHECK-NEXT:    #NO_APP
170; CHECK-NEXT:    #APP
171; CHECK-NEXT:    li s10, 26
172; CHECK-NEXT:    #NO_APP
173; CHECK-NEXT:    #APP
174; CHECK-NEXT:    li s11, 27
175; CHECK-NEXT:    #NO_APP
176; CHECK-NEXT:    #APP
177; CHECK-NEXT:    li t3, 28
178; CHECK-NEXT:    #NO_APP
179; CHECK-NEXT:    #APP
180; CHECK-NEXT:    li t4, 29
181; CHECK-NEXT:    #NO_APP
182; CHECK-NEXT:    #APP
183; CHECK-NEXT:    li t5, 30
184; CHECK-NEXT:    #NO_APP
185; CHECK-NEXT:    #APP
186; CHECK-NEXT:    li t6, 31
187; CHECK-NEXT:    #NO_APP
188; CHECK-NEXT:    beq t5, t6, .LBB2_1
189; CHECK-NEXT:  # %bb.3:
190; CHECK-NEXT:    sw s11, 0(sp)
191; CHECK-NEXT:    jump .LBB2_4, s11
192; CHECK-NEXT:  .LBB2_1: # %branch_1
193; CHECK-NEXT:    #APP
194; CHECK-NEXT:    .zero 1048576
195; CHECK-NEXT:    #NO_APP
196; CHECK-NEXT:    j .LBB2_2
197; CHECK-NEXT:  .LBB2_4: # %branch_2
198; CHECK-NEXT:    lw s11, 0(sp)
199; CHECK-NEXT:  .LBB2_2: # %branch_2
200; CHECK-NEXT:    #APP
201; CHECK-NEXT:    # reg use ra
202; CHECK-NEXT:    #NO_APP
203; CHECK-NEXT:    #APP
204; CHECK-NEXT:    # reg use t0
205; CHECK-NEXT:    #NO_APP
206; CHECK-NEXT:    #APP
207; CHECK-NEXT:    # reg use t1
208; CHECK-NEXT:    #NO_APP
209; CHECK-NEXT:    #APP
210; CHECK-NEXT:    # reg use t2
211; CHECK-NEXT:    #NO_APP
212; CHECK-NEXT:    #APP
213; CHECK-NEXT:    # reg use s0
214; CHECK-NEXT:    #NO_APP
215; CHECK-NEXT:    #APP
216; CHECK-NEXT:    # reg use s1
217; CHECK-NEXT:    #NO_APP
218; CHECK-NEXT:    #APP
219; CHECK-NEXT:    # reg use a0
220; CHECK-NEXT:    #NO_APP
221; CHECK-NEXT:    #APP
222; CHECK-NEXT:    # reg use a1
223; CHECK-NEXT:    #NO_APP
224; CHECK-NEXT:    #APP
225; CHECK-NEXT:    # reg use a2
226; CHECK-NEXT:    #NO_APP
227; CHECK-NEXT:    #APP
228; CHECK-NEXT:    # reg use a3
229; CHECK-NEXT:    #NO_APP
230; CHECK-NEXT:    #APP
231; CHECK-NEXT:    # reg use a4
232; CHECK-NEXT:    #NO_APP
233; CHECK-NEXT:    #APP
234; CHECK-NEXT:    # reg use a5
235; CHECK-NEXT:    #NO_APP
236; CHECK-NEXT:    #APP
237; CHECK-NEXT:    # reg use a6
238; CHECK-NEXT:    #NO_APP
239; CHECK-NEXT:    #APP
240; CHECK-NEXT:    # reg use a7
241; CHECK-NEXT:    #NO_APP
242; CHECK-NEXT:    #APP
243; CHECK-NEXT:    # reg use s2
244; CHECK-NEXT:    #NO_APP
245; CHECK-NEXT:    #APP
246; CHECK-NEXT:    # reg use s3
247; CHECK-NEXT:    #NO_APP
248; CHECK-NEXT:    #APP
249; CHECK-NEXT:    # reg use s4
250; CHECK-NEXT:    #NO_APP
251; CHECK-NEXT:    #APP
252; CHECK-NEXT:    # reg use s5
253; CHECK-NEXT:    #NO_APP
254; CHECK-NEXT:    #APP
255; CHECK-NEXT:    # reg use s6
256; CHECK-NEXT:    #NO_APP
257; CHECK-NEXT:    #APP
258; CHECK-NEXT:    # reg use s7
259; CHECK-NEXT:    #NO_APP
260; CHECK-NEXT:    #APP
261; CHECK-NEXT:    # reg use s8
262; CHECK-NEXT:    #NO_APP
263; CHECK-NEXT:    #APP
264; CHECK-NEXT:    # reg use s9
265; CHECK-NEXT:    #NO_APP
266; CHECK-NEXT:    #APP
267; CHECK-NEXT:    # reg use s10
268; CHECK-NEXT:    #NO_APP
269; CHECK-NEXT:    #APP
270; CHECK-NEXT:    # reg use s11
271; CHECK-NEXT:    #NO_APP
272; CHECK-NEXT:    #APP
273; CHECK-NEXT:    # reg use t3
274; CHECK-NEXT:    #NO_APP
275; CHECK-NEXT:    #APP
276; CHECK-NEXT:    # reg use t4
277; CHECK-NEXT:    #NO_APP
278; CHECK-NEXT:    #APP
279; CHECK-NEXT:    # reg use t5
280; CHECK-NEXT:    #NO_APP
281; CHECK-NEXT:    #APP
282; CHECK-NEXT:    # reg use t6
283; CHECK-NEXT:    #NO_APP
284; CHECK-NEXT:    lw ra, 60(sp) # 4-byte Folded Reload
285; CHECK-NEXT:    lw s0, 56(sp) # 4-byte Folded Reload
286; CHECK-NEXT:    lw s1, 52(sp) # 4-byte Folded Reload
287; CHECK-NEXT:    lw s2, 48(sp) # 4-byte Folded Reload
288; CHECK-NEXT:    lw s3, 44(sp) # 4-byte Folded Reload
289; CHECK-NEXT:    lw s4, 40(sp) # 4-byte Folded Reload
290; CHECK-NEXT:    lw s5, 36(sp) # 4-byte Folded Reload
291; CHECK-NEXT:    lw s6, 32(sp) # 4-byte Folded Reload
292; CHECK-NEXT:    lw s7, 28(sp) # 4-byte Folded Reload
293; CHECK-NEXT:    lw s8, 24(sp) # 4-byte Folded Reload
294; CHECK-NEXT:    lw s9, 20(sp) # 4-byte Folded Reload
295; CHECK-NEXT:    lw s10, 16(sp) # 4-byte Folded Reload
296; CHECK-NEXT:    lw s11, 12(sp) # 4-byte Folded Reload
297; CHECK-NEXT:    .cfi_restore ra
298; CHECK-NEXT:    .cfi_restore s0
299; CHECK-NEXT:    .cfi_restore s1
300; CHECK-NEXT:    .cfi_restore s2
301; CHECK-NEXT:    .cfi_restore s3
302; CHECK-NEXT:    .cfi_restore s4
303; CHECK-NEXT:    .cfi_restore s5
304; CHECK-NEXT:    .cfi_restore s6
305; CHECK-NEXT:    .cfi_restore s7
306; CHECK-NEXT:    .cfi_restore s8
307; CHECK-NEXT:    .cfi_restore s9
308; CHECK-NEXT:    .cfi_restore s10
309; CHECK-NEXT:    .cfi_restore s11
310; CHECK-NEXT:    addi sp, sp, 64
311; CHECK-NEXT:    .cfi_def_cfa_offset 0
312; CHECK-NEXT:    ret
313  %ra = call i32 asm sideeffect "addi ra, x0, 1", "={ra}"()
314  %t0 = call i32 asm sideeffect "addi t0, x0, 5", "={t0}"()
315  %t1 = call i32 asm sideeffect "addi t1, x0, 6", "={t1}"()
316  %t2 = call i32 asm sideeffect "addi t2, x0, 7", "={t2}"()
317  %s0 = call i32 asm sideeffect "addi s0, x0, 8", "={s0}"()
318  %s1 = call i32 asm sideeffect "addi s1, x0, 9", "={s1}"()
319  %a0 = call i32 asm sideeffect "addi a0, x0, 10", "={a0}"()
320  %a1 = call i32 asm sideeffect "addi a1, x0, 11", "={a1}"()
321  %a2 = call i32 asm sideeffect "addi a2, x0, 12", "={a2}"()
322  %a3 = call i32 asm sideeffect "addi a3, x0, 13", "={a3}"()
323  %a4 = call i32 asm sideeffect "addi a4, x0, 14", "={a4}"()
324  %a5 = call i32 asm sideeffect "addi a5, x0, 15", "={a5}"()
325  %a6 = call i32 asm sideeffect "addi a6, x0, 16", "={a6}"()
326  %a7 = call i32 asm sideeffect "addi a7, x0, 17", "={a7}"()
327  %s2 = call i32 asm sideeffect "addi s2, x0, 18", "={s2}"()
328  %s3 = call i32 asm sideeffect "addi s3, x0, 19", "={s3}"()
329  %s4 = call i32 asm sideeffect "addi s4, x0, 20", "={s4}"()
330  %s5 = call i32 asm sideeffect "addi s5, x0, 21", "={s5}"()
331  %s6 = call i32 asm sideeffect "addi s6, x0, 22", "={s6}"()
332  %s7 = call i32 asm sideeffect "addi s7, x0, 23", "={s7}"()
333  %s8 = call i32 asm sideeffect "addi s8, x0, 24", "={s8}"()
334  %s9 = call i32 asm sideeffect "addi s9, x0, 25", "={s9}"()
335  %s10 = call i32 asm sideeffect "addi s10, x0, 26", "={s10}"()
336  %s11 = call i32 asm sideeffect "addi s11, x0, 27", "={s11}"()
337  %t3 = call i32 asm sideeffect "addi t3, x0, 28", "={t3}"()
338  %t4 = call i32 asm sideeffect "addi t4, x0, 29", "={t4}"()
339  %t5 = call i32 asm sideeffect "addi t5, x0, 30", "={t5}"()
340  %t6 = call i32 asm sideeffect "addi t6, x0, 31", "={t6}"()
341
342  %cmp = icmp eq i32 %t5, %t6
343  br i1 %cmp, label %branch_1, label %branch_2
344
345branch_1:
346  call void asm sideeffect ".space 1048576", ""()
347  br label %branch_2
348
349branch_2:
350  call void asm sideeffect "# reg use $0", "{ra}"(i32 %ra)
351  call void asm sideeffect "# reg use $0", "{t0}"(i32 %t0)
352  call void asm sideeffect "# reg use $0", "{t1}"(i32 %t1)
353  call void asm sideeffect "# reg use $0", "{t2}"(i32 %t2)
354  call void asm sideeffect "# reg use $0", "{s0}"(i32 %s0)
355  call void asm sideeffect "# reg use $0", "{s1}"(i32 %s1)
356  call void asm sideeffect "# reg use $0", "{a0}"(i32 %a0)
357  call void asm sideeffect "# reg use $0", "{a1}"(i32 %a1)
358  call void asm sideeffect "# reg use $0", "{a2}"(i32 %a2)
359  call void asm sideeffect "# reg use $0", "{a3}"(i32 %a3)
360  call void asm sideeffect "# reg use $0", "{a4}"(i32 %a4)
361  call void asm sideeffect "# reg use $0", "{a5}"(i32 %a5)
362  call void asm sideeffect "# reg use $0", "{a6}"(i32 %a6)
363  call void asm sideeffect "# reg use $0", "{a7}"(i32 %a7)
364  call void asm sideeffect "# reg use $0", "{s2}"(i32 %s2)
365  call void asm sideeffect "# reg use $0", "{s3}"(i32 %s3)
366  call void asm sideeffect "# reg use $0", "{s4}"(i32 %s4)
367  call void asm sideeffect "# reg use $0", "{s5}"(i32 %s5)
368  call void asm sideeffect "# reg use $0", "{s6}"(i32 %s6)
369  call void asm sideeffect "# reg use $0", "{s7}"(i32 %s7)
370  call void asm sideeffect "# reg use $0", "{s8}"(i32 %s8)
371  call void asm sideeffect "# reg use $0", "{s9}"(i32 %s9)
372  call void asm sideeffect "# reg use $0", "{s10}"(i32 %s10)
373  call void asm sideeffect "# reg use $0", "{s11}"(i32 %s11)
374  call void asm sideeffect "# reg use $0", "{t3}"(i32 %t3)
375  call void asm sideeffect "# reg use $0", "{t4}"(i32 %t4)
376  call void asm sideeffect "# reg use $0", "{t5}"(i32 %t5)
377  call void asm sideeffect "# reg use $0", "{t6}"(i32 %t6)
378
379  ret void
380}
381
382define void @relax_jal_spill_32_adjust_spill_slot() {
383  ; If the stack is large and the offset of BranchRelaxationScratchFrameIndex
384  ; is out the range of 12-bit signed integer, check whether the spill slot is
385  ; adjusted to close to the stack base register.
386; CHECK-LABEL: relax_jal_spill_32_adjust_spill_slot:
387; CHECK:       # %bb.0:
388; CHECK-NEXT:    addi sp, sp, -2032
389; CHECK-NEXT:    .cfi_def_cfa_offset 2032
390; CHECK-NEXT:    sw ra, 2028(sp) # 4-byte Folded Spill
391; CHECK-NEXT:    sw s0, 2024(sp) # 4-byte Folded Spill
392; CHECK-NEXT:    sw s1, 2020(sp) # 4-byte Folded Spill
393; CHECK-NEXT:    sw s2, 2016(sp) # 4-byte Folded Spill
394; CHECK-NEXT:    sw s3, 2012(sp) # 4-byte Folded Spill
395; CHECK-NEXT:    sw s4, 2008(sp) # 4-byte Folded Spill
396; CHECK-NEXT:    sw s5, 2004(sp) # 4-byte Folded Spill
397; CHECK-NEXT:    sw s6, 2000(sp) # 4-byte Folded Spill
398; CHECK-NEXT:    sw s7, 1996(sp) # 4-byte Folded Spill
399; CHECK-NEXT:    sw s8, 1992(sp) # 4-byte Folded Spill
400; CHECK-NEXT:    sw s9, 1988(sp) # 4-byte Folded Spill
401; CHECK-NEXT:    sw s10, 1984(sp) # 4-byte Folded Spill
402; CHECK-NEXT:    sw s11, 1980(sp) # 4-byte Folded Spill
403; CHECK-NEXT:    .cfi_offset ra, -4
404; CHECK-NEXT:    .cfi_offset s0, -8
405; CHECK-NEXT:    .cfi_offset s1, -12
406; CHECK-NEXT:    .cfi_offset s2, -16
407; CHECK-NEXT:    .cfi_offset s3, -20
408; CHECK-NEXT:    .cfi_offset s4, -24
409; CHECK-NEXT:    .cfi_offset s5, -28
410; CHECK-NEXT:    .cfi_offset s6, -32
411; CHECK-NEXT:    .cfi_offset s7, -36
412; CHECK-NEXT:    .cfi_offset s8, -40
413; CHECK-NEXT:    .cfi_offset s9, -44
414; CHECK-NEXT:    .cfi_offset s10, -48
415; CHECK-NEXT:    .cfi_offset s11, -52
416; CHECK-NEXT:    addi s0, sp, 2032
417; CHECK-NEXT:    .cfi_def_cfa s0, 0
418; CHECK-NEXT:    lui a0, 2
419; CHECK-NEXT:    addi a0, a0, -2032
420; CHECK-NEXT:    sub sp, sp, a0
421; CHECK-NEXT:    srli a0, sp, 12
422; CHECK-NEXT:    slli sp, a0, 12
423; CHECK-NEXT:    #APP
424; CHECK-NEXT:    li ra, 1
425; CHECK-NEXT:    #NO_APP
426; CHECK-NEXT:    #APP
427; CHECK-NEXT:    li t0, 5
428; CHECK-NEXT:    #NO_APP
429; CHECK-NEXT:    #APP
430; CHECK-NEXT:    li t1, 6
431; CHECK-NEXT:    #NO_APP
432; CHECK-NEXT:    #APP
433; CHECK-NEXT:    li t2, 7
434; CHECK-NEXT:    #NO_APP
435; CHECK-NEXT:    #APP
436; CHECK-NEXT:    li s0, 8
437; CHECK-NEXT:    #NO_APP
438; CHECK-NEXT:    #APP
439; CHECK-NEXT:    li s1, 9
440; CHECK-NEXT:    #NO_APP
441; CHECK-NEXT:    #APP
442; CHECK-NEXT:    li a0, 10
443; CHECK-NEXT:    #NO_APP
444; CHECK-NEXT:    #APP
445; CHECK-NEXT:    li a1, 11
446; CHECK-NEXT:    #NO_APP
447; CHECK-NEXT:    #APP
448; CHECK-NEXT:    li a2, 12
449; CHECK-NEXT:    #NO_APP
450; CHECK-NEXT:    #APP
451; CHECK-NEXT:    li a3, 13
452; CHECK-NEXT:    #NO_APP
453; CHECK-NEXT:    #APP
454; CHECK-NEXT:    li a4, 14
455; CHECK-NEXT:    #NO_APP
456; CHECK-NEXT:    #APP
457; CHECK-NEXT:    li a5, 15
458; CHECK-NEXT:    #NO_APP
459; CHECK-NEXT:    #APP
460; CHECK-NEXT:    li a6, 16
461; CHECK-NEXT:    #NO_APP
462; CHECK-NEXT:    #APP
463; CHECK-NEXT:    li a7, 17
464; CHECK-NEXT:    #NO_APP
465; CHECK-NEXT:    #APP
466; CHECK-NEXT:    li s2, 18
467; CHECK-NEXT:    #NO_APP
468; CHECK-NEXT:    #APP
469; CHECK-NEXT:    li s3, 19
470; CHECK-NEXT:    #NO_APP
471; CHECK-NEXT:    #APP
472; CHECK-NEXT:    li s4, 20
473; CHECK-NEXT:    #NO_APP
474; CHECK-NEXT:    #APP
475; CHECK-NEXT:    li s5, 21
476; CHECK-NEXT:    #NO_APP
477; CHECK-NEXT:    #APP
478; CHECK-NEXT:    li s6, 22
479; CHECK-NEXT:    #NO_APP
480; CHECK-NEXT:    #APP
481; CHECK-NEXT:    li s7, 23
482; CHECK-NEXT:    #NO_APP
483; CHECK-NEXT:    #APP
484; CHECK-NEXT:    li s8, 24
485; CHECK-NEXT:    #NO_APP
486; CHECK-NEXT:    #APP
487; CHECK-NEXT:    li s9, 25
488; CHECK-NEXT:    #NO_APP
489; CHECK-NEXT:    #APP
490; CHECK-NEXT:    li s10, 26
491; CHECK-NEXT:    #NO_APP
492; CHECK-NEXT:    #APP
493; CHECK-NEXT:    li s11, 27
494; CHECK-NEXT:    #NO_APP
495; CHECK-NEXT:    #APP
496; CHECK-NEXT:    li t3, 28
497; CHECK-NEXT:    #NO_APP
498; CHECK-NEXT:    #APP
499; CHECK-NEXT:    li t4, 29
500; CHECK-NEXT:    #NO_APP
501; CHECK-NEXT:    #APP
502; CHECK-NEXT:    li t5, 30
503; CHECK-NEXT:    #NO_APP
504; CHECK-NEXT:    #APP
505; CHECK-NEXT:    li t6, 31
506; CHECK-NEXT:    #NO_APP
507; CHECK-NEXT:    beq t5, t6, .LBB3_1
508; CHECK-NEXT:  # %bb.3:
509; CHECK-NEXT:    sw s11, 0(sp)
510; CHECK-NEXT:    jump .LBB3_4, s11
511; CHECK-NEXT:  .LBB3_1: # %branch_1
512; CHECK-NEXT:    #APP
513; CHECK-NEXT:    .zero 1048576
514; CHECK-NEXT:    #NO_APP
515; CHECK-NEXT:    j .LBB3_2
516; CHECK-NEXT:  .LBB3_4: # %branch_2
517; CHECK-NEXT:    lw s11, 0(sp)
518; CHECK-NEXT:  .LBB3_2: # %branch_2
519; CHECK-NEXT:    #APP
520; CHECK-NEXT:    # reg use ra
521; CHECK-NEXT:    #NO_APP
522; CHECK-NEXT:    #APP
523; CHECK-NEXT:    # reg use t0
524; CHECK-NEXT:    #NO_APP
525; CHECK-NEXT:    #APP
526; CHECK-NEXT:    # reg use t1
527; CHECK-NEXT:    #NO_APP
528; CHECK-NEXT:    #APP
529; CHECK-NEXT:    # reg use t2
530; CHECK-NEXT:    #NO_APP
531; CHECK-NEXT:    #APP
532; CHECK-NEXT:    # reg use s0
533; CHECK-NEXT:    #NO_APP
534; CHECK-NEXT:    #APP
535; CHECK-NEXT:    # reg use s1
536; CHECK-NEXT:    #NO_APP
537; CHECK-NEXT:    #APP
538; CHECK-NEXT:    # reg use a0
539; CHECK-NEXT:    #NO_APP
540; CHECK-NEXT:    #APP
541; CHECK-NEXT:    # reg use a1
542; CHECK-NEXT:    #NO_APP
543; CHECK-NEXT:    #APP
544; CHECK-NEXT:    # reg use a2
545; CHECK-NEXT:    #NO_APP
546; CHECK-NEXT:    #APP
547; CHECK-NEXT:    # reg use a3
548; CHECK-NEXT:    #NO_APP
549; CHECK-NEXT:    #APP
550; CHECK-NEXT:    # reg use a4
551; CHECK-NEXT:    #NO_APP
552; CHECK-NEXT:    #APP
553; CHECK-NEXT:    # reg use a5
554; CHECK-NEXT:    #NO_APP
555; CHECK-NEXT:    #APP
556; CHECK-NEXT:    # reg use a6
557; CHECK-NEXT:    #NO_APP
558; CHECK-NEXT:    #APP
559; CHECK-NEXT:    # reg use a7
560; CHECK-NEXT:    #NO_APP
561; CHECK-NEXT:    #APP
562; CHECK-NEXT:    # reg use s2
563; CHECK-NEXT:    #NO_APP
564; CHECK-NEXT:    #APP
565; CHECK-NEXT:    # reg use s3
566; CHECK-NEXT:    #NO_APP
567; CHECK-NEXT:    #APP
568; CHECK-NEXT:    # reg use s4
569; CHECK-NEXT:    #NO_APP
570; CHECK-NEXT:    #APP
571; CHECK-NEXT:    # reg use s5
572; CHECK-NEXT:    #NO_APP
573; CHECK-NEXT:    #APP
574; CHECK-NEXT:    # reg use s6
575; CHECK-NEXT:    #NO_APP
576; CHECK-NEXT:    #APP
577; CHECK-NEXT:    # reg use s7
578; CHECK-NEXT:    #NO_APP
579; CHECK-NEXT:    #APP
580; CHECK-NEXT:    # reg use s8
581; CHECK-NEXT:    #NO_APP
582; CHECK-NEXT:    #APP
583; CHECK-NEXT:    # reg use s9
584; CHECK-NEXT:    #NO_APP
585; CHECK-NEXT:    #APP
586; CHECK-NEXT:    # reg use s10
587; CHECK-NEXT:    #NO_APP
588; CHECK-NEXT:    #APP
589; CHECK-NEXT:    # reg use s11
590; CHECK-NEXT:    #NO_APP
591; CHECK-NEXT:    #APP
592; CHECK-NEXT:    # reg use t3
593; CHECK-NEXT:    #NO_APP
594; CHECK-NEXT:    #APP
595; CHECK-NEXT:    # reg use t4
596; CHECK-NEXT:    #NO_APP
597; CHECK-NEXT:    #APP
598; CHECK-NEXT:    # reg use t5
599; CHECK-NEXT:    #NO_APP
600; CHECK-NEXT:    #APP
601; CHECK-NEXT:    # reg use t6
602; CHECK-NEXT:    #NO_APP
603; CHECK-NEXT:    addi sp, s0, -2032
604; CHECK-NEXT:    .cfi_def_cfa sp, 2032
605; CHECK-NEXT:    lw ra, 2028(sp) # 4-byte Folded Reload
606; CHECK-NEXT:    lw s0, 2024(sp) # 4-byte Folded Reload
607; CHECK-NEXT:    lw s1, 2020(sp) # 4-byte Folded Reload
608; CHECK-NEXT:    lw s2, 2016(sp) # 4-byte Folded Reload
609; CHECK-NEXT:    lw s3, 2012(sp) # 4-byte Folded Reload
610; CHECK-NEXT:    lw s4, 2008(sp) # 4-byte Folded Reload
611; CHECK-NEXT:    lw s5, 2004(sp) # 4-byte Folded Reload
612; CHECK-NEXT:    lw s6, 2000(sp) # 4-byte Folded Reload
613; CHECK-NEXT:    lw s7, 1996(sp) # 4-byte Folded Reload
614; CHECK-NEXT:    lw s8, 1992(sp) # 4-byte Folded Reload
615; CHECK-NEXT:    lw s9, 1988(sp) # 4-byte Folded Reload
616; CHECK-NEXT:    lw s10, 1984(sp) # 4-byte Folded Reload
617; CHECK-NEXT:    lw s11, 1980(sp) # 4-byte Folded Reload
618; CHECK-NEXT:    .cfi_restore ra
619; CHECK-NEXT:    .cfi_restore s0
620; CHECK-NEXT:    .cfi_restore s1
621; CHECK-NEXT:    .cfi_restore s2
622; CHECK-NEXT:    .cfi_restore s3
623; CHECK-NEXT:    .cfi_restore s4
624; CHECK-NEXT:    .cfi_restore s5
625; CHECK-NEXT:    .cfi_restore s6
626; CHECK-NEXT:    .cfi_restore s7
627; CHECK-NEXT:    .cfi_restore s8
628; CHECK-NEXT:    .cfi_restore s9
629; CHECK-NEXT:    .cfi_restore s10
630; CHECK-NEXT:    .cfi_restore s11
631; CHECK-NEXT:    addi sp, sp, 2032
632; CHECK-NEXT:    .cfi_def_cfa_offset 0
633; CHECK-NEXT:    ret
634  %stack_obj = alloca i32, align 4096
635
636  %ra = call i32 asm sideeffect "addi ra, x0, 1", "={ra}"()
637  %t0 = call i32 asm sideeffect "addi t0, x0, 5", "={t0}"()
638  %t1 = call i32 asm sideeffect "addi t1, x0, 6", "={t1}"()
639  %t2 = call i32 asm sideeffect "addi t2, x0, 7", "={t2}"()
640  %s0 = call i32 asm sideeffect "addi s0, x0, 8", "={s0}"()
641  %s1 = call i32 asm sideeffect "addi s1, x0, 9", "={s1}"()
642  %a0 = call i32 asm sideeffect "addi a0, x0, 10", "={a0}"()
643  %a1 = call i32 asm sideeffect "addi a1, x0, 11", "={a1}"()
644  %a2 = call i32 asm sideeffect "addi a2, x0, 12", "={a2}"()
645  %a3 = call i32 asm sideeffect "addi a3, x0, 13", "={a3}"()
646  %a4 = call i32 asm sideeffect "addi a4, x0, 14", "={a4}"()
647  %a5 = call i32 asm sideeffect "addi a5, x0, 15", "={a5}"()
648  %a6 = call i32 asm sideeffect "addi a6, x0, 16", "={a6}"()
649  %a7 = call i32 asm sideeffect "addi a7, x0, 17", "={a7}"()
650  %s2 = call i32 asm sideeffect "addi s2, x0, 18", "={s2}"()
651  %s3 = call i32 asm sideeffect "addi s3, x0, 19", "={s3}"()
652  %s4 = call i32 asm sideeffect "addi s4, x0, 20", "={s4}"()
653  %s5 = call i32 asm sideeffect "addi s5, x0, 21", "={s5}"()
654  %s6 = call i32 asm sideeffect "addi s6, x0, 22", "={s6}"()
655  %s7 = call i32 asm sideeffect "addi s7, x0, 23", "={s7}"()
656  %s8 = call i32 asm sideeffect "addi s8, x0, 24", "={s8}"()
657  %s9 = call i32 asm sideeffect "addi s9, x0, 25", "={s9}"()
658  %s10 = call i32 asm sideeffect "addi s10, x0, 26", "={s10}"()
659  %s11 = call i32 asm sideeffect "addi s11, x0, 27", "={s11}"()
660  %t3 = call i32 asm sideeffect "addi t3, x0, 28", "={t3}"()
661  %t4 = call i32 asm sideeffect "addi t4, x0, 29", "={t4}"()
662  %t5 = call i32 asm sideeffect "addi t5, x0, 30", "={t5}"()
663  %t6 = call i32 asm sideeffect "addi t6, x0, 31", "={t6}"()
664
665  %cmp = icmp eq i32 %t5, %t6
666  br i1 %cmp, label %branch_1, label %branch_2
667
668branch_1:
669  call void asm sideeffect ".space 1048576", ""()
670  br label %branch_2
671
672branch_2:
673  call void asm sideeffect "# reg use $0", "{ra}"(i32 %ra)
674  call void asm sideeffect "# reg use $0", "{t0}"(i32 %t0)
675  call void asm sideeffect "# reg use $0", "{t1}"(i32 %t1)
676  call void asm sideeffect "# reg use $0", "{t2}"(i32 %t2)
677  call void asm sideeffect "# reg use $0", "{s0}"(i32 %s0)
678  call void asm sideeffect "# reg use $0", "{s1}"(i32 %s1)
679  call void asm sideeffect "# reg use $0", "{a0}"(i32 %a0)
680  call void asm sideeffect "# reg use $0", "{a1}"(i32 %a1)
681  call void asm sideeffect "# reg use $0", "{a2}"(i32 %a2)
682  call void asm sideeffect "# reg use $0", "{a3}"(i32 %a3)
683  call void asm sideeffect "# reg use $0", "{a4}"(i32 %a4)
684  call void asm sideeffect "# reg use $0", "{a5}"(i32 %a5)
685  call void asm sideeffect "# reg use $0", "{a6}"(i32 %a6)
686  call void asm sideeffect "# reg use $0", "{a7}"(i32 %a7)
687  call void asm sideeffect "# reg use $0", "{s2}"(i32 %s2)
688  call void asm sideeffect "# reg use $0", "{s3}"(i32 %s3)
689  call void asm sideeffect "# reg use $0", "{s4}"(i32 %s4)
690  call void asm sideeffect "# reg use $0", "{s5}"(i32 %s5)
691  call void asm sideeffect "# reg use $0", "{s6}"(i32 %s6)
692  call void asm sideeffect "# reg use $0", "{s7}"(i32 %s7)
693  call void asm sideeffect "# reg use $0", "{s8}"(i32 %s8)
694  call void asm sideeffect "# reg use $0", "{s9}"(i32 %s9)
695  call void asm sideeffect "# reg use $0", "{s10}"(i32 %s10)
696  call void asm sideeffect "# reg use $0", "{s11}"(i32 %s11)
697  call void asm sideeffect "# reg use $0", "{t3}"(i32 %t3)
698  call void asm sideeffect "# reg use $0", "{t4}"(i32 %t4)
699  call void asm sideeffect "# reg use $0", "{t5}"(i32 %t5)
700  call void asm sideeffect "# reg use $0", "{t6}"(i32 %t6)
701
702  ret void
703}
704
705define void @relax_jal_spill_32_restore_block_correspondence() {
706; CHECK-LABEL: relax_jal_spill_32_restore_block_correspondence:
707; CHECK:       # %bb.0: # %entry
708; CHECK-NEXT:    addi sp, sp, -64
709; CHECK-NEXT:    .cfi_def_cfa_offset 64
710; CHECK-NEXT:    sw ra, 60(sp) # 4-byte Folded Spill
711; CHECK-NEXT:    sw s0, 56(sp) # 4-byte Folded Spill
712; CHECK-NEXT:    sw s1, 52(sp) # 4-byte Folded Spill
713; CHECK-NEXT:    sw s2, 48(sp) # 4-byte Folded Spill
714; CHECK-NEXT:    sw s3, 44(sp) # 4-byte Folded Spill
715; CHECK-NEXT:    sw s4, 40(sp) # 4-byte Folded Spill
716; CHECK-NEXT:    sw s5, 36(sp) # 4-byte Folded Spill
717; CHECK-NEXT:    sw s6, 32(sp) # 4-byte Folded Spill
718; CHECK-NEXT:    sw s7, 28(sp) # 4-byte Folded Spill
719; CHECK-NEXT:    sw s8, 24(sp) # 4-byte Folded Spill
720; CHECK-NEXT:    sw s9, 20(sp) # 4-byte Folded Spill
721; CHECK-NEXT:    sw s10, 16(sp) # 4-byte Folded Spill
722; CHECK-NEXT:    sw s11, 12(sp) # 4-byte Folded Spill
723; CHECK-NEXT:    .cfi_offset ra, -4
724; CHECK-NEXT:    .cfi_offset s0, -8
725; CHECK-NEXT:    .cfi_offset s1, -12
726; CHECK-NEXT:    .cfi_offset s2, -16
727; CHECK-NEXT:    .cfi_offset s3, -20
728; CHECK-NEXT:    .cfi_offset s4, -24
729; CHECK-NEXT:    .cfi_offset s5, -28
730; CHECK-NEXT:    .cfi_offset s6, -32
731; CHECK-NEXT:    .cfi_offset s7, -36
732; CHECK-NEXT:    .cfi_offset s8, -40
733; CHECK-NEXT:    .cfi_offset s9, -44
734; CHECK-NEXT:    .cfi_offset s10, -48
735; CHECK-NEXT:    .cfi_offset s11, -52
736; CHECK-NEXT:    .cfi_remember_state
737; CHECK-NEXT:    #APP
738; CHECK-NEXT:    li ra, 1
739; CHECK-NEXT:    #NO_APP
740; CHECK-NEXT:    #APP
741; CHECK-NEXT:    li t0, 5
742; CHECK-NEXT:    #NO_APP
743; CHECK-NEXT:    #APP
744; CHECK-NEXT:    li t1, 6
745; CHECK-NEXT:    #NO_APP
746; CHECK-NEXT:    #APP
747; CHECK-NEXT:    li t2, 7
748; CHECK-NEXT:    #NO_APP
749; CHECK-NEXT:    #APP
750; CHECK-NEXT:    li s0, 8
751; CHECK-NEXT:    #NO_APP
752; CHECK-NEXT:    #APP
753; CHECK-NEXT:    li s1, 9
754; CHECK-NEXT:    #NO_APP
755; CHECK-NEXT:    #APP
756; CHECK-NEXT:    li a0, 10
757; CHECK-NEXT:    #NO_APP
758; CHECK-NEXT:    #APP
759; CHECK-NEXT:    li a1, 11
760; CHECK-NEXT:    #NO_APP
761; CHECK-NEXT:    #APP
762; CHECK-NEXT:    li a2, 12
763; CHECK-NEXT:    #NO_APP
764; CHECK-NEXT:    #APP
765; CHECK-NEXT:    li a3, 13
766; CHECK-NEXT:    #NO_APP
767; CHECK-NEXT:    #APP
768; CHECK-NEXT:    li a4, 14
769; CHECK-NEXT:    #NO_APP
770; CHECK-NEXT:    #APP
771; CHECK-NEXT:    li a5, 15
772; CHECK-NEXT:    #NO_APP
773; CHECK-NEXT:    #APP
774; CHECK-NEXT:    li a6, 16
775; CHECK-NEXT:    #NO_APP
776; CHECK-NEXT:    #APP
777; CHECK-NEXT:    li a7, 17
778; CHECK-NEXT:    #NO_APP
779; CHECK-NEXT:    #APP
780; CHECK-NEXT:    li s2, 18
781; CHECK-NEXT:    #NO_APP
782; CHECK-NEXT:    #APP
783; CHECK-NEXT:    li s3, 19
784; CHECK-NEXT:    #NO_APP
785; CHECK-NEXT:    #APP
786; CHECK-NEXT:    li s4, 20
787; CHECK-NEXT:    #NO_APP
788; CHECK-NEXT:    #APP
789; CHECK-NEXT:    li s5, 21
790; CHECK-NEXT:    #NO_APP
791; CHECK-NEXT:    #APP
792; CHECK-NEXT:    li s6, 22
793; CHECK-NEXT:    #NO_APP
794; CHECK-NEXT:    #APP
795; CHECK-NEXT:    li s7, 23
796; CHECK-NEXT:    #NO_APP
797; CHECK-NEXT:    #APP
798; CHECK-NEXT:    li s8, 24
799; CHECK-NEXT:    #NO_APP
800; CHECK-NEXT:    #APP
801; CHECK-NEXT:    li s9, 25
802; CHECK-NEXT:    #NO_APP
803; CHECK-NEXT:    #APP
804; CHECK-NEXT:    li s10, 26
805; CHECK-NEXT:    #NO_APP
806; CHECK-NEXT:    #APP
807; CHECK-NEXT:    li s11, 27
808; CHECK-NEXT:    #NO_APP
809; CHECK-NEXT:    #APP
810; CHECK-NEXT:    li t3, 28
811; CHECK-NEXT:    #NO_APP
812; CHECK-NEXT:    #APP
813; CHECK-NEXT:    li t4, 29
814; CHECK-NEXT:    #NO_APP
815; CHECK-NEXT:    #APP
816; CHECK-NEXT:    li t5, 30
817; CHECK-NEXT:    #NO_APP
818; CHECK-NEXT:    #APP
819; CHECK-NEXT:    li t6, 31
820; CHECK-NEXT:    #NO_APP
821; CHECK-NEXT:    bne t5, t6, .LBB4_2
822; CHECK-NEXT:    j .LBB4_1
823; CHECK-NEXT:  .LBB4_8: # %dest_1
824; CHECK-NEXT:    lw s11, 0(sp)
825; CHECK-NEXT:  .LBB4_1: # %dest_1
826; CHECK-NEXT:    #APP
827; CHECK-NEXT:    # dest 1
828; CHECK-NEXT:    #NO_APP
829; CHECK-NEXT:    j .LBB4_3
830; CHECK-NEXT:  .LBB4_2: # %cond_2
831; CHECK-NEXT:    bne t3, t4, .LBB4_5
832; CHECK-NEXT:  .LBB4_3: # %dest_2
833; CHECK-NEXT:    #APP
834; CHECK-NEXT:    # dest 2
835; CHECK-NEXT:    #NO_APP
836; CHECK-NEXT:  .LBB4_4: # %dest_3
837; CHECK-NEXT:    #APP
838; CHECK-NEXT:    # dest 3
839; CHECK-NEXT:    #NO_APP
840; CHECK-NEXT:    #APP
841; CHECK-NEXT:    # reg use ra
842; CHECK-NEXT:    #NO_APP
843; CHECK-NEXT:    #APP
844; CHECK-NEXT:    # reg use t0
845; CHECK-NEXT:    #NO_APP
846; CHECK-NEXT:    #APP
847; CHECK-NEXT:    # reg use t1
848; CHECK-NEXT:    #NO_APP
849; CHECK-NEXT:    #APP
850; CHECK-NEXT:    # reg use t2
851; CHECK-NEXT:    #NO_APP
852; CHECK-NEXT:    #APP
853; CHECK-NEXT:    # reg use s0
854; CHECK-NEXT:    #NO_APP
855; CHECK-NEXT:    #APP
856; CHECK-NEXT:    # reg use s1
857; CHECK-NEXT:    #NO_APP
858; CHECK-NEXT:    #APP
859; CHECK-NEXT:    # reg use a0
860; CHECK-NEXT:    #NO_APP
861; CHECK-NEXT:    #APP
862; CHECK-NEXT:    # reg use a1
863; CHECK-NEXT:    #NO_APP
864; CHECK-NEXT:    #APP
865; CHECK-NEXT:    # reg use a2
866; CHECK-NEXT:    #NO_APP
867; CHECK-NEXT:    #APP
868; CHECK-NEXT:    # reg use a3
869; CHECK-NEXT:    #NO_APP
870; CHECK-NEXT:    #APP
871; CHECK-NEXT:    # reg use a4
872; CHECK-NEXT:    #NO_APP
873; CHECK-NEXT:    #APP
874; CHECK-NEXT:    # reg use a5
875; CHECK-NEXT:    #NO_APP
876; CHECK-NEXT:    #APP
877; CHECK-NEXT:    # reg use a6
878; CHECK-NEXT:    #NO_APP
879; CHECK-NEXT:    #APP
880; CHECK-NEXT:    # reg use a7
881; CHECK-NEXT:    #NO_APP
882; CHECK-NEXT:    #APP
883; CHECK-NEXT:    # reg use s2
884; CHECK-NEXT:    #NO_APP
885; CHECK-NEXT:    #APP
886; CHECK-NEXT:    # reg use s3
887; CHECK-NEXT:    #NO_APP
888; CHECK-NEXT:    #APP
889; CHECK-NEXT:    # reg use s4
890; CHECK-NEXT:    #NO_APP
891; CHECK-NEXT:    #APP
892; CHECK-NEXT:    # reg use s5
893; CHECK-NEXT:    #NO_APP
894; CHECK-NEXT:    #APP
895; CHECK-NEXT:    # reg use s6
896; CHECK-NEXT:    #NO_APP
897; CHECK-NEXT:    #APP
898; CHECK-NEXT:    # reg use s7
899; CHECK-NEXT:    #NO_APP
900; CHECK-NEXT:    #APP
901; CHECK-NEXT:    # reg use s8
902; CHECK-NEXT:    #NO_APP
903; CHECK-NEXT:    #APP
904; CHECK-NEXT:    # reg use s9
905; CHECK-NEXT:    #NO_APP
906; CHECK-NEXT:    #APP
907; CHECK-NEXT:    # reg use s10
908; CHECK-NEXT:    #NO_APP
909; CHECK-NEXT:    #APP
910; CHECK-NEXT:    # reg use s11
911; CHECK-NEXT:    #NO_APP
912; CHECK-NEXT:    #APP
913; CHECK-NEXT:    # reg use t3
914; CHECK-NEXT:    #NO_APP
915; CHECK-NEXT:    #APP
916; CHECK-NEXT:    # reg use t4
917; CHECK-NEXT:    #NO_APP
918; CHECK-NEXT:    #APP
919; CHECK-NEXT:    # reg use t5
920; CHECK-NEXT:    #NO_APP
921; CHECK-NEXT:    #APP
922; CHECK-NEXT:    # reg use t6
923; CHECK-NEXT:    #NO_APP
924; CHECK-NEXT:    lw ra, 60(sp) # 4-byte Folded Reload
925; CHECK-NEXT:    lw s0, 56(sp) # 4-byte Folded Reload
926; CHECK-NEXT:    lw s1, 52(sp) # 4-byte Folded Reload
927; CHECK-NEXT:    lw s2, 48(sp) # 4-byte Folded Reload
928; CHECK-NEXT:    lw s3, 44(sp) # 4-byte Folded Reload
929; CHECK-NEXT:    lw s4, 40(sp) # 4-byte Folded Reload
930; CHECK-NEXT:    lw s5, 36(sp) # 4-byte Folded Reload
931; CHECK-NEXT:    lw s6, 32(sp) # 4-byte Folded Reload
932; CHECK-NEXT:    lw s7, 28(sp) # 4-byte Folded Reload
933; CHECK-NEXT:    lw s8, 24(sp) # 4-byte Folded Reload
934; CHECK-NEXT:    lw s9, 20(sp) # 4-byte Folded Reload
935; CHECK-NEXT:    lw s10, 16(sp) # 4-byte Folded Reload
936; CHECK-NEXT:    lw s11, 12(sp) # 4-byte Folded Reload
937; CHECK-NEXT:    .cfi_restore ra
938; CHECK-NEXT:    .cfi_restore s0
939; CHECK-NEXT:    .cfi_restore s1
940; CHECK-NEXT:    .cfi_restore s2
941; CHECK-NEXT:    .cfi_restore s3
942; CHECK-NEXT:    .cfi_restore s4
943; CHECK-NEXT:    .cfi_restore s5
944; CHECK-NEXT:    .cfi_restore s6
945; CHECK-NEXT:    .cfi_restore s7
946; CHECK-NEXT:    .cfi_restore s8
947; CHECK-NEXT:    .cfi_restore s9
948; CHECK-NEXT:    .cfi_restore s10
949; CHECK-NEXT:    .cfi_restore s11
950; CHECK-NEXT:    addi sp, sp, 64
951; CHECK-NEXT:    .cfi_def_cfa_offset 0
952; CHECK-NEXT:    ret
953; CHECK-NEXT:  .LBB4_5: # %cond_3
954; CHECK-NEXT:    .cfi_restore_state
955; CHECK-NEXT:    beq t1, t2, .LBB4_4
956; CHECK-NEXT:  # %bb.6: # %space
957; CHECK-NEXT:    #APP
958; CHECK-NEXT:    .zero 1048576
959; CHECK-NEXT:    #NO_APP
960; CHECK-NEXT:  # %bb.7: # %space
961; CHECK-NEXT:    sw s11, 0(sp)
962; CHECK-NEXT:    jump .LBB4_8, s11
963entry:
964  %ra = call i32 asm sideeffect "addi ra, x0, 1", "={ra}"()
965  %t0 = call i32 asm sideeffect "addi t0, x0, 5", "={t0}"()
966  %t1 = call i32 asm sideeffect "addi t1, x0, 6", "={t1}"()
967  %t2 = call i32 asm sideeffect "addi t2, x0, 7", "={t2}"()
968  %s0 = call i32 asm sideeffect "addi s0, x0, 8", "={s0}"()
969  %s1 = call i32 asm sideeffect "addi s1, x0, 9", "={s1}"()
970  %a0 = call i32 asm sideeffect "addi a0, x0, 10", "={a0}"()
971  %a1 = call i32 asm sideeffect "addi a1, x0, 11", "={a1}"()
972  %a2 = call i32 asm sideeffect "addi a2, x0, 12", "={a2}"()
973  %a3 = call i32 asm sideeffect "addi a3, x0, 13", "={a3}"()
974  %a4 = call i32 asm sideeffect "addi a4, x0, 14", "={a4}"()
975  %a5 = call i32 asm sideeffect "addi a5, x0, 15", "={a5}"()
976  %a6 = call i32 asm sideeffect "addi a6, x0, 16", "={a6}"()
977  %a7 = call i32 asm sideeffect "addi a7, x0, 17", "={a7}"()
978  %s2 = call i32 asm sideeffect "addi s2, x0, 18", "={s2}"()
979  %s3 = call i32 asm sideeffect "addi s3, x0, 19", "={s3}"()
980  %s4 = call i32 asm sideeffect "addi s4, x0, 20", "={s4}"()
981  %s5 = call i32 asm sideeffect "addi s5, x0, 21", "={s5}"()
982  %s6 = call i32 asm sideeffect "addi s6, x0, 22", "={s6}"()
983  %s7 = call i32 asm sideeffect "addi s7, x0, 23", "={s7}"()
984  %s8 = call i32 asm sideeffect "addi s8, x0, 24", "={s8}"()
985  %s9 = call i32 asm sideeffect "addi s9, x0, 25", "={s9}"()
986  %s10 = call i32 asm sideeffect "addi s10, x0, 26", "={s10}"()
987  %s11 = call i32 asm sideeffect "addi s11, x0, 27", "={s11}"()
988  %t3 = call i32 asm sideeffect "addi t3, x0, 28", "={t3}"()
989  %t4 = call i32 asm sideeffect "addi t4, x0, 29", "={t4}"()
990  %t5 = call i32 asm sideeffect "addi t5, x0, 30", "={t5}"()
991  %t6 = call i32 asm sideeffect "addi t6, x0, 31", "={t6}"()
992
993  br label %cond_1
994
995cond_1:
996  %cmp1 = icmp eq i32 %t5, %t6
997  br i1 %cmp1, label %dest_1, label %cond_2
998
999cond_2:
1000  %cmp2 = icmp eq i32 %t3, %t4
1001  br i1 %cmp2, label %dest_2, label %cond_3
1002
1003cond_3:
1004  %cmp3 = icmp eq i32 %t1, %t2
1005  br i1 %cmp3, label %dest_3, label %space
1006
1007space:
1008  call void asm sideeffect ".space 1048576", ""()
1009  br label %dest_1
1010
1011dest_1:
1012  call void asm sideeffect "# dest 1", ""()
1013  br label %dest_2
1014
1015dest_2:
1016  call void asm sideeffect "# dest 2", ""()
1017  br label %dest_3
1018
1019dest_3:
1020  call void asm sideeffect "# dest 3", ""()
1021  br label %tail
1022
1023tail:
1024  call void asm sideeffect "# reg use $0", "{ra}"(i32 %ra)
1025  call void asm sideeffect "# reg use $0", "{t0}"(i32 %t0)
1026  call void asm sideeffect "# reg use $0", "{t1}"(i32 %t1)
1027  call void asm sideeffect "# reg use $0", "{t2}"(i32 %t2)
1028  call void asm sideeffect "# reg use $0", "{s0}"(i32 %s0)
1029  call void asm sideeffect "# reg use $0", "{s1}"(i32 %s1)
1030  call void asm sideeffect "# reg use $0", "{a0}"(i32 %a0)
1031  call void asm sideeffect "# reg use $0", "{a1}"(i32 %a1)
1032  call void asm sideeffect "# reg use $0", "{a2}"(i32 %a2)
1033  call void asm sideeffect "# reg use $0", "{a3}"(i32 %a3)
1034  call void asm sideeffect "# reg use $0", "{a4}"(i32 %a4)
1035  call void asm sideeffect "# reg use $0", "{a5}"(i32 %a5)
1036  call void asm sideeffect "# reg use $0", "{a6}"(i32 %a6)
1037  call void asm sideeffect "# reg use $0", "{a7}"(i32 %a7)
1038  call void asm sideeffect "# reg use $0", "{s2}"(i32 %s2)
1039  call void asm sideeffect "# reg use $0", "{s3}"(i32 %s3)
1040  call void asm sideeffect "# reg use $0", "{s4}"(i32 %s4)
1041  call void asm sideeffect "# reg use $0", "{s5}"(i32 %s5)
1042  call void asm sideeffect "# reg use $0", "{s6}"(i32 %s6)
1043  call void asm sideeffect "# reg use $0", "{s7}"(i32 %s7)
1044  call void asm sideeffect "# reg use $0", "{s8}"(i32 %s8)
1045  call void asm sideeffect "# reg use $0", "{s9}"(i32 %s9)
1046  call void asm sideeffect "# reg use $0", "{s10}"(i32 %s10)
1047  call void asm sideeffect "# reg use $0", "{s11}"(i32 %s11)
1048  call void asm sideeffect "# reg use $0", "{t3}"(i32 %t3)
1049  call void asm sideeffect "# reg use $0", "{t4}"(i32 %t4)
1050  call void asm sideeffect "# reg use $0", "{t5}"(i32 %t5)
1051  call void asm sideeffect "# reg use $0", "{t6}"(i32 %t6)
1052
1053  ret void
1054}
1055
1056