1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=riscv64 -mattr=+d -target-abi=lp64d < %s | FileCheck --check-prefixes=CHECK,RV64 %s 3; RUN: llc -mtriple=riscv32 -mattr=+d -target-abi=ilp32d < %s | FileCheck --check-prefixes=CHECK,RV32 %s 4 5define void @test_load_store(ptr %p, ptr %q) nounwind { 6; CHECK-LABEL: test_load_store: 7; CHECK: # %bb.0: 8; CHECK-NEXT: lh a0, 0(a0) 9; CHECK-NEXT: sh a0, 0(a1) 10; CHECK-NEXT: ret 11 %a = load bfloat, ptr %p 12 store bfloat %a, ptr %q 13 ret void 14} 15 16define float @test_fpextend_float(ptr %p) nounwind { 17; CHECK-LABEL: test_fpextend_float: 18; CHECK: # %bb.0: 19; CHECK-NEXT: lhu a0, 0(a0) 20; CHECK-NEXT: slli a0, a0, 16 21; CHECK-NEXT: fmv.w.x fa0, a0 22; CHECK-NEXT: ret 23 %a = load bfloat, ptr %p 24 %r = fpext bfloat %a to float 25 ret float %r 26} 27 28define double @test_fpextend_double(ptr %p) nounwind { 29; CHECK-LABEL: test_fpextend_double: 30; CHECK: # %bb.0: 31; CHECK-NEXT: lhu a0, 0(a0) 32; CHECK-NEXT: slli a0, a0, 16 33; CHECK-NEXT: fmv.w.x fa5, a0 34; CHECK-NEXT: fcvt.d.s fa0, fa5 35; CHECK-NEXT: ret 36 %a = load bfloat, ptr %p 37 %r = fpext bfloat %a to double 38 ret double %r 39} 40 41define void @test_fptrunc_float(float %f, ptr %p) nounwind { 42; RV64-LABEL: test_fptrunc_float: 43; RV64: # %bb.0: 44; RV64-NEXT: addi sp, sp, -16 45; RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 46; RV64-NEXT: sd s0, 0(sp) # 8-byte Folded Spill 47; RV64-NEXT: mv s0, a0 48; RV64-NEXT: call __truncsfbf2 49; RV64-NEXT: fmv.x.w a0, fa0 50; RV64-NEXT: sh a0, 0(s0) 51; RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 52; RV64-NEXT: ld s0, 0(sp) # 8-byte Folded Reload 53; RV64-NEXT: addi sp, sp, 16 54; RV64-NEXT: ret 55; 56; RV32-LABEL: test_fptrunc_float: 57; RV32: # %bb.0: 58; RV32-NEXT: addi sp, sp, -16 59; RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 60; RV32-NEXT: sw s0, 8(sp) # 4-byte Folded Spill 61; RV32-NEXT: mv s0, a0 62; RV32-NEXT: call __truncsfbf2 63; RV32-NEXT: fmv.x.w a0, fa0 64; RV32-NEXT: sh a0, 0(s0) 65; RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 66; RV32-NEXT: lw s0, 8(sp) # 4-byte Folded Reload 67; RV32-NEXT: addi sp, sp, 16 68; RV32-NEXT: ret 69 %a = fptrunc float %f to bfloat 70 store bfloat %a, ptr %p 71 ret void 72} 73 74define void @test_fptrunc_double(double %d, ptr %p) nounwind { 75; RV64-LABEL: test_fptrunc_double: 76; RV64: # %bb.0: 77; RV64-NEXT: addi sp, sp, -16 78; RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 79; RV64-NEXT: sd s0, 0(sp) # 8-byte Folded Spill 80; RV64-NEXT: mv s0, a0 81; RV64-NEXT: call __truncdfbf2 82; RV64-NEXT: fmv.x.w a0, fa0 83; RV64-NEXT: sh a0, 0(s0) 84; RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 85; RV64-NEXT: ld s0, 0(sp) # 8-byte Folded Reload 86; RV64-NEXT: addi sp, sp, 16 87; RV64-NEXT: ret 88; 89; RV32-LABEL: test_fptrunc_double: 90; RV32: # %bb.0: 91; RV32-NEXT: addi sp, sp, -16 92; RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 93; RV32-NEXT: sw s0, 8(sp) # 4-byte Folded Spill 94; RV32-NEXT: mv s0, a0 95; RV32-NEXT: call __truncdfbf2 96; RV32-NEXT: fmv.x.w a0, fa0 97; RV32-NEXT: sh a0, 0(s0) 98; RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 99; RV32-NEXT: lw s0, 8(sp) # 4-byte Folded Reload 100; RV32-NEXT: addi sp, sp, 16 101; RV32-NEXT: ret 102 %a = fptrunc double %d to bfloat 103 store bfloat %a, ptr %p 104 ret void 105} 106 107define void @test_fadd(ptr %p, ptr %q) nounwind { 108; RV64-LABEL: test_fadd: 109; RV64: # %bb.0: 110; RV64-NEXT: addi sp, sp, -16 111; RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 112; RV64-NEXT: sd s0, 0(sp) # 8-byte Folded Spill 113; RV64-NEXT: mv s0, a0 114; RV64-NEXT: lhu a0, 0(a1) 115; RV64-NEXT: lhu a1, 0(s0) 116; RV64-NEXT: slli a0, a0, 16 117; RV64-NEXT: slli a1, a1, 16 118; RV64-NEXT: fmv.w.x fa5, a0 119; RV64-NEXT: fmv.w.x fa4, a1 120; RV64-NEXT: fadd.s fa0, fa4, fa5 121; RV64-NEXT: call __truncsfbf2 122; RV64-NEXT: fmv.x.w a0, fa0 123; RV64-NEXT: sh a0, 0(s0) 124; RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 125; RV64-NEXT: ld s0, 0(sp) # 8-byte Folded Reload 126; RV64-NEXT: addi sp, sp, 16 127; RV64-NEXT: ret 128; 129; RV32-LABEL: test_fadd: 130; RV32: # %bb.0: 131; RV32-NEXT: addi sp, sp, -16 132; RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 133; RV32-NEXT: sw s0, 8(sp) # 4-byte Folded Spill 134; RV32-NEXT: mv s0, a0 135; RV32-NEXT: lhu a0, 0(a1) 136; RV32-NEXT: lhu a1, 0(s0) 137; RV32-NEXT: slli a0, a0, 16 138; RV32-NEXT: slli a1, a1, 16 139; RV32-NEXT: fmv.w.x fa5, a0 140; RV32-NEXT: fmv.w.x fa4, a1 141; RV32-NEXT: fadd.s fa0, fa4, fa5 142; RV32-NEXT: call __truncsfbf2 143; RV32-NEXT: fmv.x.w a0, fa0 144; RV32-NEXT: sh a0, 0(s0) 145; RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 146; RV32-NEXT: lw s0, 8(sp) # 4-byte Folded Reload 147; RV32-NEXT: addi sp, sp, 16 148; RV32-NEXT: ret 149 %a = load bfloat, ptr %p 150 %b = load bfloat, ptr %q 151 %r = fadd bfloat %a, %b 152 store bfloat %r, ptr %p 153 ret void 154} 155