xref: /llvm-project/llvm/test/CodeGen/RISCV/atomic-cmpxchg-branch-on-result.ll (revision 9122c5235ec85ce0c0ad337e862b006e7b349d84) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=riscv32 -mattr=+a -verify-machineinstrs < %s \
3; RUN:   | FileCheck -check-prefixes=NOZACAS,RV32IA %s
4; RUN: llc -mtriple=riscv32 -mattr=+a,+zacas -verify-machineinstrs < %s \
5; RUN:   | FileCheck -check-prefixes=ZACAS,RV32IA-ZACAS %s
6; RUN: llc -mtriple=riscv64 -mattr=+a -verify-machineinstrs < %s \
7; RUN:   | FileCheck -check-prefixes=NOZACAS,RV64IA %s
8; RUN: llc -mtriple=riscv64 -mattr=+a,+zacas -verify-machineinstrs < %s \
9; RUN:   | FileCheck -check-prefixes=ZACAS,RV64IA-ZACAS %s
10; RUN: llc -mtriple=riscv64 -mattr=+a,+zacas,+zabha -verify-machineinstrs < %s \
11; RUN:   | FileCheck -check-prefixes=ZACAS,RV64IA-ZABHA %s
12
13; Test cmpxchg followed by a branch on the cmpxchg success value to see if the
14; branch is folded into the cmpxchg expansion.
15
16define void @cmpxchg_and_branch1(ptr %ptr, i32 signext %cmp, i32 signext %val) nounwind {
17; NOZACAS-LABEL: cmpxchg_and_branch1:
18; NOZACAS:       # %bb.0: # %entry
19; NOZACAS-NEXT:  .LBB0_1: # %do_cmpxchg
20; NOZACAS-NEXT:    # =>This Loop Header: Depth=1
21; NOZACAS-NEXT:    # Child Loop BB0_3 Depth 2
22; NOZACAS-NEXT:  .LBB0_3: # %do_cmpxchg
23; NOZACAS-NEXT:    # Parent Loop BB0_1 Depth=1
24; NOZACAS-NEXT:    # => This Inner Loop Header: Depth=2
25; NOZACAS-NEXT:    lr.w.aqrl a3, (a0)
26; NOZACAS-NEXT:    bne a3, a1, .LBB0_1
27; NOZACAS-NEXT:  # %bb.4: # %do_cmpxchg
28; NOZACAS-NEXT:    # in Loop: Header=BB0_3 Depth=2
29; NOZACAS-NEXT:    sc.w.rl a4, a2, (a0)
30; NOZACAS-NEXT:    bnez a4, .LBB0_3
31; NOZACAS-NEXT:  # %bb.5: # %do_cmpxchg
32; NOZACAS-NEXT:  # %bb.2: # %exit
33; NOZACAS-NEXT:    ret
34;
35; ZACAS-LABEL: cmpxchg_and_branch1:
36; ZACAS:       # %bb.0: # %entry
37; ZACAS-NEXT:  .LBB0_1: # %do_cmpxchg
38; ZACAS-NEXT:    # =>This Inner Loop Header: Depth=1
39; ZACAS-NEXT:    fence rw, rw
40; ZACAS-NEXT:    mv a3, a1
41; ZACAS-NEXT:    amocas.w.aqrl a3, a2, (a0)
42; ZACAS-NEXT:    bne a3, a1, .LBB0_1
43; ZACAS-NEXT:  # %bb.2: # %exit
44; ZACAS-NEXT:    ret
45entry:
46  br label %do_cmpxchg
47do_cmpxchg:
48  %0 = cmpxchg ptr %ptr, i32 %cmp, i32 %val seq_cst seq_cst
49  %1 = extractvalue { i32, i1 } %0, 1
50  br i1 %1, label %exit, label %do_cmpxchg
51exit:
52  ret void
53}
54
55define void @cmpxchg_and_branch2(ptr %ptr, i32 signext %cmp, i32 signext %val) nounwind {
56; NOZACAS-LABEL: cmpxchg_and_branch2:
57; NOZACAS:       # %bb.0: # %entry
58; NOZACAS-NEXT:  .LBB1_1: # %do_cmpxchg
59; NOZACAS-NEXT:    # =>This Loop Header: Depth=1
60; NOZACAS-NEXT:    # Child Loop BB1_3 Depth 2
61; NOZACAS-NEXT:  .LBB1_3: # %do_cmpxchg
62; NOZACAS-NEXT:    # Parent Loop BB1_1 Depth=1
63; NOZACAS-NEXT:    # => This Inner Loop Header: Depth=2
64; NOZACAS-NEXT:    lr.w.aqrl a3, (a0)
65; NOZACAS-NEXT:    bne a3, a1, .LBB1_5
66; NOZACAS-NEXT:  # %bb.4: # %do_cmpxchg
67; NOZACAS-NEXT:    # in Loop: Header=BB1_3 Depth=2
68; NOZACAS-NEXT:    sc.w.rl a4, a2, (a0)
69; NOZACAS-NEXT:    bnez a4, .LBB1_3
70; NOZACAS-NEXT:  .LBB1_5: # %do_cmpxchg
71; NOZACAS-NEXT:    # in Loop: Header=BB1_1 Depth=1
72; NOZACAS-NEXT:    beq a3, a1, .LBB1_1
73; NOZACAS-NEXT:  # %bb.2: # %exit
74; NOZACAS-NEXT:    ret
75;
76; ZACAS-LABEL: cmpxchg_and_branch2:
77; ZACAS:       # %bb.0: # %entry
78; ZACAS-NEXT:  .LBB1_1: # %do_cmpxchg
79; ZACAS-NEXT:    # =>This Inner Loop Header: Depth=1
80; ZACAS-NEXT:    fence rw, rw
81; ZACAS-NEXT:    mv a3, a1
82; ZACAS-NEXT:    amocas.w.aqrl a3, a2, (a0)
83; ZACAS-NEXT:    beq a3, a1, .LBB1_1
84; ZACAS-NEXT:  # %bb.2: # %exit
85; ZACAS-NEXT:    ret
86entry:
87  br label %do_cmpxchg
88do_cmpxchg:
89  %0 = cmpxchg ptr %ptr, i32 %cmp, i32 %val seq_cst seq_cst
90  %1 = extractvalue { i32, i1 } %0, 1
91  br i1 %1, label %do_cmpxchg, label %exit
92exit:
93  ret void
94}
95
96define void @cmpxchg_masked_and_branch1(ptr %ptr, i8 signext %cmp, i8 signext %val) nounwind {
97; RV32IA-LABEL: cmpxchg_masked_and_branch1:
98; RV32IA:       # %bb.0: # %entry
99; RV32IA-NEXT:    andi a3, a0, -4
100; RV32IA-NEXT:    slli a4, a0, 3
101; RV32IA-NEXT:    li a0, 255
102; RV32IA-NEXT:    andi a1, a1, 255
103; RV32IA-NEXT:    andi a2, a2, 255
104; RV32IA-NEXT:    sll a0, a0, a4
105; RV32IA-NEXT:    sll a1, a1, a4
106; RV32IA-NEXT:    sll a2, a2, a4
107; RV32IA-NEXT:  .LBB2_1: # %do_cmpxchg
108; RV32IA-NEXT:    # =>This Loop Header: Depth=1
109; RV32IA-NEXT:    # Child Loop BB2_3 Depth 2
110; RV32IA-NEXT:  .LBB2_3: # %do_cmpxchg
111; RV32IA-NEXT:    # Parent Loop BB2_1 Depth=1
112; RV32IA-NEXT:    # => This Inner Loop Header: Depth=2
113; RV32IA-NEXT:    lr.w.aqrl a4, (a3)
114; RV32IA-NEXT:    and a5, a4, a0
115; RV32IA-NEXT:    bne a5, a1, .LBB2_1
116; RV32IA-NEXT:  # %bb.4: # %do_cmpxchg
117; RV32IA-NEXT:    # in Loop: Header=BB2_3 Depth=2
118; RV32IA-NEXT:    xor a5, a4, a2
119; RV32IA-NEXT:    and a5, a5, a0
120; RV32IA-NEXT:    xor a5, a4, a5
121; RV32IA-NEXT:    sc.w.rl a5, a5, (a3)
122; RV32IA-NEXT:    bnez a5, .LBB2_3
123; RV32IA-NEXT:  # %bb.5: # %do_cmpxchg
124; RV32IA-NEXT:  # %bb.2: # %exit
125; RV32IA-NEXT:    ret
126;
127; RV32IA-ZACAS-LABEL: cmpxchg_masked_and_branch1:
128; RV32IA-ZACAS:       # %bb.0: # %entry
129; RV32IA-ZACAS-NEXT:    andi a3, a0, -4
130; RV32IA-ZACAS-NEXT:    slli a4, a0, 3
131; RV32IA-ZACAS-NEXT:    li a0, 255
132; RV32IA-ZACAS-NEXT:    andi a1, a1, 255
133; RV32IA-ZACAS-NEXT:    andi a2, a2, 255
134; RV32IA-ZACAS-NEXT:    sll a0, a0, a4
135; RV32IA-ZACAS-NEXT:    sll a1, a1, a4
136; RV32IA-ZACAS-NEXT:    sll a2, a2, a4
137; RV32IA-ZACAS-NEXT:  .LBB2_1: # %do_cmpxchg
138; RV32IA-ZACAS-NEXT:    # =>This Loop Header: Depth=1
139; RV32IA-ZACAS-NEXT:    # Child Loop BB2_3 Depth 2
140; RV32IA-ZACAS-NEXT:  .LBB2_3: # %do_cmpxchg
141; RV32IA-ZACAS-NEXT:    # Parent Loop BB2_1 Depth=1
142; RV32IA-ZACAS-NEXT:    # => This Inner Loop Header: Depth=2
143; RV32IA-ZACAS-NEXT:    lr.w.aqrl a4, (a3)
144; RV32IA-ZACAS-NEXT:    and a5, a4, a0
145; RV32IA-ZACAS-NEXT:    bne a5, a1, .LBB2_1
146; RV32IA-ZACAS-NEXT:  # %bb.4: # %do_cmpxchg
147; RV32IA-ZACAS-NEXT:    # in Loop: Header=BB2_3 Depth=2
148; RV32IA-ZACAS-NEXT:    xor a5, a4, a2
149; RV32IA-ZACAS-NEXT:    and a5, a5, a0
150; RV32IA-ZACAS-NEXT:    xor a5, a4, a5
151; RV32IA-ZACAS-NEXT:    sc.w.rl a5, a5, (a3)
152; RV32IA-ZACAS-NEXT:    bnez a5, .LBB2_3
153; RV32IA-ZACAS-NEXT:  # %bb.5: # %do_cmpxchg
154; RV32IA-ZACAS-NEXT:  # %bb.2: # %exit
155; RV32IA-ZACAS-NEXT:    ret
156;
157; RV64IA-LABEL: cmpxchg_masked_and_branch1:
158; RV64IA:       # %bb.0: # %entry
159; RV64IA-NEXT:    andi a3, a0, -4
160; RV64IA-NEXT:    slli a4, a0, 3
161; RV64IA-NEXT:    li a0, 255
162; RV64IA-NEXT:    andi a1, a1, 255
163; RV64IA-NEXT:    andi a2, a2, 255
164; RV64IA-NEXT:    sllw a0, a0, a4
165; RV64IA-NEXT:    sllw a1, a1, a4
166; RV64IA-NEXT:    sllw a2, a2, a4
167; RV64IA-NEXT:  .LBB2_1: # %do_cmpxchg
168; RV64IA-NEXT:    # =>This Loop Header: Depth=1
169; RV64IA-NEXT:    # Child Loop BB2_3 Depth 2
170; RV64IA-NEXT:  .LBB2_3: # %do_cmpxchg
171; RV64IA-NEXT:    # Parent Loop BB2_1 Depth=1
172; RV64IA-NEXT:    # => This Inner Loop Header: Depth=2
173; RV64IA-NEXT:    lr.w.aqrl a4, (a3)
174; RV64IA-NEXT:    and a5, a4, a0
175; RV64IA-NEXT:    bne a5, a1, .LBB2_1
176; RV64IA-NEXT:  # %bb.4: # %do_cmpxchg
177; RV64IA-NEXT:    # in Loop: Header=BB2_3 Depth=2
178; RV64IA-NEXT:    xor a5, a4, a2
179; RV64IA-NEXT:    and a5, a5, a0
180; RV64IA-NEXT:    xor a5, a4, a5
181; RV64IA-NEXT:    sc.w.rl a5, a5, (a3)
182; RV64IA-NEXT:    bnez a5, .LBB2_3
183; RV64IA-NEXT:  # %bb.5: # %do_cmpxchg
184; RV64IA-NEXT:  # %bb.2: # %exit
185; RV64IA-NEXT:    ret
186;
187; RV64IA-ZACAS-LABEL: cmpxchg_masked_and_branch1:
188; RV64IA-ZACAS:       # %bb.0: # %entry
189; RV64IA-ZACAS-NEXT:    andi a3, a0, -4
190; RV64IA-ZACAS-NEXT:    slli a4, a0, 3
191; RV64IA-ZACAS-NEXT:    li a0, 255
192; RV64IA-ZACAS-NEXT:    andi a1, a1, 255
193; RV64IA-ZACAS-NEXT:    andi a2, a2, 255
194; RV64IA-ZACAS-NEXT:    sllw a0, a0, a4
195; RV64IA-ZACAS-NEXT:    sllw a1, a1, a4
196; RV64IA-ZACAS-NEXT:    sllw a2, a2, a4
197; RV64IA-ZACAS-NEXT:  .LBB2_1: # %do_cmpxchg
198; RV64IA-ZACAS-NEXT:    # =>This Loop Header: Depth=1
199; RV64IA-ZACAS-NEXT:    # Child Loop BB2_3 Depth 2
200; RV64IA-ZACAS-NEXT:  .LBB2_3: # %do_cmpxchg
201; RV64IA-ZACAS-NEXT:    # Parent Loop BB2_1 Depth=1
202; RV64IA-ZACAS-NEXT:    # => This Inner Loop Header: Depth=2
203; RV64IA-ZACAS-NEXT:    lr.w.aqrl a4, (a3)
204; RV64IA-ZACAS-NEXT:    and a5, a4, a0
205; RV64IA-ZACAS-NEXT:    bne a5, a1, .LBB2_1
206; RV64IA-ZACAS-NEXT:  # %bb.4: # %do_cmpxchg
207; RV64IA-ZACAS-NEXT:    # in Loop: Header=BB2_3 Depth=2
208; RV64IA-ZACAS-NEXT:    xor a5, a4, a2
209; RV64IA-ZACAS-NEXT:    and a5, a5, a0
210; RV64IA-ZACAS-NEXT:    xor a5, a4, a5
211; RV64IA-ZACAS-NEXT:    sc.w.rl a5, a5, (a3)
212; RV64IA-ZACAS-NEXT:    bnez a5, .LBB2_3
213; RV64IA-ZACAS-NEXT:  # %bb.5: # %do_cmpxchg
214; RV64IA-ZACAS-NEXT:  # %bb.2: # %exit
215; RV64IA-ZACAS-NEXT:    ret
216;
217; RV64IA-ZABHA-LABEL: cmpxchg_masked_and_branch1:
218; RV64IA-ZABHA:       # %bb.0: # %entry
219; RV64IA-ZABHA-NEXT:  .LBB2_1: # %do_cmpxchg
220; RV64IA-ZABHA-NEXT:    # =>This Inner Loop Header: Depth=1
221; RV64IA-ZABHA-NEXT:    fence rw, rw
222; RV64IA-ZABHA-NEXT:    mv a3, a1
223; RV64IA-ZABHA-NEXT:    amocas.b.aqrl a3, a2, (a0)
224; RV64IA-ZABHA-NEXT:    bne a3, a1, .LBB2_1
225; RV64IA-ZABHA-NEXT:  # %bb.2: # %exit
226; RV64IA-ZABHA-NEXT:    ret
227entry:
228  br label %do_cmpxchg
229do_cmpxchg:
230  %0 = cmpxchg ptr %ptr, i8 %cmp, i8 %val seq_cst seq_cst
231  %1 = extractvalue { i8, i1 } %0, 1
232  br i1 %1, label %exit, label %do_cmpxchg
233exit:
234  ret void
235}
236
237define void @cmpxchg_masked_and_branch2(ptr %ptr, i8 signext %cmp, i8 signext %val) nounwind {
238; RV32IA-LABEL: cmpxchg_masked_and_branch2:
239; RV32IA:       # %bb.0: # %entry
240; RV32IA-NEXT:    andi a3, a0, -4
241; RV32IA-NEXT:    slli a4, a0, 3
242; RV32IA-NEXT:    li a0, 255
243; RV32IA-NEXT:    andi a1, a1, 255
244; RV32IA-NEXT:    andi a2, a2, 255
245; RV32IA-NEXT:    sll a0, a0, a4
246; RV32IA-NEXT:    sll a1, a1, a4
247; RV32IA-NEXT:    sll a2, a2, a4
248; RV32IA-NEXT:  .LBB3_1: # %do_cmpxchg
249; RV32IA-NEXT:    # =>This Loop Header: Depth=1
250; RV32IA-NEXT:    # Child Loop BB3_3 Depth 2
251; RV32IA-NEXT:  .LBB3_3: # %do_cmpxchg
252; RV32IA-NEXT:    # Parent Loop BB3_1 Depth=1
253; RV32IA-NEXT:    # => This Inner Loop Header: Depth=2
254; RV32IA-NEXT:    lr.w.aqrl a4, (a3)
255; RV32IA-NEXT:    and a5, a4, a0
256; RV32IA-NEXT:    bne a5, a1, .LBB3_5
257; RV32IA-NEXT:  # %bb.4: # %do_cmpxchg
258; RV32IA-NEXT:    # in Loop: Header=BB3_3 Depth=2
259; RV32IA-NEXT:    xor a5, a4, a2
260; RV32IA-NEXT:    and a5, a5, a0
261; RV32IA-NEXT:    xor a5, a4, a5
262; RV32IA-NEXT:    sc.w.rl a5, a5, (a3)
263; RV32IA-NEXT:    bnez a5, .LBB3_3
264; RV32IA-NEXT:  .LBB3_5: # %do_cmpxchg
265; RV32IA-NEXT:    # in Loop: Header=BB3_1 Depth=1
266; RV32IA-NEXT:    and a4, a4, a0
267; RV32IA-NEXT:    beq a1, a4, .LBB3_1
268; RV32IA-NEXT:  # %bb.2: # %exit
269; RV32IA-NEXT:    ret
270;
271; RV32IA-ZACAS-LABEL: cmpxchg_masked_and_branch2:
272; RV32IA-ZACAS:       # %bb.0: # %entry
273; RV32IA-ZACAS-NEXT:    andi a3, a0, -4
274; RV32IA-ZACAS-NEXT:    slli a4, a0, 3
275; RV32IA-ZACAS-NEXT:    li a0, 255
276; RV32IA-ZACAS-NEXT:    andi a1, a1, 255
277; RV32IA-ZACAS-NEXT:    andi a2, a2, 255
278; RV32IA-ZACAS-NEXT:    sll a0, a0, a4
279; RV32IA-ZACAS-NEXT:    sll a1, a1, a4
280; RV32IA-ZACAS-NEXT:    sll a2, a2, a4
281; RV32IA-ZACAS-NEXT:  .LBB3_1: # %do_cmpxchg
282; RV32IA-ZACAS-NEXT:    # =>This Loop Header: Depth=1
283; RV32IA-ZACAS-NEXT:    # Child Loop BB3_3 Depth 2
284; RV32IA-ZACAS-NEXT:  .LBB3_3: # %do_cmpxchg
285; RV32IA-ZACAS-NEXT:    # Parent Loop BB3_1 Depth=1
286; RV32IA-ZACAS-NEXT:    # => This Inner Loop Header: Depth=2
287; RV32IA-ZACAS-NEXT:    lr.w.aqrl a4, (a3)
288; RV32IA-ZACAS-NEXT:    and a5, a4, a0
289; RV32IA-ZACAS-NEXT:    bne a5, a1, .LBB3_5
290; RV32IA-ZACAS-NEXT:  # %bb.4: # %do_cmpxchg
291; RV32IA-ZACAS-NEXT:    # in Loop: Header=BB3_3 Depth=2
292; RV32IA-ZACAS-NEXT:    xor a5, a4, a2
293; RV32IA-ZACAS-NEXT:    and a5, a5, a0
294; RV32IA-ZACAS-NEXT:    xor a5, a4, a5
295; RV32IA-ZACAS-NEXT:    sc.w.rl a5, a5, (a3)
296; RV32IA-ZACAS-NEXT:    bnez a5, .LBB3_3
297; RV32IA-ZACAS-NEXT:  .LBB3_5: # %do_cmpxchg
298; RV32IA-ZACAS-NEXT:    # in Loop: Header=BB3_1 Depth=1
299; RV32IA-ZACAS-NEXT:    and a4, a4, a0
300; RV32IA-ZACAS-NEXT:    beq a1, a4, .LBB3_1
301; RV32IA-ZACAS-NEXT:  # %bb.2: # %exit
302; RV32IA-ZACAS-NEXT:    ret
303;
304; RV64IA-LABEL: cmpxchg_masked_and_branch2:
305; RV64IA:       # %bb.0: # %entry
306; RV64IA-NEXT:    andi a3, a0, -4
307; RV64IA-NEXT:    slli a4, a0, 3
308; RV64IA-NEXT:    li a0, 255
309; RV64IA-NEXT:    andi a1, a1, 255
310; RV64IA-NEXT:    andi a2, a2, 255
311; RV64IA-NEXT:    sllw a0, a0, a4
312; RV64IA-NEXT:    sllw a1, a1, a4
313; RV64IA-NEXT:    sllw a2, a2, a4
314; RV64IA-NEXT:  .LBB3_1: # %do_cmpxchg
315; RV64IA-NEXT:    # =>This Loop Header: Depth=1
316; RV64IA-NEXT:    # Child Loop BB3_3 Depth 2
317; RV64IA-NEXT:  .LBB3_3: # %do_cmpxchg
318; RV64IA-NEXT:    # Parent Loop BB3_1 Depth=1
319; RV64IA-NEXT:    # => This Inner Loop Header: Depth=2
320; RV64IA-NEXT:    lr.w.aqrl a4, (a3)
321; RV64IA-NEXT:    and a5, a4, a0
322; RV64IA-NEXT:    bne a5, a1, .LBB3_5
323; RV64IA-NEXT:  # %bb.4: # %do_cmpxchg
324; RV64IA-NEXT:    # in Loop: Header=BB3_3 Depth=2
325; RV64IA-NEXT:    xor a5, a4, a2
326; RV64IA-NEXT:    and a5, a5, a0
327; RV64IA-NEXT:    xor a5, a4, a5
328; RV64IA-NEXT:    sc.w.rl a5, a5, (a3)
329; RV64IA-NEXT:    bnez a5, .LBB3_3
330; RV64IA-NEXT:  .LBB3_5: # %do_cmpxchg
331; RV64IA-NEXT:    # in Loop: Header=BB3_1 Depth=1
332; RV64IA-NEXT:    and a4, a4, a0
333; RV64IA-NEXT:    beq a1, a4, .LBB3_1
334; RV64IA-NEXT:  # %bb.2: # %exit
335; RV64IA-NEXT:    ret
336;
337; RV64IA-ZACAS-LABEL: cmpxchg_masked_and_branch2:
338; RV64IA-ZACAS:       # %bb.0: # %entry
339; RV64IA-ZACAS-NEXT:    andi a3, a0, -4
340; RV64IA-ZACAS-NEXT:    slli a4, a0, 3
341; RV64IA-ZACAS-NEXT:    li a0, 255
342; RV64IA-ZACAS-NEXT:    andi a1, a1, 255
343; RV64IA-ZACAS-NEXT:    andi a2, a2, 255
344; RV64IA-ZACAS-NEXT:    sllw a0, a0, a4
345; RV64IA-ZACAS-NEXT:    sllw a1, a1, a4
346; RV64IA-ZACAS-NEXT:    sllw a2, a2, a4
347; RV64IA-ZACAS-NEXT:  .LBB3_1: # %do_cmpxchg
348; RV64IA-ZACAS-NEXT:    # =>This Loop Header: Depth=1
349; RV64IA-ZACAS-NEXT:    # Child Loop BB3_3 Depth 2
350; RV64IA-ZACAS-NEXT:  .LBB3_3: # %do_cmpxchg
351; RV64IA-ZACAS-NEXT:    # Parent Loop BB3_1 Depth=1
352; RV64IA-ZACAS-NEXT:    # => This Inner Loop Header: Depth=2
353; RV64IA-ZACAS-NEXT:    lr.w.aqrl a4, (a3)
354; RV64IA-ZACAS-NEXT:    and a5, a4, a0
355; RV64IA-ZACAS-NEXT:    bne a5, a1, .LBB3_5
356; RV64IA-ZACAS-NEXT:  # %bb.4: # %do_cmpxchg
357; RV64IA-ZACAS-NEXT:    # in Loop: Header=BB3_3 Depth=2
358; RV64IA-ZACAS-NEXT:    xor a5, a4, a2
359; RV64IA-ZACAS-NEXT:    and a5, a5, a0
360; RV64IA-ZACAS-NEXT:    xor a5, a4, a5
361; RV64IA-ZACAS-NEXT:    sc.w.rl a5, a5, (a3)
362; RV64IA-ZACAS-NEXT:    bnez a5, .LBB3_3
363; RV64IA-ZACAS-NEXT:  .LBB3_5: # %do_cmpxchg
364; RV64IA-ZACAS-NEXT:    # in Loop: Header=BB3_1 Depth=1
365; RV64IA-ZACAS-NEXT:    and a4, a4, a0
366; RV64IA-ZACAS-NEXT:    beq a1, a4, .LBB3_1
367; RV64IA-ZACAS-NEXT:  # %bb.2: # %exit
368; RV64IA-ZACAS-NEXT:    ret
369;
370; RV64IA-ZABHA-LABEL: cmpxchg_masked_and_branch2:
371; RV64IA-ZABHA:       # %bb.0: # %entry
372; RV64IA-ZABHA-NEXT:  .LBB3_1: # %do_cmpxchg
373; RV64IA-ZABHA-NEXT:    # =>This Inner Loop Header: Depth=1
374; RV64IA-ZABHA-NEXT:    fence rw, rw
375; RV64IA-ZABHA-NEXT:    mv a3, a1
376; RV64IA-ZABHA-NEXT:    amocas.b.aqrl a3, a2, (a0)
377; RV64IA-ZABHA-NEXT:    beq a3, a1, .LBB3_1
378; RV64IA-ZABHA-NEXT:  # %bb.2: # %exit
379; RV64IA-ZABHA-NEXT:    ret
380entry:
381  br label %do_cmpxchg
382do_cmpxchg:
383  %0 = cmpxchg ptr %ptr, i8 %cmp, i8 %val seq_cst seq_cst
384  %1 = extractvalue { i8, i1 } %0, 1
385  br i1 %1, label %do_cmpxchg, label %exit
386exit:
387  ret void
388}
389
390define void @cmpxchg_and_irrelevant_branch(ptr %ptr, i32 signext %cmp, i32 signext %val, i1 zeroext %bool) nounwind {
391; NOZACAS-LABEL: cmpxchg_and_irrelevant_branch:
392; NOZACAS:       # %bb.0: # %entry
393; NOZACAS-NEXT:  .LBB4_1: # %do_cmpxchg
394; NOZACAS-NEXT:    # =>This Loop Header: Depth=1
395; NOZACAS-NEXT:    # Child Loop BB4_3 Depth 2
396; NOZACAS-NEXT:  .LBB4_3: # %do_cmpxchg
397; NOZACAS-NEXT:    # Parent Loop BB4_1 Depth=1
398; NOZACAS-NEXT:    # => This Inner Loop Header: Depth=2
399; NOZACAS-NEXT:    lr.w.aqrl a4, (a0)
400; NOZACAS-NEXT:    bne a4, a1, .LBB4_5
401; NOZACAS-NEXT:  # %bb.4: # %do_cmpxchg
402; NOZACAS-NEXT:    # in Loop: Header=BB4_3 Depth=2
403; NOZACAS-NEXT:    sc.w.rl a5, a2, (a0)
404; NOZACAS-NEXT:    bnez a5, .LBB4_3
405; NOZACAS-NEXT:  .LBB4_5: # %do_cmpxchg
406; NOZACAS-NEXT:    # in Loop: Header=BB4_1 Depth=1
407; NOZACAS-NEXT:    beqz a3, .LBB4_1
408; NOZACAS-NEXT:  # %bb.2: # %exit
409; NOZACAS-NEXT:    ret
410;
411; ZACAS-LABEL: cmpxchg_and_irrelevant_branch:
412; ZACAS:       # %bb.0: # %entry
413; ZACAS-NEXT:  .LBB4_1: # %do_cmpxchg
414; ZACAS-NEXT:    # =>This Inner Loop Header: Depth=1
415; ZACAS-NEXT:    fence rw, rw
416; ZACAS-NEXT:    mv a4, a1
417; ZACAS-NEXT:    amocas.w.aqrl a4, a2, (a0)
418; ZACAS-NEXT:    beqz a3, .LBB4_1
419; ZACAS-NEXT:  # %bb.2: # %exit
420; ZACAS-NEXT:    ret
421entry:
422  br label %do_cmpxchg
423do_cmpxchg:
424  %0 = cmpxchg ptr %ptr, i32 %cmp, i32 %val seq_cst seq_cst
425  %1 = extractvalue { i32, i1 } %0, 1
426  br i1 %bool, label %exit, label %do_cmpxchg
427exit:
428  ret void
429}
430