1; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5 2; RUN: llc < %s -mtriple=riscv64 -mattr=+v -global-isel -stop-after=riscv-prelegalizer-combiner | FileCheck %s 3 4; Make sure we don't crash in the prelegalizer combiner for scalable vector 5; insert and extracts. 6 7define <vscale x 1 x i1> @insertelement_nxv1i1_0(<vscale x 1 x i1> %x) { 8 ; CHECK-LABEL: name: insertelement_nxv1i1_0 9 ; CHECK: bb.1 (%ir-block.0): 10 ; CHECK-NEXT: liveins: $v0 11 ; CHECK-NEXT: {{ $}} 12 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 1 x s1>) = COPY $v0 13 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s1) = G_CONSTANT i1 false 14 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 15 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 1 x s1>) = G_INSERT_VECTOR_ELT [[COPY]], [[C]](s1), [[C1]](s64) 16 ; CHECK-NEXT: $v0 = COPY [[IVEC]](<vscale x 1 x s1>) 17 ; CHECK-NEXT: PseudoRET implicit $v0 18 %a = insertelement <vscale x 1 x i1> %x, i1 0, i32 0 19 ret <vscale x 1 x i1> %a 20} 21 22define <vscale x 1 x i1> @shufflevector_nxv1i1_0(<vscale x 1 x i1> %x) { 23 ; CHECK-LABEL: name: shufflevector_nxv1i1_0 24 ; CHECK: bb.1 (%ir-block.0): 25 ; CHECK-NEXT: liveins: $v0 26 ; CHECK-NEXT: {{ $}} 27 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 1 x s1>) = COPY $v0 28 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 29 ; CHECK-NEXT: [[EVEC:%[0-9]+]]:_(s1) = G_EXTRACT_VECTOR_ELT [[COPY]](<vscale x 1 x s1>), [[C]](s64) 30 ; CHECK-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 1 x s1>) = G_SPLAT_VECTOR [[EVEC]](s1) 31 ; CHECK-NEXT: $v0 = COPY [[SPLAT_VECTOR]](<vscale x 1 x s1>) 32 ; CHECK-NEXT: PseudoRET implicit $v0 33 %a = shufflevector <vscale x 1 x i1> %x, <vscale x 1 x i1> poison, <vscale x 1 x i32> poison 34 ret <vscale x 1 x i1> %a 35} 36