1; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 4 2; RUN: llc -mtriple=riscv32 -mattr=+v -global-isel -stop-after=irtranslator \ 3; RUN: -verify-machineinstrs < %s | FileCheck -check-prefixes=RV32 %s 4; RUN: llc -mtriple=riscv64 -mattr=+v -global-isel -stop-after=irtranslator \ 5; RUN: -verify-machineinstrs < %s | FileCheck -check-prefixes=RV64 %s 6 7define <vscale x 1 x i1> @shufflevector_nxv1i1_0() { 8 ; RV32-LABEL: name: shufflevector_nxv1i1_0 9 ; RV32: bb.1 (%ir-block.0): 10 ; RV32-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 1 x s1>) = G_IMPLICIT_DEF 11 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 12 ; RV32-NEXT: [[EVEC:%[0-9]+]]:_(s1) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 1 x s1>), [[C]](s32) 13 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 1 x s1>) = G_SPLAT_VECTOR [[EVEC]](s1) 14 ; RV32-NEXT: $v0 = COPY [[SPLAT_VECTOR]](<vscale x 1 x s1>) 15 ; RV32-NEXT: PseudoRET implicit $v0 16 ; 17 ; RV64-LABEL: name: shufflevector_nxv1i1_0 18 ; RV64: bb.1 (%ir-block.0): 19 ; RV64-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 1 x s1>) = G_IMPLICIT_DEF 20 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 21 ; RV64-NEXT: [[EVEC:%[0-9]+]]:_(s1) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 1 x s1>), [[C]](s64) 22 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 1 x s1>) = G_SPLAT_VECTOR [[EVEC]](s1) 23 ; RV64-NEXT: $v0 = COPY [[SPLAT_VECTOR]](<vscale x 1 x s1>) 24 ; RV64-NEXT: PseudoRET implicit $v0 25 %a = shufflevector <vscale x 1 x i1> poison, <vscale x 1 x i1> poison, <vscale x 1 x i32> poison 26 ret <vscale x 1 x i1> %a 27} 28 29define <vscale x 1 x i1> @shufflevector_nxv1i1_1() { 30 ; RV32-LABEL: name: shufflevector_nxv1i1_1 31 ; RV32: bb.1 (%ir-block.0): 32 ; RV32-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 1 x s1>) = G_IMPLICIT_DEF 33 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 34 ; RV32-NEXT: [[EVEC:%[0-9]+]]:_(s1) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 1 x s1>), [[C]](s32) 35 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 1 x s1>) = G_SPLAT_VECTOR [[EVEC]](s1) 36 ; RV32-NEXT: $v0 = COPY [[SPLAT_VECTOR]](<vscale x 1 x s1>) 37 ; RV32-NEXT: PseudoRET implicit $v0 38 ; 39 ; RV64-LABEL: name: shufflevector_nxv1i1_1 40 ; RV64: bb.1 (%ir-block.0): 41 ; RV64-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 1 x s1>) = G_IMPLICIT_DEF 42 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 43 ; RV64-NEXT: [[EVEC:%[0-9]+]]:_(s1) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 1 x s1>), [[C]](s64) 44 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 1 x s1>) = G_SPLAT_VECTOR [[EVEC]](s1) 45 ; RV64-NEXT: $v0 = COPY [[SPLAT_VECTOR]](<vscale x 1 x s1>) 46 ; RV64-NEXT: PseudoRET implicit $v0 47 %a = shufflevector <vscale x 1 x i1> undef, <vscale x 1 x i1> undef, <vscale x 1 x i32> undef 48 ret <vscale x 1 x i1> %a 49} 50 51define <vscale x 1 x i1> @shufflevector_nxv1i1_2(<vscale x 1 x i1> %a) { 52 ; RV32-LABEL: name: shufflevector_nxv1i1_2 53 ; RV32: bb.1 (%ir-block.0): 54 ; RV32-NEXT: liveins: $v0 55 ; RV32-NEXT: {{ $}} 56 ; RV32-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 1 x s1>) = COPY $v0 57 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 58 ; RV32-NEXT: [[EVEC:%[0-9]+]]:_(s1) = G_EXTRACT_VECTOR_ELT [[COPY]](<vscale x 1 x s1>), [[C]](s32) 59 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 1 x s1>) = G_SPLAT_VECTOR [[EVEC]](s1) 60 ; RV32-NEXT: $v0 = COPY [[SPLAT_VECTOR]](<vscale x 1 x s1>) 61 ; RV32-NEXT: PseudoRET implicit $v0 62 ; 63 ; RV64-LABEL: name: shufflevector_nxv1i1_2 64 ; RV64: bb.1 (%ir-block.0): 65 ; RV64-NEXT: liveins: $v0 66 ; RV64-NEXT: {{ $}} 67 ; RV64-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 1 x s1>) = COPY $v0 68 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 69 ; RV64-NEXT: [[EVEC:%[0-9]+]]:_(s1) = G_EXTRACT_VECTOR_ELT [[COPY]](<vscale x 1 x s1>), [[C]](s64) 70 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 1 x s1>) = G_SPLAT_VECTOR [[EVEC]](s1) 71 ; RV64-NEXT: $v0 = COPY [[SPLAT_VECTOR]](<vscale x 1 x s1>) 72 ; RV64-NEXT: PseudoRET implicit $v0 73 %b = shufflevector <vscale x 1 x i1> %a , <vscale x 1 x i1> poison, <vscale x 1 x i32> zeroinitializer 74 ret <vscale x 1 x i1> %b 75} 76 77define <vscale x 2 x i1> @shufflevector_nxv2i1_0() { 78 ; RV32-LABEL: name: shufflevector_nxv2i1_0 79 ; RV32: bb.1 (%ir-block.0): 80 ; RV32-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 2 x s1>) = G_IMPLICIT_DEF 81 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 82 ; RV32-NEXT: [[EVEC:%[0-9]+]]:_(s1) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 2 x s1>), [[C]](s32) 83 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 2 x s1>) = G_SPLAT_VECTOR [[EVEC]](s1) 84 ; RV32-NEXT: $v0 = COPY [[SPLAT_VECTOR]](<vscale x 2 x s1>) 85 ; RV32-NEXT: PseudoRET implicit $v0 86 ; 87 ; RV64-LABEL: name: shufflevector_nxv2i1_0 88 ; RV64: bb.1 (%ir-block.0): 89 ; RV64-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 2 x s1>) = G_IMPLICIT_DEF 90 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 91 ; RV64-NEXT: [[EVEC:%[0-9]+]]:_(s1) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 2 x s1>), [[C]](s64) 92 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 2 x s1>) = G_SPLAT_VECTOR [[EVEC]](s1) 93 ; RV64-NEXT: $v0 = COPY [[SPLAT_VECTOR]](<vscale x 2 x s1>) 94 ; RV64-NEXT: PseudoRET implicit $v0 95 %a = shufflevector <vscale x 2 x i1> poison, <vscale x 2 x i1> poison, <vscale x 2 x i32> poison 96 ret <vscale x 2 x i1> %a 97} 98 99define <vscale x 2 x i1> @shufflevector_nxv2i1_1() { 100 ; RV32-LABEL: name: shufflevector_nxv2i1_1 101 ; RV32: bb.1 (%ir-block.0): 102 ; RV32-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 2 x s1>) = G_IMPLICIT_DEF 103 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 104 ; RV32-NEXT: [[EVEC:%[0-9]+]]:_(s1) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 2 x s1>), [[C]](s32) 105 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 2 x s1>) = G_SPLAT_VECTOR [[EVEC]](s1) 106 ; RV32-NEXT: $v0 = COPY [[SPLAT_VECTOR]](<vscale x 2 x s1>) 107 ; RV32-NEXT: PseudoRET implicit $v0 108 ; 109 ; RV64-LABEL: name: shufflevector_nxv2i1_1 110 ; RV64: bb.1 (%ir-block.0): 111 ; RV64-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 2 x s1>) = G_IMPLICIT_DEF 112 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 113 ; RV64-NEXT: [[EVEC:%[0-9]+]]:_(s1) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 2 x s1>), [[C]](s64) 114 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 2 x s1>) = G_SPLAT_VECTOR [[EVEC]](s1) 115 ; RV64-NEXT: $v0 = COPY [[SPLAT_VECTOR]](<vscale x 2 x s1>) 116 ; RV64-NEXT: PseudoRET implicit $v0 117 %a = shufflevector <vscale x 2 x i1> undef, <vscale x 2 x i1> undef, <vscale x 2 x i32> undef 118 ret <vscale x 2 x i1> %a 119} 120 121define <vscale x 2 x i1> @shufflevector_nxv2i1_2(<vscale x 2 x i1> %a) { 122 ; RV32-LABEL: name: shufflevector_nxv2i1_2 123 ; RV32: bb.1 (%ir-block.0): 124 ; RV32-NEXT: liveins: $v0 125 ; RV32-NEXT: {{ $}} 126 ; RV32-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 2 x s1>) = COPY $v0 127 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 128 ; RV32-NEXT: [[EVEC:%[0-9]+]]:_(s1) = G_EXTRACT_VECTOR_ELT [[COPY]](<vscale x 2 x s1>), [[C]](s32) 129 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 2 x s1>) = G_SPLAT_VECTOR [[EVEC]](s1) 130 ; RV32-NEXT: $v0 = COPY [[SPLAT_VECTOR]](<vscale x 2 x s1>) 131 ; RV32-NEXT: PseudoRET implicit $v0 132 ; 133 ; RV64-LABEL: name: shufflevector_nxv2i1_2 134 ; RV64: bb.1 (%ir-block.0): 135 ; RV64-NEXT: liveins: $v0 136 ; RV64-NEXT: {{ $}} 137 ; RV64-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 2 x s1>) = COPY $v0 138 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 139 ; RV64-NEXT: [[EVEC:%[0-9]+]]:_(s1) = G_EXTRACT_VECTOR_ELT [[COPY]](<vscale x 2 x s1>), [[C]](s64) 140 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 2 x s1>) = G_SPLAT_VECTOR [[EVEC]](s1) 141 ; RV64-NEXT: $v0 = COPY [[SPLAT_VECTOR]](<vscale x 2 x s1>) 142 ; RV64-NEXT: PseudoRET implicit $v0 143 %b = shufflevector <vscale x 2 x i1> %a , <vscale x 2 x i1> poison, <vscale x 2 x i32> zeroinitializer 144 ret <vscale x 2 x i1> %b 145} 146 147define <vscale x 4 x i1> @shufflevector_nxv4i1_0() { 148 ; RV32-LABEL: name: shufflevector_nxv4i1_0 149 ; RV32: bb.1 (%ir-block.0): 150 ; RV32-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 4 x s1>) = G_IMPLICIT_DEF 151 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 152 ; RV32-NEXT: [[EVEC:%[0-9]+]]:_(s1) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 4 x s1>), [[C]](s32) 153 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 4 x s1>) = G_SPLAT_VECTOR [[EVEC]](s1) 154 ; RV32-NEXT: $v0 = COPY [[SPLAT_VECTOR]](<vscale x 4 x s1>) 155 ; RV32-NEXT: PseudoRET implicit $v0 156 ; 157 ; RV64-LABEL: name: shufflevector_nxv4i1_0 158 ; RV64: bb.1 (%ir-block.0): 159 ; RV64-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 4 x s1>) = G_IMPLICIT_DEF 160 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 161 ; RV64-NEXT: [[EVEC:%[0-9]+]]:_(s1) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 4 x s1>), [[C]](s64) 162 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 4 x s1>) = G_SPLAT_VECTOR [[EVEC]](s1) 163 ; RV64-NEXT: $v0 = COPY [[SPLAT_VECTOR]](<vscale x 4 x s1>) 164 ; RV64-NEXT: PseudoRET implicit $v0 165 %a = shufflevector <vscale x 4 x i1> poison, <vscale x 4 x i1> poison, <vscale x 4 x i32> poison 166 ret <vscale x 4 x i1> %a 167} 168 169define <vscale x 4 x i1> @shufflevector_nxv4i1_1() { 170 ; RV32-LABEL: name: shufflevector_nxv4i1_1 171 ; RV32: bb.1 (%ir-block.0): 172 ; RV32-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 4 x s1>) = G_IMPLICIT_DEF 173 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 174 ; RV32-NEXT: [[EVEC:%[0-9]+]]:_(s1) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 4 x s1>), [[C]](s32) 175 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 4 x s1>) = G_SPLAT_VECTOR [[EVEC]](s1) 176 ; RV32-NEXT: $v0 = COPY [[SPLAT_VECTOR]](<vscale x 4 x s1>) 177 ; RV32-NEXT: PseudoRET implicit $v0 178 ; 179 ; RV64-LABEL: name: shufflevector_nxv4i1_1 180 ; RV64: bb.1 (%ir-block.0): 181 ; RV64-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 4 x s1>) = G_IMPLICIT_DEF 182 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 183 ; RV64-NEXT: [[EVEC:%[0-9]+]]:_(s1) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 4 x s1>), [[C]](s64) 184 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 4 x s1>) = G_SPLAT_VECTOR [[EVEC]](s1) 185 ; RV64-NEXT: $v0 = COPY [[SPLAT_VECTOR]](<vscale x 4 x s1>) 186 ; RV64-NEXT: PseudoRET implicit $v0 187 %a = shufflevector <vscale x 4 x i1> undef, <vscale x 4 x i1> undef, <vscale x 4 x i32> undef 188 ret <vscale x 4 x i1> %a 189} 190 191define <vscale x 4 x i1> @shufflevector_nxv4i1_2(<vscale x 4 x i1> %a) { 192 ; RV32-LABEL: name: shufflevector_nxv4i1_2 193 ; RV32: bb.1 (%ir-block.0): 194 ; RV32-NEXT: liveins: $v0 195 ; RV32-NEXT: {{ $}} 196 ; RV32-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 4 x s1>) = COPY $v0 197 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 198 ; RV32-NEXT: [[EVEC:%[0-9]+]]:_(s1) = G_EXTRACT_VECTOR_ELT [[COPY]](<vscale x 4 x s1>), [[C]](s32) 199 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 4 x s1>) = G_SPLAT_VECTOR [[EVEC]](s1) 200 ; RV32-NEXT: $v0 = COPY [[SPLAT_VECTOR]](<vscale x 4 x s1>) 201 ; RV32-NEXT: PseudoRET implicit $v0 202 ; 203 ; RV64-LABEL: name: shufflevector_nxv4i1_2 204 ; RV64: bb.1 (%ir-block.0): 205 ; RV64-NEXT: liveins: $v0 206 ; RV64-NEXT: {{ $}} 207 ; RV64-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 4 x s1>) = COPY $v0 208 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 209 ; RV64-NEXT: [[EVEC:%[0-9]+]]:_(s1) = G_EXTRACT_VECTOR_ELT [[COPY]](<vscale x 4 x s1>), [[C]](s64) 210 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 4 x s1>) = G_SPLAT_VECTOR [[EVEC]](s1) 211 ; RV64-NEXT: $v0 = COPY [[SPLAT_VECTOR]](<vscale x 4 x s1>) 212 ; RV64-NEXT: PseudoRET implicit $v0 213 %b = shufflevector <vscale x 4 x i1> %a , <vscale x 4 x i1> poison, <vscale x 4 x i32> zeroinitializer 214 ret <vscale x 4 x i1> %b 215} 216 217define <vscale x 8 x i1> @shufflevector_nxv8i1_0() { 218 ; RV32-LABEL: name: shufflevector_nxv8i1_0 219 ; RV32: bb.1 (%ir-block.0): 220 ; RV32-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 8 x s1>) = G_IMPLICIT_DEF 221 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 222 ; RV32-NEXT: [[EVEC:%[0-9]+]]:_(s1) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 8 x s1>), [[C]](s32) 223 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 8 x s1>) = G_SPLAT_VECTOR [[EVEC]](s1) 224 ; RV32-NEXT: $v0 = COPY [[SPLAT_VECTOR]](<vscale x 8 x s1>) 225 ; RV32-NEXT: PseudoRET implicit $v0 226 ; 227 ; RV64-LABEL: name: shufflevector_nxv8i1_0 228 ; RV64: bb.1 (%ir-block.0): 229 ; RV64-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 8 x s1>) = G_IMPLICIT_DEF 230 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 231 ; RV64-NEXT: [[EVEC:%[0-9]+]]:_(s1) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 8 x s1>), [[C]](s64) 232 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 8 x s1>) = G_SPLAT_VECTOR [[EVEC]](s1) 233 ; RV64-NEXT: $v0 = COPY [[SPLAT_VECTOR]](<vscale x 8 x s1>) 234 ; RV64-NEXT: PseudoRET implicit $v0 235 %a = shufflevector <vscale x 8 x i1> poison, <vscale x 8 x i1> poison, <vscale x 8 x i32> poison 236 ret <vscale x 8 x i1> %a 237} 238 239define <vscale x 8 x i1> @shufflevector_nxv8i1_1() { 240 ; RV32-LABEL: name: shufflevector_nxv8i1_1 241 ; RV32: bb.1 (%ir-block.0): 242 ; RV32-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 8 x s1>) = G_IMPLICIT_DEF 243 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 244 ; RV32-NEXT: [[EVEC:%[0-9]+]]:_(s1) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 8 x s1>), [[C]](s32) 245 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 8 x s1>) = G_SPLAT_VECTOR [[EVEC]](s1) 246 ; RV32-NEXT: $v0 = COPY [[SPLAT_VECTOR]](<vscale x 8 x s1>) 247 ; RV32-NEXT: PseudoRET implicit $v0 248 ; 249 ; RV64-LABEL: name: shufflevector_nxv8i1_1 250 ; RV64: bb.1 (%ir-block.0): 251 ; RV64-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 8 x s1>) = G_IMPLICIT_DEF 252 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 253 ; RV64-NEXT: [[EVEC:%[0-9]+]]:_(s1) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 8 x s1>), [[C]](s64) 254 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 8 x s1>) = G_SPLAT_VECTOR [[EVEC]](s1) 255 ; RV64-NEXT: $v0 = COPY [[SPLAT_VECTOR]](<vscale x 8 x s1>) 256 ; RV64-NEXT: PseudoRET implicit $v0 257 %a = shufflevector <vscale x 8 x i1> undef, <vscale x 8 x i1> undef, <vscale x 8 x i32> undef 258 ret <vscale x 8 x i1> %a 259} 260 261define <vscale x 8 x i1> @shufflevector_nxv8i1_2(<vscale x 8 x i1> %a) { 262 ; RV32-LABEL: name: shufflevector_nxv8i1_2 263 ; RV32: bb.1 (%ir-block.0): 264 ; RV32-NEXT: liveins: $v0 265 ; RV32-NEXT: {{ $}} 266 ; RV32-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 8 x s1>) = COPY $v0 267 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 268 ; RV32-NEXT: [[EVEC:%[0-9]+]]:_(s1) = G_EXTRACT_VECTOR_ELT [[COPY]](<vscale x 8 x s1>), [[C]](s32) 269 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 8 x s1>) = G_SPLAT_VECTOR [[EVEC]](s1) 270 ; RV32-NEXT: $v0 = COPY [[SPLAT_VECTOR]](<vscale x 8 x s1>) 271 ; RV32-NEXT: PseudoRET implicit $v0 272 ; 273 ; RV64-LABEL: name: shufflevector_nxv8i1_2 274 ; RV64: bb.1 (%ir-block.0): 275 ; RV64-NEXT: liveins: $v0 276 ; RV64-NEXT: {{ $}} 277 ; RV64-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 8 x s1>) = COPY $v0 278 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 279 ; RV64-NEXT: [[EVEC:%[0-9]+]]:_(s1) = G_EXTRACT_VECTOR_ELT [[COPY]](<vscale x 8 x s1>), [[C]](s64) 280 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 8 x s1>) = G_SPLAT_VECTOR [[EVEC]](s1) 281 ; RV64-NEXT: $v0 = COPY [[SPLAT_VECTOR]](<vscale x 8 x s1>) 282 ; RV64-NEXT: PseudoRET implicit $v0 283 %b = shufflevector <vscale x 8 x i1> %a , <vscale x 8 x i1> poison, <vscale x 8 x i32> zeroinitializer 284 ret <vscale x 8 x i1> %b 285} 286 287define <vscale x 16 x i1> @shufflevector_nxv16i1_0() { 288 ; RV32-LABEL: name: shufflevector_nxv16i1_0 289 ; RV32: bb.1 (%ir-block.0): 290 ; RV32-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 16 x s1>) = G_IMPLICIT_DEF 291 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 292 ; RV32-NEXT: [[EVEC:%[0-9]+]]:_(s1) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 16 x s1>), [[C]](s32) 293 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 16 x s1>) = G_SPLAT_VECTOR [[EVEC]](s1) 294 ; RV32-NEXT: $v0 = COPY [[SPLAT_VECTOR]](<vscale x 16 x s1>) 295 ; RV32-NEXT: PseudoRET implicit $v0 296 ; 297 ; RV64-LABEL: name: shufflevector_nxv16i1_0 298 ; RV64: bb.1 (%ir-block.0): 299 ; RV64-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 16 x s1>) = G_IMPLICIT_DEF 300 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 301 ; RV64-NEXT: [[EVEC:%[0-9]+]]:_(s1) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 16 x s1>), [[C]](s64) 302 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 16 x s1>) = G_SPLAT_VECTOR [[EVEC]](s1) 303 ; RV64-NEXT: $v0 = COPY [[SPLAT_VECTOR]](<vscale x 16 x s1>) 304 ; RV64-NEXT: PseudoRET implicit $v0 305 %a = shufflevector <vscale x 16 x i1> poison, <vscale x 16 x i1> poison, <vscale x 16 x i32> poison 306 ret <vscale x 16 x i1> %a 307} 308 309define <vscale x 16 x i1> @shufflevector_nxv16i1_1() { 310 ; RV32-LABEL: name: shufflevector_nxv16i1_1 311 ; RV32: bb.1 (%ir-block.0): 312 ; RV32-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 16 x s1>) = G_IMPLICIT_DEF 313 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 314 ; RV32-NEXT: [[EVEC:%[0-9]+]]:_(s1) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 16 x s1>), [[C]](s32) 315 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 16 x s1>) = G_SPLAT_VECTOR [[EVEC]](s1) 316 ; RV32-NEXT: $v0 = COPY [[SPLAT_VECTOR]](<vscale x 16 x s1>) 317 ; RV32-NEXT: PseudoRET implicit $v0 318 ; 319 ; RV64-LABEL: name: shufflevector_nxv16i1_1 320 ; RV64: bb.1 (%ir-block.0): 321 ; RV64-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 16 x s1>) = G_IMPLICIT_DEF 322 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 323 ; RV64-NEXT: [[EVEC:%[0-9]+]]:_(s1) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 16 x s1>), [[C]](s64) 324 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 16 x s1>) = G_SPLAT_VECTOR [[EVEC]](s1) 325 ; RV64-NEXT: $v0 = COPY [[SPLAT_VECTOR]](<vscale x 16 x s1>) 326 ; RV64-NEXT: PseudoRET implicit $v0 327 %a = shufflevector <vscale x 16 x i1> undef, <vscale x 16 x i1> undef, <vscale x 16 x i32> undef 328 ret <vscale x 16 x i1> %a 329} 330 331define <vscale x 16 x i1> @shufflevector_nxv16i1_2(<vscale x 16 x i1> %a) { 332 ; RV32-LABEL: name: shufflevector_nxv16i1_2 333 ; RV32: bb.1 (%ir-block.0): 334 ; RV32-NEXT: liveins: $v0 335 ; RV32-NEXT: {{ $}} 336 ; RV32-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 16 x s1>) = COPY $v0 337 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 338 ; RV32-NEXT: [[EVEC:%[0-9]+]]:_(s1) = G_EXTRACT_VECTOR_ELT [[COPY]](<vscale x 16 x s1>), [[C]](s32) 339 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 16 x s1>) = G_SPLAT_VECTOR [[EVEC]](s1) 340 ; RV32-NEXT: $v0 = COPY [[SPLAT_VECTOR]](<vscale x 16 x s1>) 341 ; RV32-NEXT: PseudoRET implicit $v0 342 ; 343 ; RV64-LABEL: name: shufflevector_nxv16i1_2 344 ; RV64: bb.1 (%ir-block.0): 345 ; RV64-NEXT: liveins: $v0 346 ; RV64-NEXT: {{ $}} 347 ; RV64-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 16 x s1>) = COPY $v0 348 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 349 ; RV64-NEXT: [[EVEC:%[0-9]+]]:_(s1) = G_EXTRACT_VECTOR_ELT [[COPY]](<vscale x 16 x s1>), [[C]](s64) 350 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 16 x s1>) = G_SPLAT_VECTOR [[EVEC]](s1) 351 ; RV64-NEXT: $v0 = COPY [[SPLAT_VECTOR]](<vscale x 16 x s1>) 352 ; RV64-NEXT: PseudoRET implicit $v0 353 %b = shufflevector <vscale x 16 x i1> %a , <vscale x 16 x i1> poison, <vscale x 16 x i32> zeroinitializer 354 ret <vscale x 16 x i1> %b 355} 356 357define <vscale x 1 x i8> @shufflevector_nxv1i8_0() { 358 ; RV32-LABEL: name: shufflevector_nxv1i8_0 359 ; RV32: bb.1 (%ir-block.0): 360 ; RV32-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 1 x s8>) = G_IMPLICIT_DEF 361 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 362 ; RV32-NEXT: [[EVEC:%[0-9]+]]:_(s8) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 1 x s8>), [[C]](s32) 363 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 1 x s8>) = G_SPLAT_VECTOR [[EVEC]](s8) 364 ; RV32-NEXT: $v8 = COPY [[SPLAT_VECTOR]](<vscale x 1 x s8>) 365 ; RV32-NEXT: PseudoRET implicit $v8 366 ; 367 ; RV64-LABEL: name: shufflevector_nxv1i8_0 368 ; RV64: bb.1 (%ir-block.0): 369 ; RV64-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 1 x s8>) = G_IMPLICIT_DEF 370 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 371 ; RV64-NEXT: [[EVEC:%[0-9]+]]:_(s8) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 1 x s8>), [[C]](s64) 372 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 1 x s8>) = G_SPLAT_VECTOR [[EVEC]](s8) 373 ; RV64-NEXT: $v8 = COPY [[SPLAT_VECTOR]](<vscale x 1 x s8>) 374 ; RV64-NEXT: PseudoRET implicit $v8 375 %a = shufflevector <vscale x 1 x i8> poison, <vscale x 1 x i8> poison, <vscale x 1 x i32> poison 376 ret <vscale x 1 x i8> %a 377} 378 379define <vscale x 1 x i8> @shufflevector_nxv1i8_1() { 380 ; RV32-LABEL: name: shufflevector_nxv1i8_1 381 ; RV32: bb.1 (%ir-block.0): 382 ; RV32-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 1 x s8>) = G_IMPLICIT_DEF 383 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 384 ; RV32-NEXT: [[EVEC:%[0-9]+]]:_(s8) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 1 x s8>), [[C]](s32) 385 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 1 x s8>) = G_SPLAT_VECTOR [[EVEC]](s8) 386 ; RV32-NEXT: $v8 = COPY [[SPLAT_VECTOR]](<vscale x 1 x s8>) 387 ; RV32-NEXT: PseudoRET implicit $v8 388 ; 389 ; RV64-LABEL: name: shufflevector_nxv1i8_1 390 ; RV64: bb.1 (%ir-block.0): 391 ; RV64-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 1 x s8>) = G_IMPLICIT_DEF 392 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 393 ; RV64-NEXT: [[EVEC:%[0-9]+]]:_(s8) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 1 x s8>), [[C]](s64) 394 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 1 x s8>) = G_SPLAT_VECTOR [[EVEC]](s8) 395 ; RV64-NEXT: $v8 = COPY [[SPLAT_VECTOR]](<vscale x 1 x s8>) 396 ; RV64-NEXT: PseudoRET implicit $v8 397 %a = shufflevector <vscale x 1 x i8> undef, <vscale x 1 x i8> undef, <vscale x 1 x i32> undef 398 ret <vscale x 1 x i8> %a 399} 400 401define <vscale x 1 x i8> @shufflevector_nxv1i8_2(<vscale x 1 x i8> %a) { 402 ; RV32-LABEL: name: shufflevector_nxv1i8_2 403 ; RV32: bb.1 (%ir-block.0): 404 ; RV32-NEXT: liveins: $v8 405 ; RV32-NEXT: {{ $}} 406 ; RV32-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 1 x s8>) = COPY $v8 407 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 408 ; RV32-NEXT: [[EVEC:%[0-9]+]]:_(s8) = G_EXTRACT_VECTOR_ELT [[COPY]](<vscale x 1 x s8>), [[C]](s32) 409 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 1 x s8>) = G_SPLAT_VECTOR [[EVEC]](s8) 410 ; RV32-NEXT: $v8 = COPY [[SPLAT_VECTOR]](<vscale x 1 x s8>) 411 ; RV32-NEXT: PseudoRET implicit $v8 412 ; 413 ; RV64-LABEL: name: shufflevector_nxv1i8_2 414 ; RV64: bb.1 (%ir-block.0): 415 ; RV64-NEXT: liveins: $v8 416 ; RV64-NEXT: {{ $}} 417 ; RV64-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 1 x s8>) = COPY $v8 418 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 419 ; RV64-NEXT: [[EVEC:%[0-9]+]]:_(s8) = G_EXTRACT_VECTOR_ELT [[COPY]](<vscale x 1 x s8>), [[C]](s64) 420 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 1 x s8>) = G_SPLAT_VECTOR [[EVEC]](s8) 421 ; RV64-NEXT: $v8 = COPY [[SPLAT_VECTOR]](<vscale x 1 x s8>) 422 ; RV64-NEXT: PseudoRET implicit $v8 423 %b = shufflevector <vscale x 1 x i8> %a , <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer 424 ret <vscale x 1 x i8> %b 425} 426 427define <vscale x 2 x i8> @shufflevector_nxv2i8_0() { 428 ; RV32-LABEL: name: shufflevector_nxv2i8_0 429 ; RV32: bb.1 (%ir-block.0): 430 ; RV32-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 2 x s8>) = G_IMPLICIT_DEF 431 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 432 ; RV32-NEXT: [[EVEC:%[0-9]+]]:_(s8) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 2 x s8>), [[C]](s32) 433 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 2 x s8>) = G_SPLAT_VECTOR [[EVEC]](s8) 434 ; RV32-NEXT: $v8 = COPY [[SPLAT_VECTOR]](<vscale x 2 x s8>) 435 ; RV32-NEXT: PseudoRET implicit $v8 436 ; 437 ; RV64-LABEL: name: shufflevector_nxv2i8_0 438 ; RV64: bb.1 (%ir-block.0): 439 ; RV64-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 2 x s8>) = G_IMPLICIT_DEF 440 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 441 ; RV64-NEXT: [[EVEC:%[0-9]+]]:_(s8) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 2 x s8>), [[C]](s64) 442 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 2 x s8>) = G_SPLAT_VECTOR [[EVEC]](s8) 443 ; RV64-NEXT: $v8 = COPY [[SPLAT_VECTOR]](<vscale x 2 x s8>) 444 ; RV64-NEXT: PseudoRET implicit $v8 445 %a = shufflevector <vscale x 2 x i8> poison, <vscale x 2 x i8> poison, <vscale x 2 x i32> poison 446 ret <vscale x 2 x i8> %a 447} 448 449define <vscale x 2 x i8> @shufflevector_nxv2i8_1() { 450 ; RV32-LABEL: name: shufflevector_nxv2i8_1 451 ; RV32: bb.1 (%ir-block.0): 452 ; RV32-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 2 x s8>) = G_IMPLICIT_DEF 453 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 454 ; RV32-NEXT: [[EVEC:%[0-9]+]]:_(s8) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 2 x s8>), [[C]](s32) 455 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 2 x s8>) = G_SPLAT_VECTOR [[EVEC]](s8) 456 ; RV32-NEXT: $v8 = COPY [[SPLAT_VECTOR]](<vscale x 2 x s8>) 457 ; RV32-NEXT: PseudoRET implicit $v8 458 ; 459 ; RV64-LABEL: name: shufflevector_nxv2i8_1 460 ; RV64: bb.1 (%ir-block.0): 461 ; RV64-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 2 x s8>) = G_IMPLICIT_DEF 462 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 463 ; RV64-NEXT: [[EVEC:%[0-9]+]]:_(s8) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 2 x s8>), [[C]](s64) 464 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 2 x s8>) = G_SPLAT_VECTOR [[EVEC]](s8) 465 ; RV64-NEXT: $v8 = COPY [[SPLAT_VECTOR]](<vscale x 2 x s8>) 466 ; RV64-NEXT: PseudoRET implicit $v8 467 %a = shufflevector <vscale x 2 x i8> undef, <vscale x 2 x i8> undef, <vscale x 2 x i32> undef 468 ret <vscale x 2 x i8> %a 469} 470 471define <vscale x 2 x i8> @shufflevector_nxv2i8_2(<vscale x 2 x i8> %a) { 472 ; RV32-LABEL: name: shufflevector_nxv2i8_2 473 ; RV32: bb.1 (%ir-block.0): 474 ; RV32-NEXT: liveins: $v8 475 ; RV32-NEXT: {{ $}} 476 ; RV32-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 2 x s8>) = COPY $v8 477 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 478 ; RV32-NEXT: [[EVEC:%[0-9]+]]:_(s8) = G_EXTRACT_VECTOR_ELT [[COPY]](<vscale x 2 x s8>), [[C]](s32) 479 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 2 x s8>) = G_SPLAT_VECTOR [[EVEC]](s8) 480 ; RV32-NEXT: $v8 = COPY [[SPLAT_VECTOR]](<vscale x 2 x s8>) 481 ; RV32-NEXT: PseudoRET implicit $v8 482 ; 483 ; RV64-LABEL: name: shufflevector_nxv2i8_2 484 ; RV64: bb.1 (%ir-block.0): 485 ; RV64-NEXT: liveins: $v8 486 ; RV64-NEXT: {{ $}} 487 ; RV64-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 2 x s8>) = COPY $v8 488 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 489 ; RV64-NEXT: [[EVEC:%[0-9]+]]:_(s8) = G_EXTRACT_VECTOR_ELT [[COPY]](<vscale x 2 x s8>), [[C]](s64) 490 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 2 x s8>) = G_SPLAT_VECTOR [[EVEC]](s8) 491 ; RV64-NEXT: $v8 = COPY [[SPLAT_VECTOR]](<vscale x 2 x s8>) 492 ; RV64-NEXT: PseudoRET implicit $v8 493 %b = shufflevector <vscale x 2 x i8> %a , <vscale x 2 x i8> poison, <vscale x 2 x i32> zeroinitializer 494 ret <vscale x 2 x i8> %b 495} 496 497define <vscale x 4 x i8> @shufflevector_nxv4i8_0() { 498 ; RV32-LABEL: name: shufflevector_nxv4i8_0 499 ; RV32: bb.1 (%ir-block.0): 500 ; RV32-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 4 x s8>) = G_IMPLICIT_DEF 501 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 502 ; RV32-NEXT: [[EVEC:%[0-9]+]]:_(s8) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 4 x s8>), [[C]](s32) 503 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 4 x s8>) = G_SPLAT_VECTOR [[EVEC]](s8) 504 ; RV32-NEXT: $v8 = COPY [[SPLAT_VECTOR]](<vscale x 4 x s8>) 505 ; RV32-NEXT: PseudoRET implicit $v8 506 ; 507 ; RV64-LABEL: name: shufflevector_nxv4i8_0 508 ; RV64: bb.1 (%ir-block.0): 509 ; RV64-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 4 x s8>) = G_IMPLICIT_DEF 510 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 511 ; RV64-NEXT: [[EVEC:%[0-9]+]]:_(s8) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 4 x s8>), [[C]](s64) 512 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 4 x s8>) = G_SPLAT_VECTOR [[EVEC]](s8) 513 ; RV64-NEXT: $v8 = COPY [[SPLAT_VECTOR]](<vscale x 4 x s8>) 514 ; RV64-NEXT: PseudoRET implicit $v8 515 %a = shufflevector <vscale x 4 x i8> poison, <vscale x 4 x i8> poison, <vscale x 4 x i32> poison 516 ret <vscale x 4 x i8> %a 517} 518 519define <vscale x 4 x i8> @shufflevector_nxv4i8_1() { 520 ; RV32-LABEL: name: shufflevector_nxv4i8_1 521 ; RV32: bb.1 (%ir-block.0): 522 ; RV32-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 4 x s8>) = G_IMPLICIT_DEF 523 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 524 ; RV32-NEXT: [[EVEC:%[0-9]+]]:_(s8) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 4 x s8>), [[C]](s32) 525 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 4 x s8>) = G_SPLAT_VECTOR [[EVEC]](s8) 526 ; RV32-NEXT: $v8 = COPY [[SPLAT_VECTOR]](<vscale x 4 x s8>) 527 ; RV32-NEXT: PseudoRET implicit $v8 528 ; 529 ; RV64-LABEL: name: shufflevector_nxv4i8_1 530 ; RV64: bb.1 (%ir-block.0): 531 ; RV64-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 4 x s8>) = G_IMPLICIT_DEF 532 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 533 ; RV64-NEXT: [[EVEC:%[0-9]+]]:_(s8) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 4 x s8>), [[C]](s64) 534 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 4 x s8>) = G_SPLAT_VECTOR [[EVEC]](s8) 535 ; RV64-NEXT: $v8 = COPY [[SPLAT_VECTOR]](<vscale x 4 x s8>) 536 ; RV64-NEXT: PseudoRET implicit $v8 537 %a = shufflevector <vscale x 4 x i8> undef, <vscale x 4 x i8> undef, <vscale x 4 x i32> undef 538 ret <vscale x 4 x i8> %a 539} 540 541define <vscale x 4 x i8> @shufflevector_nxv4i8_2(<vscale x 4 x i8> %a) { 542 ; RV32-LABEL: name: shufflevector_nxv4i8_2 543 ; RV32: bb.1 (%ir-block.0): 544 ; RV32-NEXT: liveins: $v8 545 ; RV32-NEXT: {{ $}} 546 ; RV32-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 4 x s8>) = COPY $v8 547 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 548 ; RV32-NEXT: [[EVEC:%[0-9]+]]:_(s8) = G_EXTRACT_VECTOR_ELT [[COPY]](<vscale x 4 x s8>), [[C]](s32) 549 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 4 x s8>) = G_SPLAT_VECTOR [[EVEC]](s8) 550 ; RV32-NEXT: $v8 = COPY [[SPLAT_VECTOR]](<vscale x 4 x s8>) 551 ; RV32-NEXT: PseudoRET implicit $v8 552 ; 553 ; RV64-LABEL: name: shufflevector_nxv4i8_2 554 ; RV64: bb.1 (%ir-block.0): 555 ; RV64-NEXT: liveins: $v8 556 ; RV64-NEXT: {{ $}} 557 ; RV64-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 4 x s8>) = COPY $v8 558 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 559 ; RV64-NEXT: [[EVEC:%[0-9]+]]:_(s8) = G_EXTRACT_VECTOR_ELT [[COPY]](<vscale x 4 x s8>), [[C]](s64) 560 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 4 x s8>) = G_SPLAT_VECTOR [[EVEC]](s8) 561 ; RV64-NEXT: $v8 = COPY [[SPLAT_VECTOR]](<vscale x 4 x s8>) 562 ; RV64-NEXT: PseudoRET implicit $v8 563 %b = shufflevector <vscale x 4 x i8> %a , <vscale x 4 x i8> poison, <vscale x 4 x i32> zeroinitializer 564 ret <vscale x 4 x i8> %b 565} 566 567define <vscale x 8 x i8> @shufflevector_nxv8i8_0() { 568 ; RV32-LABEL: name: shufflevector_nxv8i8_0 569 ; RV32: bb.1 (%ir-block.0): 570 ; RV32-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 8 x s8>) = G_IMPLICIT_DEF 571 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 572 ; RV32-NEXT: [[EVEC:%[0-9]+]]:_(s8) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 8 x s8>), [[C]](s32) 573 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 8 x s8>) = G_SPLAT_VECTOR [[EVEC]](s8) 574 ; RV32-NEXT: $v8 = COPY [[SPLAT_VECTOR]](<vscale x 8 x s8>) 575 ; RV32-NEXT: PseudoRET implicit $v8 576 ; 577 ; RV64-LABEL: name: shufflevector_nxv8i8_0 578 ; RV64: bb.1 (%ir-block.0): 579 ; RV64-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 8 x s8>) = G_IMPLICIT_DEF 580 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 581 ; RV64-NEXT: [[EVEC:%[0-9]+]]:_(s8) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 8 x s8>), [[C]](s64) 582 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 8 x s8>) = G_SPLAT_VECTOR [[EVEC]](s8) 583 ; RV64-NEXT: $v8 = COPY [[SPLAT_VECTOR]](<vscale x 8 x s8>) 584 ; RV64-NEXT: PseudoRET implicit $v8 585 %a = shufflevector <vscale x 8 x i8> poison, <vscale x 8 x i8> poison, <vscale x 8 x i32> poison 586 ret <vscale x 8 x i8> %a 587} 588 589define <vscale x 8 x i8> @shufflevector_nxv8i8_1() { 590 ; RV32-LABEL: name: shufflevector_nxv8i8_1 591 ; RV32: bb.1 (%ir-block.0): 592 ; RV32-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 8 x s8>) = G_IMPLICIT_DEF 593 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 594 ; RV32-NEXT: [[EVEC:%[0-9]+]]:_(s8) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 8 x s8>), [[C]](s32) 595 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 8 x s8>) = G_SPLAT_VECTOR [[EVEC]](s8) 596 ; RV32-NEXT: $v8 = COPY [[SPLAT_VECTOR]](<vscale x 8 x s8>) 597 ; RV32-NEXT: PseudoRET implicit $v8 598 ; 599 ; RV64-LABEL: name: shufflevector_nxv8i8_1 600 ; RV64: bb.1 (%ir-block.0): 601 ; RV64-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 8 x s8>) = G_IMPLICIT_DEF 602 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 603 ; RV64-NEXT: [[EVEC:%[0-9]+]]:_(s8) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 8 x s8>), [[C]](s64) 604 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 8 x s8>) = G_SPLAT_VECTOR [[EVEC]](s8) 605 ; RV64-NEXT: $v8 = COPY [[SPLAT_VECTOR]](<vscale x 8 x s8>) 606 ; RV64-NEXT: PseudoRET implicit $v8 607 %a = shufflevector <vscale x 8 x i8> undef, <vscale x 8 x i8> undef, <vscale x 8 x i32> undef 608 ret <vscale x 8 x i8> %a 609} 610 611define <vscale x 8 x i8> @shufflevector_nxv8i8_2(<vscale x 8 x i8> %a) { 612 ; RV32-LABEL: name: shufflevector_nxv8i8_2 613 ; RV32: bb.1 (%ir-block.0): 614 ; RV32-NEXT: liveins: $v8 615 ; RV32-NEXT: {{ $}} 616 ; RV32-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 8 x s8>) = COPY $v8 617 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 618 ; RV32-NEXT: [[EVEC:%[0-9]+]]:_(s8) = G_EXTRACT_VECTOR_ELT [[COPY]](<vscale x 8 x s8>), [[C]](s32) 619 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 8 x s8>) = G_SPLAT_VECTOR [[EVEC]](s8) 620 ; RV32-NEXT: $v8 = COPY [[SPLAT_VECTOR]](<vscale x 8 x s8>) 621 ; RV32-NEXT: PseudoRET implicit $v8 622 ; 623 ; RV64-LABEL: name: shufflevector_nxv8i8_2 624 ; RV64: bb.1 (%ir-block.0): 625 ; RV64-NEXT: liveins: $v8 626 ; RV64-NEXT: {{ $}} 627 ; RV64-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 8 x s8>) = COPY $v8 628 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 629 ; RV64-NEXT: [[EVEC:%[0-9]+]]:_(s8) = G_EXTRACT_VECTOR_ELT [[COPY]](<vscale x 8 x s8>), [[C]](s64) 630 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 8 x s8>) = G_SPLAT_VECTOR [[EVEC]](s8) 631 ; RV64-NEXT: $v8 = COPY [[SPLAT_VECTOR]](<vscale x 8 x s8>) 632 ; RV64-NEXT: PseudoRET implicit $v8 633 %b = shufflevector <vscale x 8 x i8> %a , <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer 634 ret <vscale x 8 x i8> %b 635} 636 637define <vscale x 16 x i8> @shufflevector_nxv16i8_0() { 638 ; RV32-LABEL: name: shufflevector_nxv16i8_0 639 ; RV32: bb.1 (%ir-block.0): 640 ; RV32-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 16 x s8>) = G_IMPLICIT_DEF 641 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 642 ; RV32-NEXT: [[EVEC:%[0-9]+]]:_(s8) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 16 x s8>), [[C]](s32) 643 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 16 x s8>) = G_SPLAT_VECTOR [[EVEC]](s8) 644 ; RV32-NEXT: $v8m2 = COPY [[SPLAT_VECTOR]](<vscale x 16 x s8>) 645 ; RV32-NEXT: PseudoRET implicit $v8m2 646 ; 647 ; RV64-LABEL: name: shufflevector_nxv16i8_0 648 ; RV64: bb.1 (%ir-block.0): 649 ; RV64-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 16 x s8>) = G_IMPLICIT_DEF 650 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 651 ; RV64-NEXT: [[EVEC:%[0-9]+]]:_(s8) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 16 x s8>), [[C]](s64) 652 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 16 x s8>) = G_SPLAT_VECTOR [[EVEC]](s8) 653 ; RV64-NEXT: $v8m2 = COPY [[SPLAT_VECTOR]](<vscale x 16 x s8>) 654 ; RV64-NEXT: PseudoRET implicit $v8m2 655 %a = shufflevector <vscale x 16 x i8> poison, <vscale x 16 x i8> poison, <vscale x 16 x i32> poison 656 ret <vscale x 16 x i8> %a 657} 658 659define <vscale x 16 x i8> @shufflevector_nxv16i8_1() { 660 ; RV32-LABEL: name: shufflevector_nxv16i8_1 661 ; RV32: bb.1 (%ir-block.0): 662 ; RV32-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 16 x s8>) = G_IMPLICIT_DEF 663 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 664 ; RV32-NEXT: [[EVEC:%[0-9]+]]:_(s8) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 16 x s8>), [[C]](s32) 665 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 16 x s8>) = G_SPLAT_VECTOR [[EVEC]](s8) 666 ; RV32-NEXT: $v8m2 = COPY [[SPLAT_VECTOR]](<vscale x 16 x s8>) 667 ; RV32-NEXT: PseudoRET implicit $v8m2 668 ; 669 ; RV64-LABEL: name: shufflevector_nxv16i8_1 670 ; RV64: bb.1 (%ir-block.0): 671 ; RV64-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 16 x s8>) = G_IMPLICIT_DEF 672 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 673 ; RV64-NEXT: [[EVEC:%[0-9]+]]:_(s8) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 16 x s8>), [[C]](s64) 674 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 16 x s8>) = G_SPLAT_VECTOR [[EVEC]](s8) 675 ; RV64-NEXT: $v8m2 = COPY [[SPLAT_VECTOR]](<vscale x 16 x s8>) 676 ; RV64-NEXT: PseudoRET implicit $v8m2 677 %a = shufflevector <vscale x 16 x i8> undef, <vscale x 16 x i8> undef, <vscale x 16 x i32> undef 678 ret <vscale x 16 x i8> %a 679} 680 681define <vscale x 16 x i8> @shufflevector_nxv16i8_2(<vscale x 16 x i8> %a) { 682 ; RV32-LABEL: name: shufflevector_nxv16i8_2 683 ; RV32: bb.1 (%ir-block.0): 684 ; RV32-NEXT: liveins: $v8m2 685 ; RV32-NEXT: {{ $}} 686 ; RV32-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 16 x s8>) = COPY $v8m2 687 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 688 ; RV32-NEXT: [[EVEC:%[0-9]+]]:_(s8) = G_EXTRACT_VECTOR_ELT [[COPY]](<vscale x 16 x s8>), [[C]](s32) 689 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 16 x s8>) = G_SPLAT_VECTOR [[EVEC]](s8) 690 ; RV32-NEXT: $v8m2 = COPY [[SPLAT_VECTOR]](<vscale x 16 x s8>) 691 ; RV32-NEXT: PseudoRET implicit $v8m2 692 ; 693 ; RV64-LABEL: name: shufflevector_nxv16i8_2 694 ; RV64: bb.1 (%ir-block.0): 695 ; RV64-NEXT: liveins: $v8m2 696 ; RV64-NEXT: {{ $}} 697 ; RV64-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 16 x s8>) = COPY $v8m2 698 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 699 ; RV64-NEXT: [[EVEC:%[0-9]+]]:_(s8) = G_EXTRACT_VECTOR_ELT [[COPY]](<vscale x 16 x s8>), [[C]](s64) 700 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 16 x s8>) = G_SPLAT_VECTOR [[EVEC]](s8) 701 ; RV64-NEXT: $v8m2 = COPY [[SPLAT_VECTOR]](<vscale x 16 x s8>) 702 ; RV64-NEXT: PseudoRET implicit $v8m2 703 %b = shufflevector <vscale x 16 x i8> %a , <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer 704 ret <vscale x 16 x i8> %b 705} 706 707define <vscale x 1 x i16> @shufflevector_nxv1i16_0() { 708 ; RV32-LABEL: name: shufflevector_nxv1i16_0 709 ; RV32: bb.1 (%ir-block.0): 710 ; RV32-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 1 x s16>) = G_IMPLICIT_DEF 711 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 712 ; RV32-NEXT: [[EVEC:%[0-9]+]]:_(s16) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 1 x s16>), [[C]](s32) 713 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 1 x s16>) = G_SPLAT_VECTOR [[EVEC]](s16) 714 ; RV32-NEXT: $v8 = COPY [[SPLAT_VECTOR]](<vscale x 1 x s16>) 715 ; RV32-NEXT: PseudoRET implicit $v8 716 ; 717 ; RV64-LABEL: name: shufflevector_nxv1i16_0 718 ; RV64: bb.1 (%ir-block.0): 719 ; RV64-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 1 x s16>) = G_IMPLICIT_DEF 720 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 721 ; RV64-NEXT: [[EVEC:%[0-9]+]]:_(s16) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 1 x s16>), [[C]](s64) 722 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 1 x s16>) = G_SPLAT_VECTOR [[EVEC]](s16) 723 ; RV64-NEXT: $v8 = COPY [[SPLAT_VECTOR]](<vscale x 1 x s16>) 724 ; RV64-NEXT: PseudoRET implicit $v8 725 %a = shufflevector <vscale x 1 x i16> poison, <vscale x 1 x i16> poison, <vscale x 1 x i32> poison 726 ret <vscale x 1 x i16> %a 727} 728 729define <vscale x 1 x i16> @shufflevector_nxv1i16_1() { 730 ; RV32-LABEL: name: shufflevector_nxv1i16_1 731 ; RV32: bb.1 (%ir-block.0): 732 ; RV32-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 1 x s16>) = G_IMPLICIT_DEF 733 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 734 ; RV32-NEXT: [[EVEC:%[0-9]+]]:_(s16) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 1 x s16>), [[C]](s32) 735 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 1 x s16>) = G_SPLAT_VECTOR [[EVEC]](s16) 736 ; RV32-NEXT: $v8 = COPY [[SPLAT_VECTOR]](<vscale x 1 x s16>) 737 ; RV32-NEXT: PseudoRET implicit $v8 738 ; 739 ; RV64-LABEL: name: shufflevector_nxv1i16_1 740 ; RV64: bb.1 (%ir-block.0): 741 ; RV64-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 1 x s16>) = G_IMPLICIT_DEF 742 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 743 ; RV64-NEXT: [[EVEC:%[0-9]+]]:_(s16) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 1 x s16>), [[C]](s64) 744 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 1 x s16>) = G_SPLAT_VECTOR [[EVEC]](s16) 745 ; RV64-NEXT: $v8 = COPY [[SPLAT_VECTOR]](<vscale x 1 x s16>) 746 ; RV64-NEXT: PseudoRET implicit $v8 747 %a = shufflevector <vscale x 1 x i16> undef, <vscale x 1 x i16> undef, <vscale x 1 x i32> undef 748 ret <vscale x 1 x i16> %a 749} 750 751define <vscale x 1 x i16> @shufflevector_nxv1i16_2(<vscale x 1 x i16> %a) { 752 ; RV32-LABEL: name: shufflevector_nxv1i16_2 753 ; RV32: bb.1 (%ir-block.0): 754 ; RV32-NEXT: liveins: $v8 755 ; RV32-NEXT: {{ $}} 756 ; RV32-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 1 x s16>) = COPY $v8 757 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 758 ; RV32-NEXT: [[EVEC:%[0-9]+]]:_(s16) = G_EXTRACT_VECTOR_ELT [[COPY]](<vscale x 1 x s16>), [[C]](s32) 759 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 1 x s16>) = G_SPLAT_VECTOR [[EVEC]](s16) 760 ; RV32-NEXT: $v8 = COPY [[SPLAT_VECTOR]](<vscale x 1 x s16>) 761 ; RV32-NEXT: PseudoRET implicit $v8 762 ; 763 ; RV64-LABEL: name: shufflevector_nxv1i16_2 764 ; RV64: bb.1 (%ir-block.0): 765 ; RV64-NEXT: liveins: $v8 766 ; RV64-NEXT: {{ $}} 767 ; RV64-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 1 x s16>) = COPY $v8 768 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 769 ; RV64-NEXT: [[EVEC:%[0-9]+]]:_(s16) = G_EXTRACT_VECTOR_ELT [[COPY]](<vscale x 1 x s16>), [[C]](s64) 770 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 1 x s16>) = G_SPLAT_VECTOR [[EVEC]](s16) 771 ; RV64-NEXT: $v8 = COPY [[SPLAT_VECTOR]](<vscale x 1 x s16>) 772 ; RV64-NEXT: PseudoRET implicit $v8 773 %b = shufflevector <vscale x 1 x i16> %a , <vscale x 1 x i16> poison, <vscale x 1 x i32> zeroinitializer 774 ret <vscale x 1 x i16> %b 775} 776 777define <vscale x 2 x i16> @shufflevector_nxv2i16_0() { 778 ; RV32-LABEL: name: shufflevector_nxv2i16_0 779 ; RV32: bb.1 (%ir-block.0): 780 ; RV32-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 2 x s16>) = G_IMPLICIT_DEF 781 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 782 ; RV32-NEXT: [[EVEC:%[0-9]+]]:_(s16) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 2 x s16>), [[C]](s32) 783 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 2 x s16>) = G_SPLAT_VECTOR [[EVEC]](s16) 784 ; RV32-NEXT: $v8 = COPY [[SPLAT_VECTOR]](<vscale x 2 x s16>) 785 ; RV32-NEXT: PseudoRET implicit $v8 786 ; 787 ; RV64-LABEL: name: shufflevector_nxv2i16_0 788 ; RV64: bb.1 (%ir-block.0): 789 ; RV64-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 2 x s16>) = G_IMPLICIT_DEF 790 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 791 ; RV64-NEXT: [[EVEC:%[0-9]+]]:_(s16) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 2 x s16>), [[C]](s64) 792 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 2 x s16>) = G_SPLAT_VECTOR [[EVEC]](s16) 793 ; RV64-NEXT: $v8 = COPY [[SPLAT_VECTOR]](<vscale x 2 x s16>) 794 ; RV64-NEXT: PseudoRET implicit $v8 795 %a = shufflevector <vscale x 2 x i16> poison, <vscale x 2 x i16> poison, <vscale x 2 x i32> poison 796 ret <vscale x 2 x i16> %a 797} 798 799define <vscale x 2 x i16> @shufflevector_nxv2i16_1() { 800 ; RV32-LABEL: name: shufflevector_nxv2i16_1 801 ; RV32: bb.1 (%ir-block.0): 802 ; RV32-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 2 x s16>) = G_IMPLICIT_DEF 803 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 804 ; RV32-NEXT: [[EVEC:%[0-9]+]]:_(s16) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 2 x s16>), [[C]](s32) 805 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 2 x s16>) = G_SPLAT_VECTOR [[EVEC]](s16) 806 ; RV32-NEXT: $v8 = COPY [[SPLAT_VECTOR]](<vscale x 2 x s16>) 807 ; RV32-NEXT: PseudoRET implicit $v8 808 ; 809 ; RV64-LABEL: name: shufflevector_nxv2i16_1 810 ; RV64: bb.1 (%ir-block.0): 811 ; RV64-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 2 x s16>) = G_IMPLICIT_DEF 812 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 813 ; RV64-NEXT: [[EVEC:%[0-9]+]]:_(s16) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 2 x s16>), [[C]](s64) 814 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 2 x s16>) = G_SPLAT_VECTOR [[EVEC]](s16) 815 ; RV64-NEXT: $v8 = COPY [[SPLAT_VECTOR]](<vscale x 2 x s16>) 816 ; RV64-NEXT: PseudoRET implicit $v8 817 %a = shufflevector <vscale x 2 x i16> undef, <vscale x 2 x i16> undef, <vscale x 2 x i32> undef 818 ret <vscale x 2 x i16> %a 819} 820 821define <vscale x 2 x i16> @shufflevector_nxv2i16_2(<vscale x 2 x i16> %a) { 822 ; RV32-LABEL: name: shufflevector_nxv2i16_2 823 ; RV32: bb.1 (%ir-block.0): 824 ; RV32-NEXT: liveins: $v8 825 ; RV32-NEXT: {{ $}} 826 ; RV32-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 2 x s16>) = COPY $v8 827 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 828 ; RV32-NEXT: [[EVEC:%[0-9]+]]:_(s16) = G_EXTRACT_VECTOR_ELT [[COPY]](<vscale x 2 x s16>), [[C]](s32) 829 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 2 x s16>) = G_SPLAT_VECTOR [[EVEC]](s16) 830 ; RV32-NEXT: $v8 = COPY [[SPLAT_VECTOR]](<vscale x 2 x s16>) 831 ; RV32-NEXT: PseudoRET implicit $v8 832 ; 833 ; RV64-LABEL: name: shufflevector_nxv2i16_2 834 ; RV64: bb.1 (%ir-block.0): 835 ; RV64-NEXT: liveins: $v8 836 ; RV64-NEXT: {{ $}} 837 ; RV64-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 2 x s16>) = COPY $v8 838 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 839 ; RV64-NEXT: [[EVEC:%[0-9]+]]:_(s16) = G_EXTRACT_VECTOR_ELT [[COPY]](<vscale x 2 x s16>), [[C]](s64) 840 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 2 x s16>) = G_SPLAT_VECTOR [[EVEC]](s16) 841 ; RV64-NEXT: $v8 = COPY [[SPLAT_VECTOR]](<vscale x 2 x s16>) 842 ; RV64-NEXT: PseudoRET implicit $v8 843 %b = shufflevector <vscale x 2 x i16> %a , <vscale x 2 x i16> poison, <vscale x 2 x i32> zeroinitializer 844 ret <vscale x 2 x i16> %b 845} 846 847define <vscale x 4 x i16> @shufflevector_nxv4i16_0() { 848 ; RV32-LABEL: name: shufflevector_nxv4i16_0 849 ; RV32: bb.1 (%ir-block.0): 850 ; RV32-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 4 x s16>) = G_IMPLICIT_DEF 851 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 852 ; RV32-NEXT: [[EVEC:%[0-9]+]]:_(s16) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 4 x s16>), [[C]](s32) 853 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 4 x s16>) = G_SPLAT_VECTOR [[EVEC]](s16) 854 ; RV32-NEXT: $v8 = COPY [[SPLAT_VECTOR]](<vscale x 4 x s16>) 855 ; RV32-NEXT: PseudoRET implicit $v8 856 ; 857 ; RV64-LABEL: name: shufflevector_nxv4i16_0 858 ; RV64: bb.1 (%ir-block.0): 859 ; RV64-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 4 x s16>) = G_IMPLICIT_DEF 860 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 861 ; RV64-NEXT: [[EVEC:%[0-9]+]]:_(s16) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 4 x s16>), [[C]](s64) 862 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 4 x s16>) = G_SPLAT_VECTOR [[EVEC]](s16) 863 ; RV64-NEXT: $v8 = COPY [[SPLAT_VECTOR]](<vscale x 4 x s16>) 864 ; RV64-NEXT: PseudoRET implicit $v8 865 %a = shufflevector <vscale x 4 x i16> poison, <vscale x 4 x i16> poison, <vscale x 4 x i32> poison 866 ret <vscale x 4 x i16> %a 867} 868 869define <vscale x 4 x i16> @shufflevector_nxv4i16_1() { 870 ; RV32-LABEL: name: shufflevector_nxv4i16_1 871 ; RV32: bb.1 (%ir-block.0): 872 ; RV32-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 4 x s16>) = G_IMPLICIT_DEF 873 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 874 ; RV32-NEXT: [[EVEC:%[0-9]+]]:_(s16) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 4 x s16>), [[C]](s32) 875 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 4 x s16>) = G_SPLAT_VECTOR [[EVEC]](s16) 876 ; RV32-NEXT: $v8 = COPY [[SPLAT_VECTOR]](<vscale x 4 x s16>) 877 ; RV32-NEXT: PseudoRET implicit $v8 878 ; 879 ; RV64-LABEL: name: shufflevector_nxv4i16_1 880 ; RV64: bb.1 (%ir-block.0): 881 ; RV64-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 4 x s16>) = G_IMPLICIT_DEF 882 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 883 ; RV64-NEXT: [[EVEC:%[0-9]+]]:_(s16) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 4 x s16>), [[C]](s64) 884 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 4 x s16>) = G_SPLAT_VECTOR [[EVEC]](s16) 885 ; RV64-NEXT: $v8 = COPY [[SPLAT_VECTOR]](<vscale x 4 x s16>) 886 ; RV64-NEXT: PseudoRET implicit $v8 887 %a = shufflevector <vscale x 4 x i16> undef, <vscale x 4 x i16> undef, <vscale x 4 x i32> undef 888 ret <vscale x 4 x i16> %a 889} 890 891define <vscale x 4 x i16> @shufflevector_nxv4i16_2(<vscale x 4 x i16> %a) { 892 ; RV32-LABEL: name: shufflevector_nxv4i16_2 893 ; RV32: bb.1 (%ir-block.0): 894 ; RV32-NEXT: liveins: $v8 895 ; RV32-NEXT: {{ $}} 896 ; RV32-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 4 x s16>) = COPY $v8 897 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 898 ; RV32-NEXT: [[EVEC:%[0-9]+]]:_(s16) = G_EXTRACT_VECTOR_ELT [[COPY]](<vscale x 4 x s16>), [[C]](s32) 899 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 4 x s16>) = G_SPLAT_VECTOR [[EVEC]](s16) 900 ; RV32-NEXT: $v8 = COPY [[SPLAT_VECTOR]](<vscale x 4 x s16>) 901 ; RV32-NEXT: PseudoRET implicit $v8 902 ; 903 ; RV64-LABEL: name: shufflevector_nxv4i16_2 904 ; RV64: bb.1 (%ir-block.0): 905 ; RV64-NEXT: liveins: $v8 906 ; RV64-NEXT: {{ $}} 907 ; RV64-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 4 x s16>) = COPY $v8 908 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 909 ; RV64-NEXT: [[EVEC:%[0-9]+]]:_(s16) = G_EXTRACT_VECTOR_ELT [[COPY]](<vscale x 4 x s16>), [[C]](s64) 910 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 4 x s16>) = G_SPLAT_VECTOR [[EVEC]](s16) 911 ; RV64-NEXT: $v8 = COPY [[SPLAT_VECTOR]](<vscale x 4 x s16>) 912 ; RV64-NEXT: PseudoRET implicit $v8 913 %b = shufflevector <vscale x 4 x i16> %a , <vscale x 4 x i16> poison, <vscale x 4 x i32> zeroinitializer 914 ret <vscale x 4 x i16> %b 915} 916 917define <vscale x 8 x i16> @shufflevector_nxv8i16_0() { 918 ; RV32-LABEL: name: shufflevector_nxv8i16_0 919 ; RV32: bb.1 (%ir-block.0): 920 ; RV32-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 8 x s16>) = G_IMPLICIT_DEF 921 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 922 ; RV32-NEXT: [[EVEC:%[0-9]+]]:_(s16) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 8 x s16>), [[C]](s32) 923 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 8 x s16>) = G_SPLAT_VECTOR [[EVEC]](s16) 924 ; RV32-NEXT: $v8m2 = COPY [[SPLAT_VECTOR]](<vscale x 8 x s16>) 925 ; RV32-NEXT: PseudoRET implicit $v8m2 926 ; 927 ; RV64-LABEL: name: shufflevector_nxv8i16_0 928 ; RV64: bb.1 (%ir-block.0): 929 ; RV64-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 8 x s16>) = G_IMPLICIT_DEF 930 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 931 ; RV64-NEXT: [[EVEC:%[0-9]+]]:_(s16) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 8 x s16>), [[C]](s64) 932 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 8 x s16>) = G_SPLAT_VECTOR [[EVEC]](s16) 933 ; RV64-NEXT: $v8m2 = COPY [[SPLAT_VECTOR]](<vscale x 8 x s16>) 934 ; RV64-NEXT: PseudoRET implicit $v8m2 935 %a = shufflevector <vscale x 8 x i16> poison, <vscale x 8 x i16> poison, <vscale x 8 x i32> poison 936 ret <vscale x 8 x i16> %a 937} 938 939define <vscale x 8 x i16> @shufflevector_nxv8i16_1() { 940 ; RV32-LABEL: name: shufflevector_nxv8i16_1 941 ; RV32: bb.1 (%ir-block.0): 942 ; RV32-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 8 x s16>) = G_IMPLICIT_DEF 943 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 944 ; RV32-NEXT: [[EVEC:%[0-9]+]]:_(s16) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 8 x s16>), [[C]](s32) 945 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 8 x s16>) = G_SPLAT_VECTOR [[EVEC]](s16) 946 ; RV32-NEXT: $v8m2 = COPY [[SPLAT_VECTOR]](<vscale x 8 x s16>) 947 ; RV32-NEXT: PseudoRET implicit $v8m2 948 ; 949 ; RV64-LABEL: name: shufflevector_nxv8i16_1 950 ; RV64: bb.1 (%ir-block.0): 951 ; RV64-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 8 x s16>) = G_IMPLICIT_DEF 952 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 953 ; RV64-NEXT: [[EVEC:%[0-9]+]]:_(s16) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 8 x s16>), [[C]](s64) 954 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 8 x s16>) = G_SPLAT_VECTOR [[EVEC]](s16) 955 ; RV64-NEXT: $v8m2 = COPY [[SPLAT_VECTOR]](<vscale x 8 x s16>) 956 ; RV64-NEXT: PseudoRET implicit $v8m2 957 %a = shufflevector <vscale x 8 x i16> undef, <vscale x 8 x i16> undef, <vscale x 8 x i32> undef 958 ret <vscale x 8 x i16> %a 959} 960 961define <vscale x 8 x i16> @shufflevector_nxv8i16_2(<vscale x 8 x i16> %a) { 962 ; RV32-LABEL: name: shufflevector_nxv8i16_2 963 ; RV32: bb.1 (%ir-block.0): 964 ; RV32-NEXT: liveins: $v8m2 965 ; RV32-NEXT: {{ $}} 966 ; RV32-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 8 x s16>) = COPY $v8m2 967 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 968 ; RV32-NEXT: [[EVEC:%[0-9]+]]:_(s16) = G_EXTRACT_VECTOR_ELT [[COPY]](<vscale x 8 x s16>), [[C]](s32) 969 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 8 x s16>) = G_SPLAT_VECTOR [[EVEC]](s16) 970 ; RV32-NEXT: $v8m2 = COPY [[SPLAT_VECTOR]](<vscale x 8 x s16>) 971 ; RV32-NEXT: PseudoRET implicit $v8m2 972 ; 973 ; RV64-LABEL: name: shufflevector_nxv8i16_2 974 ; RV64: bb.1 (%ir-block.0): 975 ; RV64-NEXT: liveins: $v8m2 976 ; RV64-NEXT: {{ $}} 977 ; RV64-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 8 x s16>) = COPY $v8m2 978 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 979 ; RV64-NEXT: [[EVEC:%[0-9]+]]:_(s16) = G_EXTRACT_VECTOR_ELT [[COPY]](<vscale x 8 x s16>), [[C]](s64) 980 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 8 x s16>) = G_SPLAT_VECTOR [[EVEC]](s16) 981 ; RV64-NEXT: $v8m2 = COPY [[SPLAT_VECTOR]](<vscale x 8 x s16>) 982 ; RV64-NEXT: PseudoRET implicit $v8m2 983 %b = shufflevector <vscale x 8 x i16> %a , <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer 984 ret <vscale x 8 x i16> %b 985} 986 987define <vscale x 16 x i16> @shufflevector_nxv16i16_0() { 988 ; RV32-LABEL: name: shufflevector_nxv16i16_0 989 ; RV32: bb.1 (%ir-block.0): 990 ; RV32-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 16 x s16>) = G_IMPLICIT_DEF 991 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 992 ; RV32-NEXT: [[EVEC:%[0-9]+]]:_(s16) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 16 x s16>), [[C]](s32) 993 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 16 x s16>) = G_SPLAT_VECTOR [[EVEC]](s16) 994 ; RV32-NEXT: $v8m4 = COPY [[SPLAT_VECTOR]](<vscale x 16 x s16>) 995 ; RV32-NEXT: PseudoRET implicit $v8m4 996 ; 997 ; RV64-LABEL: name: shufflevector_nxv16i16_0 998 ; RV64: bb.1 (%ir-block.0): 999 ; RV64-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 16 x s16>) = G_IMPLICIT_DEF 1000 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 1001 ; RV64-NEXT: [[EVEC:%[0-9]+]]:_(s16) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 16 x s16>), [[C]](s64) 1002 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 16 x s16>) = G_SPLAT_VECTOR [[EVEC]](s16) 1003 ; RV64-NEXT: $v8m4 = COPY [[SPLAT_VECTOR]](<vscale x 16 x s16>) 1004 ; RV64-NEXT: PseudoRET implicit $v8m4 1005 %a = shufflevector <vscale x 16 x i16> poison, <vscale x 16 x i16> poison, <vscale x 16 x i32> poison 1006 ret <vscale x 16 x i16> %a 1007} 1008 1009define <vscale x 16 x i16> @shufflevector_nxv16i16_1() { 1010 ; RV32-LABEL: name: shufflevector_nxv16i16_1 1011 ; RV32: bb.1 (%ir-block.0): 1012 ; RV32-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 16 x s16>) = G_IMPLICIT_DEF 1013 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 1014 ; RV32-NEXT: [[EVEC:%[0-9]+]]:_(s16) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 16 x s16>), [[C]](s32) 1015 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 16 x s16>) = G_SPLAT_VECTOR [[EVEC]](s16) 1016 ; RV32-NEXT: $v8m4 = COPY [[SPLAT_VECTOR]](<vscale x 16 x s16>) 1017 ; RV32-NEXT: PseudoRET implicit $v8m4 1018 ; 1019 ; RV64-LABEL: name: shufflevector_nxv16i16_1 1020 ; RV64: bb.1 (%ir-block.0): 1021 ; RV64-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 16 x s16>) = G_IMPLICIT_DEF 1022 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 1023 ; RV64-NEXT: [[EVEC:%[0-9]+]]:_(s16) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 16 x s16>), [[C]](s64) 1024 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 16 x s16>) = G_SPLAT_VECTOR [[EVEC]](s16) 1025 ; RV64-NEXT: $v8m4 = COPY [[SPLAT_VECTOR]](<vscale x 16 x s16>) 1026 ; RV64-NEXT: PseudoRET implicit $v8m4 1027 %a = shufflevector <vscale x 16 x i16> undef, <vscale x 16 x i16> undef, <vscale x 16 x i32> undef 1028 ret <vscale x 16 x i16> %a 1029} 1030 1031define <vscale x 16 x i16> @shufflevector_nxv16i16_2(<vscale x 16 x i16> %a) { 1032 ; RV32-LABEL: name: shufflevector_nxv16i16_2 1033 ; RV32: bb.1 (%ir-block.0): 1034 ; RV32-NEXT: liveins: $v8m4 1035 ; RV32-NEXT: {{ $}} 1036 ; RV32-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 16 x s16>) = COPY $v8m4 1037 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 1038 ; RV32-NEXT: [[EVEC:%[0-9]+]]:_(s16) = G_EXTRACT_VECTOR_ELT [[COPY]](<vscale x 16 x s16>), [[C]](s32) 1039 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 16 x s16>) = G_SPLAT_VECTOR [[EVEC]](s16) 1040 ; RV32-NEXT: $v8m4 = COPY [[SPLAT_VECTOR]](<vscale x 16 x s16>) 1041 ; RV32-NEXT: PseudoRET implicit $v8m4 1042 ; 1043 ; RV64-LABEL: name: shufflevector_nxv16i16_2 1044 ; RV64: bb.1 (%ir-block.0): 1045 ; RV64-NEXT: liveins: $v8m4 1046 ; RV64-NEXT: {{ $}} 1047 ; RV64-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 16 x s16>) = COPY $v8m4 1048 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 1049 ; RV64-NEXT: [[EVEC:%[0-9]+]]:_(s16) = G_EXTRACT_VECTOR_ELT [[COPY]](<vscale x 16 x s16>), [[C]](s64) 1050 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 16 x s16>) = G_SPLAT_VECTOR [[EVEC]](s16) 1051 ; RV64-NEXT: $v8m4 = COPY [[SPLAT_VECTOR]](<vscale x 16 x s16>) 1052 ; RV64-NEXT: PseudoRET implicit $v8m4 1053 %b = shufflevector <vscale x 16 x i16> %a , <vscale x 16 x i16> poison, <vscale x 16 x i32> zeroinitializer 1054 ret <vscale x 16 x i16> %b 1055} 1056 1057define <vscale x 1 x i32> @shufflevector_nxv1i32_0() { 1058 ; RV32-LABEL: name: shufflevector_nxv1i32_0 1059 ; RV32: bb.1 (%ir-block.0): 1060 ; RV32-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 1 x s32>) = G_IMPLICIT_DEF 1061 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 1062 ; RV32-NEXT: [[EVEC:%[0-9]+]]:_(s32) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 1 x s32>), [[C]](s32) 1063 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 1 x s32>) = G_SPLAT_VECTOR [[EVEC]](s32) 1064 ; RV32-NEXT: $v8 = COPY [[SPLAT_VECTOR]](<vscale x 1 x s32>) 1065 ; RV32-NEXT: PseudoRET implicit $v8 1066 ; 1067 ; RV64-LABEL: name: shufflevector_nxv1i32_0 1068 ; RV64: bb.1 (%ir-block.0): 1069 ; RV64-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 1 x s32>) = G_IMPLICIT_DEF 1070 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 1071 ; RV64-NEXT: [[EVEC:%[0-9]+]]:_(s32) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 1 x s32>), [[C]](s64) 1072 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 1 x s32>) = G_SPLAT_VECTOR [[EVEC]](s32) 1073 ; RV64-NEXT: $v8 = COPY [[SPLAT_VECTOR]](<vscale x 1 x s32>) 1074 ; RV64-NEXT: PseudoRET implicit $v8 1075 %a = shufflevector <vscale x 1 x i32> poison, <vscale x 1 x i32> poison, <vscale x 1 x i32> poison 1076 ret <vscale x 1 x i32> %a 1077} 1078 1079define <vscale x 1 x i32> @shufflevector_nxv1i32_1() { 1080 ; RV32-LABEL: name: shufflevector_nxv1i32_1 1081 ; RV32: bb.1 (%ir-block.0): 1082 ; RV32-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 1 x s32>) = G_IMPLICIT_DEF 1083 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 1084 ; RV32-NEXT: [[EVEC:%[0-9]+]]:_(s32) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 1 x s32>), [[C]](s32) 1085 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 1 x s32>) = G_SPLAT_VECTOR [[EVEC]](s32) 1086 ; RV32-NEXT: $v8 = COPY [[SPLAT_VECTOR]](<vscale x 1 x s32>) 1087 ; RV32-NEXT: PseudoRET implicit $v8 1088 ; 1089 ; RV64-LABEL: name: shufflevector_nxv1i32_1 1090 ; RV64: bb.1 (%ir-block.0): 1091 ; RV64-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 1 x s32>) = G_IMPLICIT_DEF 1092 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 1093 ; RV64-NEXT: [[EVEC:%[0-9]+]]:_(s32) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 1 x s32>), [[C]](s64) 1094 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 1 x s32>) = G_SPLAT_VECTOR [[EVEC]](s32) 1095 ; RV64-NEXT: $v8 = COPY [[SPLAT_VECTOR]](<vscale x 1 x s32>) 1096 ; RV64-NEXT: PseudoRET implicit $v8 1097 %a = shufflevector <vscale x 1 x i32> undef, <vscale x 1 x i32> undef, <vscale x 1 x i32> undef 1098 ret <vscale x 1 x i32> %a 1099} 1100 1101define <vscale x 1 x i32> @shufflevector_nxv1i32_2(<vscale x 1 x i32> %a) { 1102 ; RV32-LABEL: name: shufflevector_nxv1i32_2 1103 ; RV32: bb.1 (%ir-block.0): 1104 ; RV32-NEXT: liveins: $v8 1105 ; RV32-NEXT: {{ $}} 1106 ; RV32-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 1 x s32>) = COPY $v8 1107 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 1108 ; RV32-NEXT: [[EVEC:%[0-9]+]]:_(s32) = G_EXTRACT_VECTOR_ELT [[COPY]](<vscale x 1 x s32>), [[C]](s32) 1109 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 1 x s32>) = G_SPLAT_VECTOR [[EVEC]](s32) 1110 ; RV32-NEXT: $v8 = COPY [[SPLAT_VECTOR]](<vscale x 1 x s32>) 1111 ; RV32-NEXT: PseudoRET implicit $v8 1112 ; 1113 ; RV64-LABEL: name: shufflevector_nxv1i32_2 1114 ; RV64: bb.1 (%ir-block.0): 1115 ; RV64-NEXT: liveins: $v8 1116 ; RV64-NEXT: {{ $}} 1117 ; RV64-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 1 x s32>) = COPY $v8 1118 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 1119 ; RV64-NEXT: [[EVEC:%[0-9]+]]:_(s32) = G_EXTRACT_VECTOR_ELT [[COPY]](<vscale x 1 x s32>), [[C]](s64) 1120 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 1 x s32>) = G_SPLAT_VECTOR [[EVEC]](s32) 1121 ; RV64-NEXT: $v8 = COPY [[SPLAT_VECTOR]](<vscale x 1 x s32>) 1122 ; RV64-NEXT: PseudoRET implicit $v8 1123 %b = shufflevector <vscale x 1 x i32> %a , <vscale x 1 x i32> poison, <vscale x 1 x i32> zeroinitializer 1124 ret <vscale x 1 x i32> %b 1125} 1126 1127define <vscale x 2 x i32> @shufflevector_nxv2i32_0() { 1128 ; RV32-LABEL: name: shufflevector_nxv2i32_0 1129 ; RV32: bb.1 (%ir-block.0): 1130 ; RV32-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 2 x s32>) = G_IMPLICIT_DEF 1131 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 1132 ; RV32-NEXT: [[EVEC:%[0-9]+]]:_(s32) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 2 x s32>), [[C]](s32) 1133 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 2 x s32>) = G_SPLAT_VECTOR [[EVEC]](s32) 1134 ; RV32-NEXT: $v8 = COPY [[SPLAT_VECTOR]](<vscale x 2 x s32>) 1135 ; RV32-NEXT: PseudoRET implicit $v8 1136 ; 1137 ; RV64-LABEL: name: shufflevector_nxv2i32_0 1138 ; RV64: bb.1 (%ir-block.0): 1139 ; RV64-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 2 x s32>) = G_IMPLICIT_DEF 1140 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 1141 ; RV64-NEXT: [[EVEC:%[0-9]+]]:_(s32) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 2 x s32>), [[C]](s64) 1142 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 2 x s32>) = G_SPLAT_VECTOR [[EVEC]](s32) 1143 ; RV64-NEXT: $v8 = COPY [[SPLAT_VECTOR]](<vscale x 2 x s32>) 1144 ; RV64-NEXT: PseudoRET implicit $v8 1145 %a = shufflevector <vscale x 2 x i32> poison, <vscale x 2 x i32> poison, <vscale x 2 x i32> poison 1146 ret <vscale x 2 x i32> %a 1147} 1148 1149define <vscale x 2 x i32> @shufflevector_nxv2i32_1() { 1150 ; RV32-LABEL: name: shufflevector_nxv2i32_1 1151 ; RV32: bb.1 (%ir-block.0): 1152 ; RV32-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 2 x s32>) = G_IMPLICIT_DEF 1153 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 1154 ; RV32-NEXT: [[EVEC:%[0-9]+]]:_(s32) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 2 x s32>), [[C]](s32) 1155 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 2 x s32>) = G_SPLAT_VECTOR [[EVEC]](s32) 1156 ; RV32-NEXT: $v8 = COPY [[SPLAT_VECTOR]](<vscale x 2 x s32>) 1157 ; RV32-NEXT: PseudoRET implicit $v8 1158 ; 1159 ; RV64-LABEL: name: shufflevector_nxv2i32_1 1160 ; RV64: bb.1 (%ir-block.0): 1161 ; RV64-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 2 x s32>) = G_IMPLICIT_DEF 1162 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 1163 ; RV64-NEXT: [[EVEC:%[0-9]+]]:_(s32) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 2 x s32>), [[C]](s64) 1164 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 2 x s32>) = G_SPLAT_VECTOR [[EVEC]](s32) 1165 ; RV64-NEXT: $v8 = COPY [[SPLAT_VECTOR]](<vscale x 2 x s32>) 1166 ; RV64-NEXT: PseudoRET implicit $v8 1167 %a = shufflevector <vscale x 2 x i32> undef, <vscale x 2 x i32> undef, <vscale x 2 x i32> undef 1168 ret <vscale x 2 x i32> %a 1169} 1170 1171define <vscale x 2 x i32> @shufflevector_nxv2i32_2(<vscale x 2 x i32> %a) { 1172 ; RV32-LABEL: name: shufflevector_nxv2i32_2 1173 ; RV32: bb.1 (%ir-block.0): 1174 ; RV32-NEXT: liveins: $v8 1175 ; RV32-NEXT: {{ $}} 1176 ; RV32-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 2 x s32>) = COPY $v8 1177 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 1178 ; RV32-NEXT: [[EVEC:%[0-9]+]]:_(s32) = G_EXTRACT_VECTOR_ELT [[COPY]](<vscale x 2 x s32>), [[C]](s32) 1179 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 2 x s32>) = G_SPLAT_VECTOR [[EVEC]](s32) 1180 ; RV32-NEXT: $v8 = COPY [[SPLAT_VECTOR]](<vscale x 2 x s32>) 1181 ; RV32-NEXT: PseudoRET implicit $v8 1182 ; 1183 ; RV64-LABEL: name: shufflevector_nxv2i32_2 1184 ; RV64: bb.1 (%ir-block.0): 1185 ; RV64-NEXT: liveins: $v8 1186 ; RV64-NEXT: {{ $}} 1187 ; RV64-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 2 x s32>) = COPY $v8 1188 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 1189 ; RV64-NEXT: [[EVEC:%[0-9]+]]:_(s32) = G_EXTRACT_VECTOR_ELT [[COPY]](<vscale x 2 x s32>), [[C]](s64) 1190 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 2 x s32>) = G_SPLAT_VECTOR [[EVEC]](s32) 1191 ; RV64-NEXT: $v8 = COPY [[SPLAT_VECTOR]](<vscale x 2 x s32>) 1192 ; RV64-NEXT: PseudoRET implicit $v8 1193 %b = shufflevector <vscale x 2 x i32> %a , <vscale x 2 x i32> poison, <vscale x 2 x i32> zeroinitializer 1194 ret <vscale x 2 x i32> %b 1195} 1196 1197define <vscale x 4 x i32> @shufflevector_nxv4i32_0() { 1198 ; RV32-LABEL: name: shufflevector_nxv4i32_0 1199 ; RV32: bb.1 (%ir-block.0): 1200 ; RV32-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 4 x s32>) = G_IMPLICIT_DEF 1201 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 1202 ; RV32-NEXT: [[EVEC:%[0-9]+]]:_(s32) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 4 x s32>), [[C]](s32) 1203 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 4 x s32>) = G_SPLAT_VECTOR [[EVEC]](s32) 1204 ; RV32-NEXT: $v8m2 = COPY [[SPLAT_VECTOR]](<vscale x 4 x s32>) 1205 ; RV32-NEXT: PseudoRET implicit $v8m2 1206 ; 1207 ; RV64-LABEL: name: shufflevector_nxv4i32_0 1208 ; RV64: bb.1 (%ir-block.0): 1209 ; RV64-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 4 x s32>) = G_IMPLICIT_DEF 1210 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 1211 ; RV64-NEXT: [[EVEC:%[0-9]+]]:_(s32) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 4 x s32>), [[C]](s64) 1212 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 4 x s32>) = G_SPLAT_VECTOR [[EVEC]](s32) 1213 ; RV64-NEXT: $v8m2 = COPY [[SPLAT_VECTOR]](<vscale x 4 x s32>) 1214 ; RV64-NEXT: PseudoRET implicit $v8m2 1215 %a = shufflevector <vscale x 4 x i32> poison, <vscale x 4 x i32> poison, <vscale x 4 x i32> poison 1216 ret <vscale x 4 x i32> %a 1217} 1218 1219define <vscale x 4 x i32> @shufflevector_nxv4i32_1() { 1220 ; RV32-LABEL: name: shufflevector_nxv4i32_1 1221 ; RV32: bb.1 (%ir-block.0): 1222 ; RV32-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 4 x s32>) = G_IMPLICIT_DEF 1223 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 1224 ; RV32-NEXT: [[EVEC:%[0-9]+]]:_(s32) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 4 x s32>), [[C]](s32) 1225 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 4 x s32>) = G_SPLAT_VECTOR [[EVEC]](s32) 1226 ; RV32-NEXT: $v8m2 = COPY [[SPLAT_VECTOR]](<vscale x 4 x s32>) 1227 ; RV32-NEXT: PseudoRET implicit $v8m2 1228 ; 1229 ; RV64-LABEL: name: shufflevector_nxv4i32_1 1230 ; RV64: bb.1 (%ir-block.0): 1231 ; RV64-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 4 x s32>) = G_IMPLICIT_DEF 1232 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 1233 ; RV64-NEXT: [[EVEC:%[0-9]+]]:_(s32) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 4 x s32>), [[C]](s64) 1234 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 4 x s32>) = G_SPLAT_VECTOR [[EVEC]](s32) 1235 ; RV64-NEXT: $v8m2 = COPY [[SPLAT_VECTOR]](<vscale x 4 x s32>) 1236 ; RV64-NEXT: PseudoRET implicit $v8m2 1237 %a = shufflevector <vscale x 4 x i32> undef, <vscale x 4 x i32> undef, <vscale x 4 x i32> undef 1238 ret <vscale x 4 x i32> %a 1239} 1240 1241define <vscale x 4 x i32> @shufflevector_nxv4i32_2(<vscale x 4 x i32> %a) { 1242 ; RV32-LABEL: name: shufflevector_nxv4i32_2 1243 ; RV32: bb.1 (%ir-block.0): 1244 ; RV32-NEXT: liveins: $v8m2 1245 ; RV32-NEXT: {{ $}} 1246 ; RV32-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 4 x s32>) = COPY $v8m2 1247 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 1248 ; RV32-NEXT: [[EVEC:%[0-9]+]]:_(s32) = G_EXTRACT_VECTOR_ELT [[COPY]](<vscale x 4 x s32>), [[C]](s32) 1249 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 4 x s32>) = G_SPLAT_VECTOR [[EVEC]](s32) 1250 ; RV32-NEXT: $v8m2 = COPY [[SPLAT_VECTOR]](<vscale x 4 x s32>) 1251 ; RV32-NEXT: PseudoRET implicit $v8m2 1252 ; 1253 ; RV64-LABEL: name: shufflevector_nxv4i32_2 1254 ; RV64: bb.1 (%ir-block.0): 1255 ; RV64-NEXT: liveins: $v8m2 1256 ; RV64-NEXT: {{ $}} 1257 ; RV64-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 4 x s32>) = COPY $v8m2 1258 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 1259 ; RV64-NEXT: [[EVEC:%[0-9]+]]:_(s32) = G_EXTRACT_VECTOR_ELT [[COPY]](<vscale x 4 x s32>), [[C]](s64) 1260 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 4 x s32>) = G_SPLAT_VECTOR [[EVEC]](s32) 1261 ; RV64-NEXT: $v8m2 = COPY [[SPLAT_VECTOR]](<vscale x 4 x s32>) 1262 ; RV64-NEXT: PseudoRET implicit $v8m2 1263 %b = shufflevector <vscale x 4 x i32> %a , <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer 1264 ret <vscale x 4 x i32> %b 1265} 1266 1267define <vscale x 8 x i32> @shufflevector_nxv8i32_0() { 1268 ; RV32-LABEL: name: shufflevector_nxv8i32_0 1269 ; RV32: bb.1 (%ir-block.0): 1270 ; RV32-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 8 x s32>) = G_IMPLICIT_DEF 1271 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 1272 ; RV32-NEXT: [[EVEC:%[0-9]+]]:_(s32) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 8 x s32>), [[C]](s32) 1273 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 8 x s32>) = G_SPLAT_VECTOR [[EVEC]](s32) 1274 ; RV32-NEXT: $v8m4 = COPY [[SPLAT_VECTOR]](<vscale x 8 x s32>) 1275 ; RV32-NEXT: PseudoRET implicit $v8m4 1276 ; 1277 ; RV64-LABEL: name: shufflevector_nxv8i32_0 1278 ; RV64: bb.1 (%ir-block.0): 1279 ; RV64-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 8 x s32>) = G_IMPLICIT_DEF 1280 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 1281 ; RV64-NEXT: [[EVEC:%[0-9]+]]:_(s32) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 8 x s32>), [[C]](s64) 1282 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 8 x s32>) = G_SPLAT_VECTOR [[EVEC]](s32) 1283 ; RV64-NEXT: $v8m4 = COPY [[SPLAT_VECTOR]](<vscale x 8 x s32>) 1284 ; RV64-NEXT: PseudoRET implicit $v8m4 1285 %a = shufflevector <vscale x 8 x i32> poison, <vscale x 8 x i32> poison, <vscale x 8 x i32> poison 1286 ret <vscale x 8 x i32> %a 1287} 1288 1289define <vscale x 8 x i32> @shufflevector_nxv8i32_1() { 1290 ; RV32-LABEL: name: shufflevector_nxv8i32_1 1291 ; RV32: bb.1 (%ir-block.0): 1292 ; RV32-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 8 x s32>) = G_IMPLICIT_DEF 1293 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 1294 ; RV32-NEXT: [[EVEC:%[0-9]+]]:_(s32) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 8 x s32>), [[C]](s32) 1295 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 8 x s32>) = G_SPLAT_VECTOR [[EVEC]](s32) 1296 ; RV32-NEXT: $v8m4 = COPY [[SPLAT_VECTOR]](<vscale x 8 x s32>) 1297 ; RV32-NEXT: PseudoRET implicit $v8m4 1298 ; 1299 ; RV64-LABEL: name: shufflevector_nxv8i32_1 1300 ; RV64: bb.1 (%ir-block.0): 1301 ; RV64-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 8 x s32>) = G_IMPLICIT_DEF 1302 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 1303 ; RV64-NEXT: [[EVEC:%[0-9]+]]:_(s32) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 8 x s32>), [[C]](s64) 1304 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 8 x s32>) = G_SPLAT_VECTOR [[EVEC]](s32) 1305 ; RV64-NEXT: $v8m4 = COPY [[SPLAT_VECTOR]](<vscale x 8 x s32>) 1306 ; RV64-NEXT: PseudoRET implicit $v8m4 1307 %a = shufflevector <vscale x 8 x i32> undef, <vscale x 8 x i32> undef, <vscale x 8 x i32> undef 1308 ret <vscale x 8 x i32> %a 1309} 1310 1311define <vscale x 8 x i32> @shufflevector_nxv8i32_2(<vscale x 8 x i32> %a) { 1312 ; RV32-LABEL: name: shufflevector_nxv8i32_2 1313 ; RV32: bb.1 (%ir-block.0): 1314 ; RV32-NEXT: liveins: $v8m4 1315 ; RV32-NEXT: {{ $}} 1316 ; RV32-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 8 x s32>) = COPY $v8m4 1317 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 1318 ; RV32-NEXT: [[EVEC:%[0-9]+]]:_(s32) = G_EXTRACT_VECTOR_ELT [[COPY]](<vscale x 8 x s32>), [[C]](s32) 1319 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 8 x s32>) = G_SPLAT_VECTOR [[EVEC]](s32) 1320 ; RV32-NEXT: $v8m4 = COPY [[SPLAT_VECTOR]](<vscale x 8 x s32>) 1321 ; RV32-NEXT: PseudoRET implicit $v8m4 1322 ; 1323 ; RV64-LABEL: name: shufflevector_nxv8i32_2 1324 ; RV64: bb.1 (%ir-block.0): 1325 ; RV64-NEXT: liveins: $v8m4 1326 ; RV64-NEXT: {{ $}} 1327 ; RV64-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 8 x s32>) = COPY $v8m4 1328 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 1329 ; RV64-NEXT: [[EVEC:%[0-9]+]]:_(s32) = G_EXTRACT_VECTOR_ELT [[COPY]](<vscale x 8 x s32>), [[C]](s64) 1330 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 8 x s32>) = G_SPLAT_VECTOR [[EVEC]](s32) 1331 ; RV64-NEXT: $v8m4 = COPY [[SPLAT_VECTOR]](<vscale x 8 x s32>) 1332 ; RV64-NEXT: PseudoRET implicit $v8m4 1333 %b = shufflevector <vscale x 8 x i32> %a , <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer 1334 ret <vscale x 8 x i32> %b 1335} 1336 1337define <vscale x 16 x i32> @shufflevector_nxv16i32_0() { 1338 ; RV32-LABEL: name: shufflevector_nxv16i32_0 1339 ; RV32: bb.1 (%ir-block.0): 1340 ; RV32-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 16 x s32>) = G_IMPLICIT_DEF 1341 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 1342 ; RV32-NEXT: [[EVEC:%[0-9]+]]:_(s32) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 16 x s32>), [[C]](s32) 1343 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 16 x s32>) = G_SPLAT_VECTOR [[EVEC]](s32) 1344 ; RV32-NEXT: $v8m8 = COPY [[SPLAT_VECTOR]](<vscale x 16 x s32>) 1345 ; RV32-NEXT: PseudoRET implicit $v8m8 1346 ; 1347 ; RV64-LABEL: name: shufflevector_nxv16i32_0 1348 ; RV64: bb.1 (%ir-block.0): 1349 ; RV64-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 16 x s32>) = G_IMPLICIT_DEF 1350 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 1351 ; RV64-NEXT: [[EVEC:%[0-9]+]]:_(s32) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 16 x s32>), [[C]](s64) 1352 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 16 x s32>) = G_SPLAT_VECTOR [[EVEC]](s32) 1353 ; RV64-NEXT: $v8m8 = COPY [[SPLAT_VECTOR]](<vscale x 16 x s32>) 1354 ; RV64-NEXT: PseudoRET implicit $v8m8 1355 %a = shufflevector <vscale x 16 x i32> poison, <vscale x 16 x i32> poison, <vscale x 16 x i32> poison 1356 ret <vscale x 16 x i32> %a 1357} 1358 1359define <vscale x 16 x i32> @shufflevector_nxv16i32_1() { 1360 ; RV32-LABEL: name: shufflevector_nxv16i32_1 1361 ; RV32: bb.1 (%ir-block.0): 1362 ; RV32-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 16 x s32>) = G_IMPLICIT_DEF 1363 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 1364 ; RV32-NEXT: [[EVEC:%[0-9]+]]:_(s32) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 16 x s32>), [[C]](s32) 1365 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 16 x s32>) = G_SPLAT_VECTOR [[EVEC]](s32) 1366 ; RV32-NEXT: $v8m8 = COPY [[SPLAT_VECTOR]](<vscale x 16 x s32>) 1367 ; RV32-NEXT: PseudoRET implicit $v8m8 1368 ; 1369 ; RV64-LABEL: name: shufflevector_nxv16i32_1 1370 ; RV64: bb.1 (%ir-block.0): 1371 ; RV64-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 16 x s32>) = G_IMPLICIT_DEF 1372 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 1373 ; RV64-NEXT: [[EVEC:%[0-9]+]]:_(s32) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 16 x s32>), [[C]](s64) 1374 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 16 x s32>) = G_SPLAT_VECTOR [[EVEC]](s32) 1375 ; RV64-NEXT: $v8m8 = COPY [[SPLAT_VECTOR]](<vscale x 16 x s32>) 1376 ; RV64-NEXT: PseudoRET implicit $v8m8 1377 %a = shufflevector <vscale x 16 x i32> undef, <vscale x 16 x i32> undef, <vscale x 16 x i32> undef 1378 ret <vscale x 16 x i32> %a 1379} 1380 1381define <vscale x 16 x i32> @shufflevector_nxv16i32_2(<vscale x 16 x i32> %a) { 1382 ; RV32-LABEL: name: shufflevector_nxv16i32_2 1383 ; RV32: bb.1 (%ir-block.0): 1384 ; RV32-NEXT: liveins: $v8m8 1385 ; RV32-NEXT: {{ $}} 1386 ; RV32-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 16 x s32>) = COPY $v8m8 1387 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 1388 ; RV32-NEXT: [[EVEC:%[0-9]+]]:_(s32) = G_EXTRACT_VECTOR_ELT [[COPY]](<vscale x 16 x s32>), [[C]](s32) 1389 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 16 x s32>) = G_SPLAT_VECTOR [[EVEC]](s32) 1390 ; RV32-NEXT: $v8m8 = COPY [[SPLAT_VECTOR]](<vscale x 16 x s32>) 1391 ; RV32-NEXT: PseudoRET implicit $v8m8 1392 ; 1393 ; RV64-LABEL: name: shufflevector_nxv16i32_2 1394 ; RV64: bb.1 (%ir-block.0): 1395 ; RV64-NEXT: liveins: $v8m8 1396 ; RV64-NEXT: {{ $}} 1397 ; RV64-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 16 x s32>) = COPY $v8m8 1398 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 1399 ; RV64-NEXT: [[EVEC:%[0-9]+]]:_(s32) = G_EXTRACT_VECTOR_ELT [[COPY]](<vscale x 16 x s32>), [[C]](s64) 1400 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 16 x s32>) = G_SPLAT_VECTOR [[EVEC]](s32) 1401 ; RV64-NEXT: $v8m8 = COPY [[SPLAT_VECTOR]](<vscale x 16 x s32>) 1402 ; RV64-NEXT: PseudoRET implicit $v8m8 1403 %b = shufflevector <vscale x 16 x i32> %a , <vscale x 16 x i32> poison, <vscale x 16 x i32> zeroinitializer 1404 ret <vscale x 16 x i32> %b 1405} 1406 1407define <vscale x 1 x i64> @shufflevector_nxv1i64_0() { 1408 ; RV32-LABEL: name: shufflevector_nxv1i64_0 1409 ; RV32: bb.1 (%ir-block.0): 1410 ; RV32-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 1 x s64>) = G_IMPLICIT_DEF 1411 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 1412 ; RV32-NEXT: [[EVEC:%[0-9]+]]:_(s64) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 1 x s64>), [[C]](s32) 1413 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 1 x s64>) = G_SPLAT_VECTOR [[EVEC]](s64) 1414 ; RV32-NEXT: $v8 = COPY [[SPLAT_VECTOR]](<vscale x 1 x s64>) 1415 ; RV32-NEXT: PseudoRET implicit $v8 1416 ; 1417 ; RV64-LABEL: name: shufflevector_nxv1i64_0 1418 ; RV64: bb.1 (%ir-block.0): 1419 ; RV64-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 1 x s64>) = G_IMPLICIT_DEF 1420 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 1421 ; RV64-NEXT: [[EVEC:%[0-9]+]]:_(s64) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 1 x s64>), [[C]](s64) 1422 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 1 x s64>) = G_SPLAT_VECTOR [[EVEC]](s64) 1423 ; RV64-NEXT: $v8 = COPY [[SPLAT_VECTOR]](<vscale x 1 x s64>) 1424 ; RV64-NEXT: PseudoRET implicit $v8 1425 %a = shufflevector <vscale x 1 x i64> poison, <vscale x 1 x i64> poison, <vscale x 1 x i32> poison 1426 ret <vscale x 1 x i64> %a 1427} 1428 1429define <vscale x 1 x i64> @shufflevector_nxv1i64_1() { 1430 ; RV32-LABEL: name: shufflevector_nxv1i64_1 1431 ; RV32: bb.1 (%ir-block.0): 1432 ; RV32-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 1 x s64>) = G_IMPLICIT_DEF 1433 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 1434 ; RV32-NEXT: [[EVEC:%[0-9]+]]:_(s64) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 1 x s64>), [[C]](s32) 1435 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 1 x s64>) = G_SPLAT_VECTOR [[EVEC]](s64) 1436 ; RV32-NEXT: $v8 = COPY [[SPLAT_VECTOR]](<vscale x 1 x s64>) 1437 ; RV32-NEXT: PseudoRET implicit $v8 1438 ; 1439 ; RV64-LABEL: name: shufflevector_nxv1i64_1 1440 ; RV64: bb.1 (%ir-block.0): 1441 ; RV64-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 1 x s64>) = G_IMPLICIT_DEF 1442 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 1443 ; RV64-NEXT: [[EVEC:%[0-9]+]]:_(s64) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 1 x s64>), [[C]](s64) 1444 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 1 x s64>) = G_SPLAT_VECTOR [[EVEC]](s64) 1445 ; RV64-NEXT: $v8 = COPY [[SPLAT_VECTOR]](<vscale x 1 x s64>) 1446 ; RV64-NEXT: PseudoRET implicit $v8 1447 %a = shufflevector <vscale x 1 x i64> undef, <vscale x 1 x i64> undef, <vscale x 1 x i32> undef 1448 ret <vscale x 1 x i64> %a 1449} 1450 1451define <vscale x 1 x i64> @shufflevector_nxv1i64_2(<vscale x 1 x i64> %a) { 1452 ; RV32-LABEL: name: shufflevector_nxv1i64_2 1453 ; RV32: bb.1 (%ir-block.0): 1454 ; RV32-NEXT: liveins: $v8 1455 ; RV32-NEXT: {{ $}} 1456 ; RV32-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 1 x s64>) = COPY $v8 1457 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 1458 ; RV32-NEXT: [[EVEC:%[0-9]+]]:_(s64) = G_EXTRACT_VECTOR_ELT [[COPY]](<vscale x 1 x s64>), [[C]](s32) 1459 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 1 x s64>) = G_SPLAT_VECTOR [[EVEC]](s64) 1460 ; RV32-NEXT: $v8 = COPY [[SPLAT_VECTOR]](<vscale x 1 x s64>) 1461 ; RV32-NEXT: PseudoRET implicit $v8 1462 ; 1463 ; RV64-LABEL: name: shufflevector_nxv1i64_2 1464 ; RV64: bb.1 (%ir-block.0): 1465 ; RV64-NEXT: liveins: $v8 1466 ; RV64-NEXT: {{ $}} 1467 ; RV64-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 1 x s64>) = COPY $v8 1468 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 1469 ; RV64-NEXT: [[EVEC:%[0-9]+]]:_(s64) = G_EXTRACT_VECTOR_ELT [[COPY]](<vscale x 1 x s64>), [[C]](s64) 1470 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 1 x s64>) = G_SPLAT_VECTOR [[EVEC]](s64) 1471 ; RV64-NEXT: $v8 = COPY [[SPLAT_VECTOR]](<vscale x 1 x s64>) 1472 ; RV64-NEXT: PseudoRET implicit $v8 1473 %b = shufflevector <vscale x 1 x i64> %a , <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer 1474 ret <vscale x 1 x i64> %b 1475} 1476 1477define <vscale x 2 x i64> @shufflevector_nxv2i64_0() { 1478 ; RV32-LABEL: name: shufflevector_nxv2i64_0 1479 ; RV32: bb.1 (%ir-block.0): 1480 ; RV32-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 2 x s64>) = G_IMPLICIT_DEF 1481 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 1482 ; RV32-NEXT: [[EVEC:%[0-9]+]]:_(s64) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 2 x s64>), [[C]](s32) 1483 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 2 x s64>) = G_SPLAT_VECTOR [[EVEC]](s64) 1484 ; RV32-NEXT: $v8m2 = COPY [[SPLAT_VECTOR]](<vscale x 2 x s64>) 1485 ; RV32-NEXT: PseudoRET implicit $v8m2 1486 ; 1487 ; RV64-LABEL: name: shufflevector_nxv2i64_0 1488 ; RV64: bb.1 (%ir-block.0): 1489 ; RV64-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 2 x s64>) = G_IMPLICIT_DEF 1490 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 1491 ; RV64-NEXT: [[EVEC:%[0-9]+]]:_(s64) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 2 x s64>), [[C]](s64) 1492 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 2 x s64>) = G_SPLAT_VECTOR [[EVEC]](s64) 1493 ; RV64-NEXT: $v8m2 = COPY [[SPLAT_VECTOR]](<vscale x 2 x s64>) 1494 ; RV64-NEXT: PseudoRET implicit $v8m2 1495 %a = shufflevector <vscale x 2 x i64> poison, <vscale x 2 x i64> poison, <vscale x 2 x i32> poison 1496 ret <vscale x 2 x i64> %a 1497} 1498 1499define <vscale x 2 x i64> @shufflevector_nxv2i64_1() { 1500 ; RV32-LABEL: name: shufflevector_nxv2i64_1 1501 ; RV32: bb.1 (%ir-block.0): 1502 ; RV32-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 2 x s64>) = G_IMPLICIT_DEF 1503 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 1504 ; RV32-NEXT: [[EVEC:%[0-9]+]]:_(s64) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 2 x s64>), [[C]](s32) 1505 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 2 x s64>) = G_SPLAT_VECTOR [[EVEC]](s64) 1506 ; RV32-NEXT: $v8m2 = COPY [[SPLAT_VECTOR]](<vscale x 2 x s64>) 1507 ; RV32-NEXT: PseudoRET implicit $v8m2 1508 ; 1509 ; RV64-LABEL: name: shufflevector_nxv2i64_1 1510 ; RV64: bb.1 (%ir-block.0): 1511 ; RV64-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 2 x s64>) = G_IMPLICIT_DEF 1512 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 1513 ; RV64-NEXT: [[EVEC:%[0-9]+]]:_(s64) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 2 x s64>), [[C]](s64) 1514 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 2 x s64>) = G_SPLAT_VECTOR [[EVEC]](s64) 1515 ; RV64-NEXT: $v8m2 = COPY [[SPLAT_VECTOR]](<vscale x 2 x s64>) 1516 ; RV64-NEXT: PseudoRET implicit $v8m2 1517 %a = shufflevector <vscale x 2 x i64> undef, <vscale x 2 x i64> undef, <vscale x 2 x i32> undef 1518 ret <vscale x 2 x i64> %a 1519} 1520 1521define <vscale x 2 x i64> @shufflevector_nxv2i64_2(<vscale x 2 x i64> %a) { 1522 ; RV32-LABEL: name: shufflevector_nxv2i64_2 1523 ; RV32: bb.1 (%ir-block.0): 1524 ; RV32-NEXT: liveins: $v8m2 1525 ; RV32-NEXT: {{ $}} 1526 ; RV32-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 2 x s64>) = COPY $v8m2 1527 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 1528 ; RV32-NEXT: [[EVEC:%[0-9]+]]:_(s64) = G_EXTRACT_VECTOR_ELT [[COPY]](<vscale x 2 x s64>), [[C]](s32) 1529 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 2 x s64>) = G_SPLAT_VECTOR [[EVEC]](s64) 1530 ; RV32-NEXT: $v8m2 = COPY [[SPLAT_VECTOR]](<vscale x 2 x s64>) 1531 ; RV32-NEXT: PseudoRET implicit $v8m2 1532 ; 1533 ; RV64-LABEL: name: shufflevector_nxv2i64_2 1534 ; RV64: bb.1 (%ir-block.0): 1535 ; RV64-NEXT: liveins: $v8m2 1536 ; RV64-NEXT: {{ $}} 1537 ; RV64-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 2 x s64>) = COPY $v8m2 1538 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 1539 ; RV64-NEXT: [[EVEC:%[0-9]+]]:_(s64) = G_EXTRACT_VECTOR_ELT [[COPY]](<vscale x 2 x s64>), [[C]](s64) 1540 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 2 x s64>) = G_SPLAT_VECTOR [[EVEC]](s64) 1541 ; RV64-NEXT: $v8m2 = COPY [[SPLAT_VECTOR]](<vscale x 2 x s64>) 1542 ; RV64-NEXT: PseudoRET implicit $v8m2 1543 %b = shufflevector <vscale x 2 x i64> %a , <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer 1544 ret <vscale x 2 x i64> %b 1545} 1546 1547define <vscale x 4 x i64> @shufflevector_nxv4i64_0() { 1548 ; RV32-LABEL: name: shufflevector_nxv4i64_0 1549 ; RV32: bb.1 (%ir-block.0): 1550 ; RV32-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 4 x s64>) = G_IMPLICIT_DEF 1551 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 1552 ; RV32-NEXT: [[EVEC:%[0-9]+]]:_(s64) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 4 x s64>), [[C]](s32) 1553 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 4 x s64>) = G_SPLAT_VECTOR [[EVEC]](s64) 1554 ; RV32-NEXT: $v8m4 = COPY [[SPLAT_VECTOR]](<vscale x 4 x s64>) 1555 ; RV32-NEXT: PseudoRET implicit $v8m4 1556 ; 1557 ; RV64-LABEL: name: shufflevector_nxv4i64_0 1558 ; RV64: bb.1 (%ir-block.0): 1559 ; RV64-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 4 x s64>) = G_IMPLICIT_DEF 1560 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 1561 ; RV64-NEXT: [[EVEC:%[0-9]+]]:_(s64) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 4 x s64>), [[C]](s64) 1562 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 4 x s64>) = G_SPLAT_VECTOR [[EVEC]](s64) 1563 ; RV64-NEXT: $v8m4 = COPY [[SPLAT_VECTOR]](<vscale x 4 x s64>) 1564 ; RV64-NEXT: PseudoRET implicit $v8m4 1565 %a = shufflevector <vscale x 4 x i64> poison, <vscale x 4 x i64> poison, <vscale x 4 x i32> poison 1566 ret <vscale x 4 x i64> %a 1567} 1568 1569define <vscale x 4 x i64> @shufflevector_nxv4i64_1() { 1570 ; RV32-LABEL: name: shufflevector_nxv4i64_1 1571 ; RV32: bb.1 (%ir-block.0): 1572 ; RV32-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 4 x s64>) = G_IMPLICIT_DEF 1573 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 1574 ; RV32-NEXT: [[EVEC:%[0-9]+]]:_(s64) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 4 x s64>), [[C]](s32) 1575 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 4 x s64>) = G_SPLAT_VECTOR [[EVEC]](s64) 1576 ; RV32-NEXT: $v8m4 = COPY [[SPLAT_VECTOR]](<vscale x 4 x s64>) 1577 ; RV32-NEXT: PseudoRET implicit $v8m4 1578 ; 1579 ; RV64-LABEL: name: shufflevector_nxv4i64_1 1580 ; RV64: bb.1 (%ir-block.0): 1581 ; RV64-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 4 x s64>) = G_IMPLICIT_DEF 1582 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 1583 ; RV64-NEXT: [[EVEC:%[0-9]+]]:_(s64) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 4 x s64>), [[C]](s64) 1584 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 4 x s64>) = G_SPLAT_VECTOR [[EVEC]](s64) 1585 ; RV64-NEXT: $v8m4 = COPY [[SPLAT_VECTOR]](<vscale x 4 x s64>) 1586 ; RV64-NEXT: PseudoRET implicit $v8m4 1587 %a = shufflevector <vscale x 4 x i64> undef, <vscale x 4 x i64> undef, <vscale x 4 x i32> undef 1588 ret <vscale x 4 x i64> %a 1589} 1590 1591define <vscale x 4 x i64> @shufflevector_nxv4i64_2(<vscale x 4 x i64> %a) { 1592 ; RV32-LABEL: name: shufflevector_nxv4i64_2 1593 ; RV32: bb.1 (%ir-block.0): 1594 ; RV32-NEXT: liveins: $v8m4 1595 ; RV32-NEXT: {{ $}} 1596 ; RV32-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 4 x s64>) = COPY $v8m4 1597 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 1598 ; RV32-NEXT: [[EVEC:%[0-9]+]]:_(s64) = G_EXTRACT_VECTOR_ELT [[COPY]](<vscale x 4 x s64>), [[C]](s32) 1599 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 4 x s64>) = G_SPLAT_VECTOR [[EVEC]](s64) 1600 ; RV32-NEXT: $v8m4 = COPY [[SPLAT_VECTOR]](<vscale x 4 x s64>) 1601 ; RV32-NEXT: PseudoRET implicit $v8m4 1602 ; 1603 ; RV64-LABEL: name: shufflevector_nxv4i64_2 1604 ; RV64: bb.1 (%ir-block.0): 1605 ; RV64-NEXT: liveins: $v8m4 1606 ; RV64-NEXT: {{ $}} 1607 ; RV64-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 4 x s64>) = COPY $v8m4 1608 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 1609 ; RV64-NEXT: [[EVEC:%[0-9]+]]:_(s64) = G_EXTRACT_VECTOR_ELT [[COPY]](<vscale x 4 x s64>), [[C]](s64) 1610 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 4 x s64>) = G_SPLAT_VECTOR [[EVEC]](s64) 1611 ; RV64-NEXT: $v8m4 = COPY [[SPLAT_VECTOR]](<vscale x 4 x s64>) 1612 ; RV64-NEXT: PseudoRET implicit $v8m4 1613 %b = shufflevector <vscale x 4 x i64> %a , <vscale x 4 x i64> poison, <vscale x 4 x i32> zeroinitializer 1614 ret <vscale x 4 x i64> %b 1615} 1616 1617define <vscale x 8 x i64> @shufflevector_nxv8i64_0() { 1618 ; RV32-LABEL: name: shufflevector_nxv8i64_0 1619 ; RV32: bb.1 (%ir-block.0): 1620 ; RV32-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 8 x s64>) = G_IMPLICIT_DEF 1621 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 1622 ; RV32-NEXT: [[EVEC:%[0-9]+]]:_(s64) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 8 x s64>), [[C]](s32) 1623 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 8 x s64>) = G_SPLAT_VECTOR [[EVEC]](s64) 1624 ; RV32-NEXT: $v8m8 = COPY [[SPLAT_VECTOR]](<vscale x 8 x s64>) 1625 ; RV32-NEXT: PseudoRET implicit $v8m8 1626 ; 1627 ; RV64-LABEL: name: shufflevector_nxv8i64_0 1628 ; RV64: bb.1 (%ir-block.0): 1629 ; RV64-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 8 x s64>) = G_IMPLICIT_DEF 1630 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 1631 ; RV64-NEXT: [[EVEC:%[0-9]+]]:_(s64) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 8 x s64>), [[C]](s64) 1632 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 8 x s64>) = G_SPLAT_VECTOR [[EVEC]](s64) 1633 ; RV64-NEXT: $v8m8 = COPY [[SPLAT_VECTOR]](<vscale x 8 x s64>) 1634 ; RV64-NEXT: PseudoRET implicit $v8m8 1635 %a = shufflevector <vscale x 8 x i64> poison, <vscale x 8 x i64> poison, <vscale x 8 x i32> poison 1636 ret <vscale x 8 x i64> %a 1637} 1638 1639define <vscale x 8 x i64> @shufflevector_nxv8i64_1() { 1640 ; RV32-LABEL: name: shufflevector_nxv8i64_1 1641 ; RV32: bb.1 (%ir-block.0): 1642 ; RV32-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 8 x s64>) = G_IMPLICIT_DEF 1643 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 1644 ; RV32-NEXT: [[EVEC:%[0-9]+]]:_(s64) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 8 x s64>), [[C]](s32) 1645 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 8 x s64>) = G_SPLAT_VECTOR [[EVEC]](s64) 1646 ; RV32-NEXT: $v8m8 = COPY [[SPLAT_VECTOR]](<vscale x 8 x s64>) 1647 ; RV32-NEXT: PseudoRET implicit $v8m8 1648 ; 1649 ; RV64-LABEL: name: shufflevector_nxv8i64_1 1650 ; RV64: bb.1 (%ir-block.0): 1651 ; RV64-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 8 x s64>) = G_IMPLICIT_DEF 1652 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 1653 ; RV64-NEXT: [[EVEC:%[0-9]+]]:_(s64) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 8 x s64>), [[C]](s64) 1654 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 8 x s64>) = G_SPLAT_VECTOR [[EVEC]](s64) 1655 ; RV64-NEXT: $v8m8 = COPY [[SPLAT_VECTOR]](<vscale x 8 x s64>) 1656 ; RV64-NEXT: PseudoRET implicit $v8m8 1657 %a = shufflevector <vscale x 8 x i64> undef, <vscale x 8 x i64> undef, <vscale x 8 x i32> undef 1658 ret <vscale x 8 x i64> %a 1659} 1660 1661define <vscale x 8 x i64> @shufflevector_nxv8i64_2(<vscale x 8 x i64> %a) { 1662 ; RV32-LABEL: name: shufflevector_nxv8i64_2 1663 ; RV32: bb.1 (%ir-block.0): 1664 ; RV32-NEXT: liveins: $v8m8 1665 ; RV32-NEXT: {{ $}} 1666 ; RV32-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 8 x s64>) = COPY $v8m8 1667 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 1668 ; RV32-NEXT: [[EVEC:%[0-9]+]]:_(s64) = G_EXTRACT_VECTOR_ELT [[COPY]](<vscale x 8 x s64>), [[C]](s32) 1669 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 8 x s64>) = G_SPLAT_VECTOR [[EVEC]](s64) 1670 ; RV32-NEXT: $v8m8 = COPY [[SPLAT_VECTOR]](<vscale x 8 x s64>) 1671 ; RV32-NEXT: PseudoRET implicit $v8m8 1672 ; 1673 ; RV64-LABEL: name: shufflevector_nxv8i64_2 1674 ; RV64: bb.1 (%ir-block.0): 1675 ; RV64-NEXT: liveins: $v8m8 1676 ; RV64-NEXT: {{ $}} 1677 ; RV64-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 8 x s64>) = COPY $v8m8 1678 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 1679 ; RV64-NEXT: [[EVEC:%[0-9]+]]:_(s64) = G_EXTRACT_VECTOR_ELT [[COPY]](<vscale x 8 x s64>), [[C]](s64) 1680 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 8 x s64>) = G_SPLAT_VECTOR [[EVEC]](s64) 1681 ; RV64-NEXT: $v8m8 = COPY [[SPLAT_VECTOR]](<vscale x 8 x s64>) 1682 ; RV64-NEXT: PseudoRET implicit $v8m8 1683 %b = shufflevector <vscale x 8 x i64> %a , <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer 1684 ret <vscale x 8 x i64> %b 1685} 1686 1687define <vscale x 16 x i64> @shufflevector_nxv16i64_0() { 1688 ; RV32-LABEL: name: shufflevector_nxv16i64_0 1689 ; RV32: bb.1 (%ir-block.0): 1690 ; RV32-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 16 x s64>) = G_IMPLICIT_DEF 1691 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 1692 ; RV32-NEXT: [[EVEC:%[0-9]+]]:_(s64) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 16 x s64>), [[C]](s32) 1693 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 16 x s64>) = G_SPLAT_VECTOR [[EVEC]](s64) 1694 ; RV32-NEXT: [[UV:%[0-9]+]]:_(<vscale x 8 x s64>), [[UV1:%[0-9]+]]:_(<vscale x 8 x s64>) = G_UNMERGE_VALUES [[SPLAT_VECTOR]](<vscale x 16 x s64>) 1695 ; RV32-NEXT: $v8m8 = COPY [[UV]](<vscale x 8 x s64>) 1696 ; RV32-NEXT: $v16m8 = COPY [[UV1]](<vscale x 8 x s64>) 1697 ; RV32-NEXT: PseudoRET implicit $v8m8, implicit $v16m8 1698 ; 1699 ; RV64-LABEL: name: shufflevector_nxv16i64_0 1700 ; RV64: bb.1 (%ir-block.0): 1701 ; RV64-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 16 x s64>) = G_IMPLICIT_DEF 1702 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 1703 ; RV64-NEXT: [[EVEC:%[0-9]+]]:_(s64) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 16 x s64>), [[C]](s64) 1704 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 16 x s64>) = G_SPLAT_VECTOR [[EVEC]](s64) 1705 ; RV64-NEXT: [[UV:%[0-9]+]]:_(<vscale x 8 x s64>), [[UV1:%[0-9]+]]:_(<vscale x 8 x s64>) = G_UNMERGE_VALUES [[SPLAT_VECTOR]](<vscale x 16 x s64>) 1706 ; RV64-NEXT: $v8m8 = COPY [[UV]](<vscale x 8 x s64>) 1707 ; RV64-NEXT: $v16m8 = COPY [[UV1]](<vscale x 8 x s64>) 1708 ; RV64-NEXT: PseudoRET implicit $v8m8, implicit $v16m8 1709 %a = shufflevector <vscale x 16 x i64> poison, <vscale x 16 x i64> poison, <vscale x 16 x i32> poison 1710 ret <vscale x 16 x i64> %a 1711} 1712 1713define <vscale x 16 x i64> @shufflevector_nxv16i64_1() { 1714 ; RV32-LABEL: name: shufflevector_nxv16i64_1 1715 ; RV32: bb.1 (%ir-block.0): 1716 ; RV32-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 16 x s64>) = G_IMPLICIT_DEF 1717 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 1718 ; RV32-NEXT: [[EVEC:%[0-9]+]]:_(s64) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 16 x s64>), [[C]](s32) 1719 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 16 x s64>) = G_SPLAT_VECTOR [[EVEC]](s64) 1720 ; RV32-NEXT: [[UV:%[0-9]+]]:_(<vscale x 8 x s64>), [[UV1:%[0-9]+]]:_(<vscale x 8 x s64>) = G_UNMERGE_VALUES [[SPLAT_VECTOR]](<vscale x 16 x s64>) 1721 ; RV32-NEXT: $v8m8 = COPY [[UV]](<vscale x 8 x s64>) 1722 ; RV32-NEXT: $v16m8 = COPY [[UV1]](<vscale x 8 x s64>) 1723 ; RV32-NEXT: PseudoRET implicit $v8m8, implicit $v16m8 1724 ; 1725 ; RV64-LABEL: name: shufflevector_nxv16i64_1 1726 ; RV64: bb.1 (%ir-block.0): 1727 ; RV64-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 16 x s64>) = G_IMPLICIT_DEF 1728 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 1729 ; RV64-NEXT: [[EVEC:%[0-9]+]]:_(s64) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 16 x s64>), [[C]](s64) 1730 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 16 x s64>) = G_SPLAT_VECTOR [[EVEC]](s64) 1731 ; RV64-NEXT: [[UV:%[0-9]+]]:_(<vscale x 8 x s64>), [[UV1:%[0-9]+]]:_(<vscale x 8 x s64>) = G_UNMERGE_VALUES [[SPLAT_VECTOR]](<vscale x 16 x s64>) 1732 ; RV64-NEXT: $v8m8 = COPY [[UV]](<vscale x 8 x s64>) 1733 ; RV64-NEXT: $v16m8 = COPY [[UV1]](<vscale x 8 x s64>) 1734 ; RV64-NEXT: PseudoRET implicit $v8m8, implicit $v16m8 1735 %a = shufflevector <vscale x 16 x i64> undef, <vscale x 16 x i64> undef, <vscale x 16 x i32> undef 1736 ret <vscale x 16 x i64> %a 1737} 1738 1739define <vscale x 16 x i64> @shufflevector_nxv16i64_2(<vscale x 16 x i64> %a) { 1740 ; RV32-LABEL: name: shufflevector_nxv16i64_2 1741 ; RV32: bb.1 (%ir-block.0): 1742 ; RV32-NEXT: liveins: $v8m8, $v16m8 1743 ; RV32-NEXT: {{ $}} 1744 ; RV32-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 8 x s64>) = COPY $v8m8 1745 ; RV32-NEXT: [[COPY1:%[0-9]+]]:_(<vscale x 8 x s64>) = COPY $v16m8 1746 ; RV32-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<vscale x 16 x s64>) = G_CONCAT_VECTORS [[COPY]](<vscale x 8 x s64>), [[COPY1]](<vscale x 8 x s64>) 1747 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 1748 ; RV32-NEXT: [[EVEC:%[0-9]+]]:_(s64) = G_EXTRACT_VECTOR_ELT [[CONCAT_VECTORS]](<vscale x 16 x s64>), [[C]](s32) 1749 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 16 x s64>) = G_SPLAT_VECTOR [[EVEC]](s64) 1750 ; RV32-NEXT: [[UV:%[0-9]+]]:_(<vscale x 8 x s64>), [[UV1:%[0-9]+]]:_(<vscale x 8 x s64>) = G_UNMERGE_VALUES [[SPLAT_VECTOR]](<vscale x 16 x s64>) 1751 ; RV32-NEXT: $v8m8 = COPY [[UV]](<vscale x 8 x s64>) 1752 ; RV32-NEXT: $v16m8 = COPY [[UV1]](<vscale x 8 x s64>) 1753 ; RV32-NEXT: PseudoRET implicit $v8m8, implicit $v16m8 1754 ; 1755 ; RV64-LABEL: name: shufflevector_nxv16i64_2 1756 ; RV64: bb.1 (%ir-block.0): 1757 ; RV64-NEXT: liveins: $v8m8, $v16m8 1758 ; RV64-NEXT: {{ $}} 1759 ; RV64-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 8 x s64>) = COPY $v8m8 1760 ; RV64-NEXT: [[COPY1:%[0-9]+]]:_(<vscale x 8 x s64>) = COPY $v16m8 1761 ; RV64-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<vscale x 16 x s64>) = G_CONCAT_VECTORS [[COPY]](<vscale x 8 x s64>), [[COPY1]](<vscale x 8 x s64>) 1762 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 1763 ; RV64-NEXT: [[EVEC:%[0-9]+]]:_(s64) = G_EXTRACT_VECTOR_ELT [[CONCAT_VECTORS]](<vscale x 16 x s64>), [[C]](s64) 1764 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 16 x s64>) = G_SPLAT_VECTOR [[EVEC]](s64) 1765 ; RV64-NEXT: [[UV:%[0-9]+]]:_(<vscale x 8 x s64>), [[UV1:%[0-9]+]]:_(<vscale x 8 x s64>) = G_UNMERGE_VALUES [[SPLAT_VECTOR]](<vscale x 16 x s64>) 1766 ; RV64-NEXT: $v8m8 = COPY [[UV]](<vscale x 8 x s64>) 1767 ; RV64-NEXT: $v16m8 = COPY [[UV1]](<vscale x 8 x s64>) 1768 ; RV64-NEXT: PseudoRET implicit $v8m8, implicit $v16m8 1769 %b = shufflevector <vscale x 16 x i64> %a , <vscale x 16 x i64> poison, <vscale x 16 x i32> zeroinitializer 1770 ret <vscale x 16 x i64> %b 1771} 1772 1773define <vscale x 1 x ptr> @shufflevector_nxv1p0_0() { 1774 ; RV32-LABEL: name: shufflevector_nxv1p0_0 1775 ; RV32: bb.1 (%ir-block.0): 1776 ; RV32-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 1 x p0>) = G_IMPLICIT_DEF 1777 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 1778 ; RV32-NEXT: [[EVEC:%[0-9]+]]:_(p0) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 1 x p0>), [[C]](s32) 1779 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 1 x p0>) = G_SPLAT_VECTOR [[EVEC]](p0) 1780 ; RV32-NEXT: $v8 = COPY [[SPLAT_VECTOR]](<vscale x 1 x p0>) 1781 ; RV32-NEXT: PseudoRET implicit $v8 1782 ; 1783 ; RV64-LABEL: name: shufflevector_nxv1p0_0 1784 ; RV64: bb.1 (%ir-block.0): 1785 ; RV64-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 1 x p0>) = G_IMPLICIT_DEF 1786 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 1787 ; RV64-NEXT: [[EVEC:%[0-9]+]]:_(p0) = G_EXTRACT_VECTOR_ELT [[DEF]](<vscale x 1 x p0>), [[C]](s64) 1788 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 1 x p0>) = G_SPLAT_VECTOR [[EVEC]](p0) 1789 ; RV64-NEXT: $v8 = COPY [[SPLAT_VECTOR]](<vscale x 1 x p0>) 1790 ; RV64-NEXT: PseudoRET implicit $v8 1791 %a = shufflevector <vscale x 1 x ptr> poison, <vscale x 1 x ptr> poison, <vscale x 1 x i32> zeroinitializer 1792 ret <vscale x 1 x ptr> %a 1793} 1794