1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=riscv32 -global-isel -verify-machineinstrs -O0 < %s \ 3; RUN: | FileCheck %s --check-prefixes=RV32,RV32-O0 4; RUN: llc -mtriple=riscv64 -global-isel -verify-machineinstrs -O0 < %s \ 5; RUN: | FileCheck %s --check-prefixes=RV64,RV64-O0 6; RUN: llc -mtriple=riscv32 -global-isel -verify-machineinstrs < %s \ 7; RUN: | FileCheck %s --check-prefixes=RV32,RV32-OPT 8; RUN: llc -mtriple=riscv64 -global-isel -verify-machineinstrs < %s \ 9; RUN: | FileCheck %s --check-prefixes=RV64,RV64-OPT 10 11define i32 @constant_to_rhs(i32 %x) { 12; RV32-O0-LABEL: constant_to_rhs: 13; RV32-O0: # %bb.0: 14; RV32-O0-NEXT: mv a1, a0 15; RV32-O0-NEXT: li a0, 1 16; RV32-O0-NEXT: add a0, a0, a1 17; RV32-O0-NEXT: ret 18; 19; RV64-O0-LABEL: constant_to_rhs: 20; RV64-O0: # %bb.0: 21; RV64-O0-NEXT: mv a1, a0 22; RV64-O0-NEXT: li a0, 1 23; RV64-O0-NEXT: add a0, a0, a1 24; RV64-O0-NEXT: sext.w a0, a0 25; RV64-O0-NEXT: ret 26; 27; RV32-OPT-LABEL: constant_to_rhs: 28; RV32-OPT: # %bb.0: 29; RV32-OPT-NEXT: addi a0, a0, 1 30; RV32-OPT-NEXT: ret 31; 32; RV64-OPT-LABEL: constant_to_rhs: 33; RV64-OPT: # %bb.0: 34; RV64-OPT-NEXT: addiw a0, a0, 1 35; RV64-OPT-NEXT: ret 36 %a = add i32 1, %x 37 ret i32 %a 38} 39 40define i32 @mul_to_shift(i32 %x) { 41; RV32-LABEL: mul_to_shift: 42; RV32: # %bb.0: 43; RV32-NEXT: slli a0, a0, 2 44; RV32-NEXT: ret 45; 46; RV64-LABEL: mul_to_shift: 47; RV64: # %bb.0: 48; RV64-NEXT: slli a0, a0, 2 49; RV64-NEXT: ret 50 %a = mul i32 %x, 4 51 ret i32 %a 52} 53