xref: /llvm-project/llvm/test/CodeGen/PowerPC/zext-bitperm.ll (revision 5403c59c608c08c8ecd4303763f08eb046eb5e4d)
1; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc-unknown-linux-gnu | FileCheck %s
2; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64-unknown-linux-gnu | FileCheck %s
3; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64le-unknown-linux-gnu | FileCheck %s
4
5; Test case for PPCTargetLowering::extendSubTreeForBitPermutation.
6; We expect mask and rotate are folded into a rlwinm instruction.
7
8define zeroext i32 @func(ptr %p, i32 zeroext %i) {
9; CHECK-LABEL: @func
10; CHECK: addi [[REG1:[0-9]+]], 4, 1
11; CHECK: rlwinm [[REG2:[0-9]+]], [[REG1]], 2, 22, 29
12; CHECK-NOT: sldi
13; CHECK: lwzx 3, 3, [[REG2]]
14; CHECK: blr
15entry:
16  %add = add i32 %i, 1
17  %and = and i32 %add, 255
18  %idxprom = zext i32 %and to i64
19  %arrayidx = getelementptr inbounds i32, ptr %p, i64 %idxprom
20  %0 = load i32, ptr %arrayidx, align 4
21  ret i32 %0
22}
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