xref: /llvm-project/llvm/test/CodeGen/PowerPC/vector-ldst.ll (revision b922a3621116b404d868af8b74cab25ab78555be) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
3; RUN:   -mcpu=pwr10 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \
4; RUN:   < %s | FileCheck %s --check-prefixes=CHECK,CHECK-P10
5; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
6; RUN:   -mcpu=pwr10 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \
7; RUN:   < %s | FileCheck %s --check-prefixes=CHECK,CHECK-P10
8; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
9; RUN:   -mcpu=pwr9 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \
10; RUN:   < %s | FileCheck %s --check-prefixes=CHECK,CHECK-P9
11; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
12; RUN:   -mcpu=pwr9 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \
13; RUN:   < %s | FileCheck %s --check-prefixes=CHECK,CHECK-P9
14; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
15; RUN:   -mcpu=pwr8 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \
16; RUN:   < %s | FileCheck %s --check-prefixes=CHECK-P8-LE
17; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
18; RUN:   -mcpu=pwr8 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \
19; RUN:   < %s | FileCheck %s --check-prefixes=CHECK-P8-BE
20
21; Function Attrs: norecurse nounwind readonly uwtable willreturn
22define dso_local <16 x i8> @ld_0_vector(i64 %ptr) {
23; CHECK-LABEL: ld_0_vector:
24; CHECK:       # %bb.0: # %entry
25; CHECK-NEXT:    lxv v2, 0(r3)
26; CHECK-NEXT:    blr
27;
28; CHECK-P8-LE-LABEL: ld_0_vector:
29; CHECK-P8-LE:       # %bb.0: # %entry
30; CHECK-P8-LE-NEXT:    lxvd2x vs0, 0, r3
31; CHECK-P8-LE-NEXT:    xxswapd v2, vs0
32; CHECK-P8-LE-NEXT:    blr
33;
34; CHECK-P8-BE-LABEL: ld_0_vector:
35; CHECK-P8-BE:       # %bb.0: # %entry
36; CHECK-P8-BE-NEXT:    lxvw4x v2, 0, r3
37; CHECK-P8-BE-NEXT:    blr
38entry:
39  %0 = inttoptr i64 %ptr to ptr
40  %1 = load <16 x i8>, ptr %0, align 16
41  ret <16 x i8> %1
42}
43
44; Function Attrs: norecurse nounwind readonly uwtable willreturn
45define dso_local <16 x i8> @ld_unalign16_vector(ptr nocapture readonly %ptr) {
46; CHECK-P10-LABEL: ld_unalign16_vector:
47; CHECK-P10:       # %bb.0: # %entry
48; CHECK-P10-NEXT:    plxv v2, 1(r3), 0
49; CHECK-P10-NEXT:    blr
50;
51; CHECK-P9-LABEL: ld_unalign16_vector:
52; CHECK-P9:       # %bb.0: # %entry
53; CHECK-P9-NEXT:    li r4, 1
54; CHECK-P9-NEXT:    lxvx v2, r3, r4
55; CHECK-P9-NEXT:    blr
56;
57; CHECK-P8-LE-LABEL: ld_unalign16_vector:
58; CHECK-P8-LE:       # %bb.0: # %entry
59; CHECK-P8-LE-NEXT:    addi r3, r3, 1
60; CHECK-P8-LE-NEXT:    lxvd2x vs0, 0, r3
61; CHECK-P8-LE-NEXT:    xxswapd v2, vs0
62; CHECK-P8-LE-NEXT:    blr
63;
64; CHECK-P8-BE-LABEL: ld_unalign16_vector:
65; CHECK-P8-BE:       # %bb.0: # %entry
66; CHECK-P8-BE-NEXT:    addi r3, r3, 1
67; CHECK-P8-BE-NEXT:    lxvw4x v2, 0, r3
68; CHECK-P8-BE-NEXT:    blr
69entry:
70  %add.ptr = getelementptr inbounds i8, ptr %ptr, i64 1
71  %0 = load <16 x i8>, ptr %add.ptr, align 16
72  ret <16 x i8> %0
73}
74
75; Function Attrs: norecurse nounwind readonly uwtable willreturn
76define dso_local <16 x i8> @ld_align16_vector(ptr nocapture readonly %ptr) {
77; CHECK-P10-LABEL: ld_align16_vector:
78; CHECK-P10:       # %bb.0: # %entry
79; CHECK-P10-NEXT:    plxv v2, 8(r3), 0
80; CHECK-P10-NEXT:    blr
81;
82; CHECK-P9-LABEL: ld_align16_vector:
83; CHECK-P9:       # %bb.0: # %entry
84; CHECK-P9-NEXT:    li r4, 8
85; CHECK-P9-NEXT:    lxvx v2, r3, r4
86; CHECK-P9-NEXT:    blr
87;
88; CHECK-P8-LE-LABEL: ld_align16_vector:
89; CHECK-P8-LE:       # %bb.0: # %entry
90; CHECK-P8-LE-NEXT:    addi r3, r3, 8
91; CHECK-P8-LE-NEXT:    lxvd2x vs0, 0, r3
92; CHECK-P8-LE-NEXT:    xxswapd v2, vs0
93; CHECK-P8-LE-NEXT:    blr
94;
95; CHECK-P8-BE-LABEL: ld_align16_vector:
96; CHECK-P8-BE:       # %bb.0: # %entry
97; CHECK-P8-BE-NEXT:    addi r3, r3, 8
98; CHECK-P8-BE-NEXT:    lxvw4x v2, 0, r3
99; CHECK-P8-BE-NEXT:    blr
100entry:
101  %add.ptr = getelementptr inbounds i8, ptr %ptr, i64 8
102  %0 = load <16 x i8>, ptr %add.ptr, align 16
103  ret <16 x i8> %0
104}
105
106; Function Attrs: norecurse nounwind readonly uwtable willreturn
107define dso_local <16 x i8> @ld_unalign32_vector(ptr nocapture readonly %ptr) {
108; CHECK-P10-LABEL: ld_unalign32_vector:
109; CHECK-P10:       # %bb.0: # %entry
110; CHECK-P10-NEXT:    plxv v2, 99999(r3), 0
111; CHECK-P10-NEXT:    blr
112;
113; CHECK-P9-LABEL: ld_unalign32_vector:
114; CHECK-P9:       # %bb.0: # %entry
115; CHECK-P9-NEXT:    lis r4, 1
116; CHECK-P9-NEXT:    ori r4, r4, 34463
117; CHECK-P9-NEXT:    lxvx v2, r3, r4
118; CHECK-P9-NEXT:    blr
119;
120; CHECK-P8-LE-LABEL: ld_unalign32_vector:
121; CHECK-P8-LE:       # %bb.0: # %entry
122; CHECK-P8-LE-NEXT:    lis r4, 1
123; CHECK-P8-LE-NEXT:    ori r4, r4, 34463
124; CHECK-P8-LE-NEXT:    lxvd2x vs0, r3, r4
125; CHECK-P8-LE-NEXT:    xxswapd v2, vs0
126; CHECK-P8-LE-NEXT:    blr
127;
128; CHECK-P8-BE-LABEL: ld_unalign32_vector:
129; CHECK-P8-BE:       # %bb.0: # %entry
130; CHECK-P8-BE-NEXT:    lis r4, 1
131; CHECK-P8-BE-NEXT:    ori r4, r4, 34463
132; CHECK-P8-BE-NEXT:    lxvw4x v2, r3, r4
133; CHECK-P8-BE-NEXT:    blr
134entry:
135  %add.ptr = getelementptr inbounds i8, ptr %ptr, i64 99999
136  %0 = load <16 x i8>, ptr %add.ptr, align 16
137  ret <16 x i8> %0
138}
139
140; Function Attrs: norecurse nounwind readonly uwtable willreturn
141define dso_local <16 x i8> @ld_align32_vector(ptr nocapture readonly %ptr) {
142; CHECK-P10-LABEL: ld_align32_vector:
143; CHECK-P10:       # %bb.0: # %entry
144; CHECK-P10-NEXT:    plxv v2, 99999000(r3), 0
145; CHECK-P10-NEXT:    blr
146;
147; CHECK-P9-LABEL: ld_align32_vector:
148; CHECK-P9:       # %bb.0: # %entry
149; CHECK-P9-NEXT:    lis r4, 1525
150; CHECK-P9-NEXT:    ori r4, r4, 56600
151; CHECK-P9-NEXT:    lxvx v2, r3, r4
152; CHECK-P9-NEXT:    blr
153;
154; CHECK-P8-LE-LABEL: ld_align32_vector:
155; CHECK-P8-LE:       # %bb.0: # %entry
156; CHECK-P8-LE-NEXT:    lis r4, 1525
157; CHECK-P8-LE-NEXT:    ori r4, r4, 56600
158; CHECK-P8-LE-NEXT:    lxvd2x vs0, r3, r4
159; CHECK-P8-LE-NEXT:    xxswapd v2, vs0
160; CHECK-P8-LE-NEXT:    blr
161;
162; CHECK-P8-BE-LABEL: ld_align32_vector:
163; CHECK-P8-BE:       # %bb.0: # %entry
164; CHECK-P8-BE-NEXT:    lis r4, 1525
165; CHECK-P8-BE-NEXT:    ori r4, r4, 56600
166; CHECK-P8-BE-NEXT:    lxvw4x v2, r3, r4
167; CHECK-P8-BE-NEXT:    blr
168entry:
169  %add.ptr = getelementptr inbounds i8, ptr %ptr, i64 99999000
170  %0 = load <16 x i8>, ptr %add.ptr, align 16
171  ret <16 x i8> %0
172}
173
174; Function Attrs: norecurse nounwind readonly uwtable willreturn
175define dso_local <16 x i8> @ld_unalign64_vector(ptr nocapture readonly %ptr) {
176; CHECK-P10-LABEL: ld_unalign64_vector:
177; CHECK-P10:       # %bb.0: # %entry
178; CHECK-P10-NEXT:    pli r4, 232
179; CHECK-P10-NEXT:    pli r5, 3567587329
180; CHECK-P10-NEXT:    rldimi r5, r4, 32, 0
181; CHECK-P10-NEXT:    lxvx v2, r3, r5
182; CHECK-P10-NEXT:    blr
183;
184; CHECK-P9-LABEL: ld_unalign64_vector:
185; CHECK-P9:       # %bb.0: # %entry
186; CHECK-P9-NEXT:    li r4, 29
187; CHECK-P9-NEXT:    rldic r4, r4, 35, 24
188; CHECK-P9-NEXT:    oris r4, r4, 54437
189; CHECK-P9-NEXT:    ori r4, r4, 4097
190; CHECK-P9-NEXT:    lxvx v2, r3, r4
191; CHECK-P9-NEXT:    blr
192;
193; CHECK-P8-LE-LABEL: ld_unalign64_vector:
194; CHECK-P8-LE:       # %bb.0: # %entry
195; CHECK-P8-LE-NEXT:    li r4, 29
196; CHECK-P8-LE-NEXT:    rldic r4, r4, 35, 24
197; CHECK-P8-LE-NEXT:    oris r4, r4, 54437
198; CHECK-P8-LE-NEXT:    ori r4, r4, 4097
199; CHECK-P8-LE-NEXT:    lxvd2x vs0, r3, r4
200; CHECK-P8-LE-NEXT:    xxswapd v2, vs0
201; CHECK-P8-LE-NEXT:    blr
202;
203; CHECK-P8-BE-LABEL: ld_unalign64_vector:
204; CHECK-P8-BE:       # %bb.0: # %entry
205; CHECK-P8-BE-NEXT:    li r4, 29
206; CHECK-P8-BE-NEXT:    rldic r4, r4, 35, 24
207; CHECK-P8-BE-NEXT:    oris r4, r4, 54437
208; CHECK-P8-BE-NEXT:    ori r4, r4, 4097
209; CHECK-P8-BE-NEXT:    lxvw4x v2, r3, r4
210; CHECK-P8-BE-NEXT:    blr
211entry:
212  %add.ptr = getelementptr inbounds i8, ptr %ptr, i64 1000000000001
213  %0 = load <16 x i8>, ptr %add.ptr, align 16
214  ret <16 x i8> %0
215}
216
217; Function Attrs: norecurse nounwind readonly uwtable willreturn
218define dso_local <16 x i8> @ld_align64_vector(ptr nocapture readonly %ptr) {
219; CHECK-P10-LABEL: ld_align64_vector:
220; CHECK-P10:       # %bb.0: # %entry
221; CHECK-P10-NEXT:    pli r4, 244140625
222; CHECK-P10-NEXT:    rldic r4, r4, 12, 24
223; CHECK-P10-NEXT:    lxvx v2, r3, r4
224; CHECK-P10-NEXT:    blr
225;
226; CHECK-P9-LABEL: ld_align64_vector:
227; CHECK-P9:       # %bb.0: # %entry
228; CHECK-P9-NEXT:    lis r4, 3725
229; CHECK-P9-NEXT:    ori r4, r4, 19025
230; CHECK-P9-NEXT:    rldic r4, r4, 12, 24
231; CHECK-P9-NEXT:    lxvx v2, r3, r4
232; CHECK-P9-NEXT:    blr
233;
234; CHECK-P8-LE-LABEL: ld_align64_vector:
235; CHECK-P8-LE:       # %bb.0: # %entry
236; CHECK-P8-LE-NEXT:    lis r4, 3725
237; CHECK-P8-LE-NEXT:    ori r4, r4, 19025
238; CHECK-P8-LE-NEXT:    rldic r4, r4, 12, 24
239; CHECK-P8-LE-NEXT:    lxvd2x vs0, r3, r4
240; CHECK-P8-LE-NEXT:    xxswapd v2, vs0
241; CHECK-P8-LE-NEXT:    blr
242;
243; CHECK-P8-BE-LABEL: ld_align64_vector:
244; CHECK-P8-BE:       # %bb.0: # %entry
245; CHECK-P8-BE-NEXT:    lis r4, 3725
246; CHECK-P8-BE-NEXT:    ori r4, r4, 19025
247; CHECK-P8-BE-NEXT:    rldic r4, r4, 12, 24
248; CHECK-P8-BE-NEXT:    lxvw4x v2, r3, r4
249; CHECK-P8-BE-NEXT:    blr
250entry:
251  %add.ptr = getelementptr inbounds i8, ptr %ptr, i64 1000000000000
252  %0 = load <16 x i8>, ptr %add.ptr, align 16
253  ret <16 x i8> %0
254}
255
256; Function Attrs: norecurse nounwind readonly uwtable willreturn
257define dso_local <16 x i8> @ld_reg_vector(ptr nocapture readonly %ptr, i64 %off) {
258; CHECK-LABEL: ld_reg_vector:
259; CHECK:       # %bb.0: # %entry
260; CHECK-NEXT:    lxvx v2, r3, r4
261; CHECK-NEXT:    blr
262;
263; CHECK-P8-LE-LABEL: ld_reg_vector:
264; CHECK-P8-LE:       # %bb.0: # %entry
265; CHECK-P8-LE-NEXT:    lxvd2x vs0, r3, r4
266; CHECK-P8-LE-NEXT:    xxswapd v2, vs0
267; CHECK-P8-LE-NEXT:    blr
268;
269; CHECK-P8-BE-LABEL: ld_reg_vector:
270; CHECK-P8-BE:       # %bb.0: # %entry
271; CHECK-P8-BE-NEXT:    lxvw4x v2, r3, r4
272; CHECK-P8-BE-NEXT:    blr
273entry:
274  %add.ptr = getelementptr inbounds i8, ptr %ptr, i64 %off
275  %0 = load <16 x i8>, ptr %add.ptr, align 16
276  ret <16 x i8> %0
277}
278
279; Function Attrs: norecurse nounwind readonly uwtable willreturn
280define dso_local <16 x i8> @ld_or_vector(i64 %ptr, i8 zeroext %off) {
281; CHECK-LABEL: ld_or_vector:
282; CHECK:       # %bb.0: # %entry
283; CHECK-NEXT:    or r3, r4, r3
284; CHECK-NEXT:    lxv v2, 0(r3)
285; CHECK-NEXT:    blr
286;
287; CHECK-P8-LE-LABEL: ld_or_vector:
288; CHECK-P8-LE:       # %bb.0: # %entry
289; CHECK-P8-LE-NEXT:    or r3, r4, r3
290; CHECK-P8-LE-NEXT:    lxvd2x vs0, 0, r3
291; CHECK-P8-LE-NEXT:    xxswapd v2, vs0
292; CHECK-P8-LE-NEXT:    blr
293;
294; CHECK-P8-BE-LABEL: ld_or_vector:
295; CHECK-P8-BE:       # %bb.0: # %entry
296; CHECK-P8-BE-NEXT:    or r3, r4, r3
297; CHECK-P8-BE-NEXT:    lxvw4x v2, 0, r3
298; CHECK-P8-BE-NEXT:    blr
299entry:
300  %conv = zext i8 %off to i64
301  %or = or i64 %conv, %ptr
302  %0 = inttoptr i64 %or to ptr
303  %1 = load <16 x i8>, ptr %0, align 16
304  ret <16 x i8> %1
305}
306
307; Function Attrs: norecurse nounwind readonly uwtable willreturn
308define dso_local <16 x i8> @ld_or2_vector(i64 %ptr, i8 zeroext %off) {
309; CHECK-LABEL: ld_or2_vector:
310; CHECK:       # %bb.0: # %entry
311; CHECK-NEXT:    rldicr r3, r3, 0, 51
312; CHECK-NEXT:    lxvx v2, r3, r4
313; CHECK-NEXT:    blr
314;
315; CHECK-P8-LE-LABEL: ld_or2_vector:
316; CHECK-P8-LE:       # %bb.0: # %entry
317; CHECK-P8-LE-NEXT:    rldicr r3, r3, 0, 51
318; CHECK-P8-LE-NEXT:    lxvd2x vs0, r3, r4
319; CHECK-P8-LE-NEXT:    xxswapd v2, vs0
320; CHECK-P8-LE-NEXT:    blr
321;
322; CHECK-P8-BE-LABEL: ld_or2_vector:
323; CHECK-P8-BE:       # %bb.0: # %entry
324; CHECK-P8-BE-NEXT:    rldicr r3, r3, 0, 51
325; CHECK-P8-BE-NEXT:    lxvw4x v2, r3, r4
326; CHECK-P8-BE-NEXT:    blr
327entry:
328  %and = and i64 %ptr, -4096
329  %conv = zext i8 %off to i64
330  %or = or i64 %and, %conv
331  %0 = inttoptr i64 %or to ptr
332  %1 = load <16 x i8>, ptr %0, align 16
333  ret <16 x i8> %1
334}
335
336; Function Attrs: norecurse nounwind readonly uwtable willreturn
337define dso_local <16 x i8> @ld_not_disjoint16_vector(i64 %ptr) {
338; CHECK-LABEL: ld_not_disjoint16_vector:
339; CHECK:       # %bb.0: # %entry
340; CHECK-NEXT:    ori r3, r3, 6
341; CHECK-NEXT:    lxv v2, 0(r3)
342; CHECK-NEXT:    blr
343;
344; CHECK-P8-LE-LABEL: ld_not_disjoint16_vector:
345; CHECK-P8-LE:       # %bb.0: # %entry
346; CHECK-P8-LE-NEXT:    ori r3, r3, 6
347; CHECK-P8-LE-NEXT:    lxvd2x vs0, 0, r3
348; CHECK-P8-LE-NEXT:    xxswapd v2, vs0
349; CHECK-P8-LE-NEXT:    blr
350;
351; CHECK-P8-BE-LABEL: ld_not_disjoint16_vector:
352; CHECK-P8-BE:       # %bb.0: # %entry
353; CHECK-P8-BE-NEXT:    ori r3, r3, 6
354; CHECK-P8-BE-NEXT:    lxvw4x v2, 0, r3
355; CHECK-P8-BE-NEXT:    blr
356entry:
357  %or = or i64 %ptr, 6
358  %0 = inttoptr i64 %or to ptr
359  %1 = load <16 x i8>, ptr %0, align 16
360  ret <16 x i8> %1
361}
362
363; Function Attrs: norecurse nounwind readonly uwtable willreturn
364define dso_local <16 x i8> @ld_disjoint_unalign16_vector(i64 %ptr) {
365; CHECK-P10-LABEL: ld_disjoint_unalign16_vector:
366; CHECK-P10:       # %bb.0: # %entry
367; CHECK-P10-NEXT:    rldicr r3, r3, 0, 51
368; CHECK-P10-NEXT:    plxv v2, 6(r3), 0
369; CHECK-P10-NEXT:    blr
370;
371; CHECK-P9-LABEL: ld_disjoint_unalign16_vector:
372; CHECK-P9:       # %bb.0: # %entry
373; CHECK-P9-NEXT:    rldicr r3, r3, 0, 51
374; CHECK-P9-NEXT:    li r4, 6
375; CHECK-P9-NEXT:    lxvx v2, r3, r4
376; CHECK-P9-NEXT:    blr
377;
378; CHECK-P8-LE-LABEL: ld_disjoint_unalign16_vector:
379; CHECK-P8-LE:       # %bb.0: # %entry
380; CHECK-P8-LE-NEXT:    rldicr r3, r3, 0, 51
381; CHECK-P8-LE-NEXT:    ori r3, r3, 6
382; CHECK-P8-LE-NEXT:    lxvd2x vs0, 0, r3
383; CHECK-P8-LE-NEXT:    xxswapd v2, vs0
384; CHECK-P8-LE-NEXT:    blr
385;
386; CHECK-P8-BE-LABEL: ld_disjoint_unalign16_vector:
387; CHECK-P8-BE:       # %bb.0: # %entry
388; CHECK-P8-BE-NEXT:    rldicr r3, r3, 0, 51
389; CHECK-P8-BE-NEXT:    ori r3, r3, 6
390; CHECK-P8-BE-NEXT:    lxvw4x v2, 0, r3
391; CHECK-P8-BE-NEXT:    blr
392entry:
393  %and = and i64 %ptr, -4096
394  %or = or i64 %and, 6
395  %0 = inttoptr i64 %or to ptr
396  %1 = load <16 x i8>, ptr %0, align 16
397  ret <16 x i8> %1
398}
399
400; Function Attrs: norecurse nounwind readonly uwtable willreturn
401define dso_local <16 x i8> @ld_disjoint_align16_vector(i64 %ptr) {
402; CHECK-P10-LABEL: ld_disjoint_align16_vector:
403; CHECK-P10:       # %bb.0: # %entry
404; CHECK-P10-NEXT:    rldicr r3, r3, 0, 51
405; CHECK-P10-NEXT:    plxv v2, 24(r3), 0
406; CHECK-P10-NEXT:    blr
407;
408; CHECK-P9-LABEL: ld_disjoint_align16_vector:
409; CHECK-P9:       # %bb.0: # %entry
410; CHECK-P9-NEXT:    rldicr r3, r3, 0, 51
411; CHECK-P9-NEXT:    li r4, 24
412; CHECK-P9-NEXT:    lxvx v2, r3, r4
413; CHECK-P9-NEXT:    blr
414;
415; CHECK-P8-LE-LABEL: ld_disjoint_align16_vector:
416; CHECK-P8-LE:       # %bb.0: # %entry
417; CHECK-P8-LE-NEXT:    rldicr r3, r3, 0, 51
418; CHECK-P8-LE-NEXT:    ori r3, r3, 24
419; CHECK-P8-LE-NEXT:    lxvd2x vs0, 0, r3
420; CHECK-P8-LE-NEXT:    xxswapd v2, vs0
421; CHECK-P8-LE-NEXT:    blr
422;
423; CHECK-P8-BE-LABEL: ld_disjoint_align16_vector:
424; CHECK-P8-BE:       # %bb.0: # %entry
425; CHECK-P8-BE-NEXT:    rldicr r3, r3, 0, 51
426; CHECK-P8-BE-NEXT:    ori r3, r3, 24
427; CHECK-P8-BE-NEXT:    lxvw4x v2, 0, r3
428; CHECK-P8-BE-NEXT:    blr
429entry:
430  %and = and i64 %ptr, -4096
431  %or = or i64 %and, 24
432  %0 = inttoptr i64 %or to ptr
433  %1 = load <16 x i8>, ptr %0, align 16
434  ret <16 x i8> %1
435}
436
437; Function Attrs: norecurse nounwind readonly uwtable willreturn
438define dso_local <16 x i8> @ld_not_disjoint32_vector(i64 %ptr) {
439; CHECK-LABEL: ld_not_disjoint32_vector:
440; CHECK:       # %bb.0: # %entry
441; CHECK-NEXT:    ori r3, r3, 34463
442; CHECK-NEXT:    oris r3, r3, 1
443; CHECK-NEXT:    lxv v2, 0(r3)
444; CHECK-NEXT:    blr
445;
446; CHECK-P8-LE-LABEL: ld_not_disjoint32_vector:
447; CHECK-P8-LE:       # %bb.0: # %entry
448; CHECK-P8-LE-NEXT:    ori r3, r3, 34463
449; CHECK-P8-LE-NEXT:    oris r3, r3, 1
450; CHECK-P8-LE-NEXT:    lxvd2x vs0, 0, r3
451; CHECK-P8-LE-NEXT:    xxswapd v2, vs0
452; CHECK-P8-LE-NEXT:    blr
453;
454; CHECK-P8-BE-LABEL: ld_not_disjoint32_vector:
455; CHECK-P8-BE:       # %bb.0: # %entry
456; CHECK-P8-BE-NEXT:    ori r3, r3, 34463
457; CHECK-P8-BE-NEXT:    oris r3, r3, 1
458; CHECK-P8-BE-NEXT:    lxvw4x v2, 0, r3
459; CHECK-P8-BE-NEXT:    blr
460entry:
461  %or = or i64 %ptr, 99999
462  %0 = inttoptr i64 %or to ptr
463  %1 = load <16 x i8>, ptr %0, align 16
464  ret <16 x i8> %1
465}
466
467; Function Attrs: norecurse nounwind readonly uwtable willreturn
468define dso_local <16 x i8> @ld_disjoint_unalign32_vector(i64 %ptr) {
469; CHECK-P10-LABEL: ld_disjoint_unalign32_vector:
470; CHECK-P10:       # %bb.0: # %entry
471; CHECK-P10-NEXT:    rldicr r3, r3, 0, 43
472; CHECK-P10-NEXT:    plxv v2, 99999(r3), 0
473; CHECK-P10-NEXT:    blr
474;
475; CHECK-P9-LABEL: ld_disjoint_unalign32_vector:
476; CHECK-P9:       # %bb.0: # %entry
477; CHECK-P9-NEXT:    lis r4, 1
478; CHECK-P9-NEXT:    rldicr r3, r3, 0, 43
479; CHECK-P9-NEXT:    ori r4, r4, 34463
480; CHECK-P9-NEXT:    lxvx v2, r3, r4
481; CHECK-P9-NEXT:    blr
482;
483; CHECK-P8-LE-LABEL: ld_disjoint_unalign32_vector:
484; CHECK-P8-LE:       # %bb.0: # %entry
485; CHECK-P8-LE-NEXT:    lis r4, 1
486; CHECK-P8-LE-NEXT:    rldicr r3, r3, 0, 43
487; CHECK-P8-LE-NEXT:    ori r4, r4, 34463
488; CHECK-P8-LE-NEXT:    lxvd2x vs0, r3, r4
489; CHECK-P8-LE-NEXT:    xxswapd v2, vs0
490; CHECK-P8-LE-NEXT:    blr
491;
492; CHECK-P8-BE-LABEL: ld_disjoint_unalign32_vector:
493; CHECK-P8-BE:       # %bb.0: # %entry
494; CHECK-P8-BE-NEXT:    lis r4, 1
495; CHECK-P8-BE-NEXT:    rldicr r3, r3, 0, 43
496; CHECK-P8-BE-NEXT:    ori r4, r4, 34463
497; CHECK-P8-BE-NEXT:    lxvw4x v2, r3, r4
498; CHECK-P8-BE-NEXT:    blr
499entry:
500  %and = and i64 %ptr, -1048576
501  %or = or i64 %and, 99999
502  %0 = inttoptr i64 %or to ptr
503  %1 = load <16 x i8>, ptr %0, align 16
504  ret <16 x i8> %1
505}
506
507; Function Attrs: norecurse nounwind readonly uwtable willreturn
508define dso_local <16 x i8> @ld_disjoint_align32_vector(i64 %ptr) {
509; CHECK-P10-LABEL: ld_disjoint_align32_vector:
510; CHECK-P10:       # %bb.0: # %entry
511; CHECK-P10-NEXT:    lis r4, -15264
512; CHECK-P10-NEXT:    and r3, r3, r4
513; CHECK-P10-NEXT:    plxv v2, 999990000(r3), 0
514; CHECK-P10-NEXT:    blr
515;
516; CHECK-P9-LABEL: ld_disjoint_align32_vector:
517; CHECK-P9:       # %bb.0: # %entry
518; CHECK-P9-NEXT:    lis r4, -15264
519; CHECK-P9-NEXT:    and r3, r3, r4
520; CHECK-P9-NEXT:    lis r4, 15258
521; CHECK-P9-NEXT:    ori r4, r4, 41712
522; CHECK-P9-NEXT:    lxvx v2, r3, r4
523; CHECK-P9-NEXT:    blr
524;
525; CHECK-P8-LE-LABEL: ld_disjoint_align32_vector:
526; CHECK-P8-LE:       # %bb.0: # %entry
527; CHECK-P8-LE-NEXT:    lis r4, -15264
528; CHECK-P8-LE-NEXT:    and r3, r3, r4
529; CHECK-P8-LE-NEXT:    lis r4, 15258
530; CHECK-P8-LE-NEXT:    ori r4, r4, 41712
531; CHECK-P8-LE-NEXT:    lxvd2x vs0, r3, r4
532; CHECK-P8-LE-NEXT:    xxswapd v2, vs0
533; CHECK-P8-LE-NEXT:    blr
534;
535; CHECK-P8-BE-LABEL: ld_disjoint_align32_vector:
536; CHECK-P8-BE:       # %bb.0: # %entry
537; CHECK-P8-BE-NEXT:    lis r4, -15264
538; CHECK-P8-BE-NEXT:    and r3, r3, r4
539; CHECK-P8-BE-NEXT:    lis r4, 15258
540; CHECK-P8-BE-NEXT:    ori r4, r4, 41712
541; CHECK-P8-BE-NEXT:    lxvw4x v2, r3, r4
542; CHECK-P8-BE-NEXT:    blr
543entry:
544  %and = and i64 %ptr, -1000341504
545  %or = or i64 %and, 999990000
546  %0 = inttoptr i64 %or to ptr
547  %1 = load <16 x i8>, ptr %0, align 16
548  ret <16 x i8> %1
549}
550
551; Function Attrs: norecurse nounwind readonly uwtable willreturn
552define dso_local <16 x i8> @ld_not_disjoint64_vector(i64 %ptr) {
553; CHECK-P10-LABEL: ld_not_disjoint64_vector:
554; CHECK-P10:       # %bb.0: # %entry
555; CHECK-P10-NEXT:    pli r4, 232
556; CHECK-P10-NEXT:    pli r5, 3567587329
557; CHECK-P10-NEXT:    rldimi r5, r4, 32, 0
558; CHECK-P10-NEXT:    or r3, r3, r5
559; CHECK-P10-NEXT:    lxv v2, 0(r3)
560; CHECK-P10-NEXT:    blr
561;
562; CHECK-P9-LABEL: ld_not_disjoint64_vector:
563; CHECK-P9:       # %bb.0: # %entry
564; CHECK-P9-NEXT:    li r4, 29
565; CHECK-P9-NEXT:    rldic r4, r4, 35, 24
566; CHECK-P9-NEXT:    oris r4, r4, 54437
567; CHECK-P9-NEXT:    ori r4, r4, 4097
568; CHECK-P9-NEXT:    or r3, r3, r4
569; CHECK-P9-NEXT:    lxv v2, 0(r3)
570; CHECK-P9-NEXT:    blr
571;
572; CHECK-P8-LE-LABEL: ld_not_disjoint64_vector:
573; CHECK-P8-LE:       # %bb.0: # %entry
574; CHECK-P8-LE-NEXT:    li r4, 29
575; CHECK-P8-LE-NEXT:    rldic r4, r4, 35, 24
576; CHECK-P8-LE-NEXT:    oris r4, r4, 54437
577; CHECK-P8-LE-NEXT:    ori r4, r4, 4097
578; CHECK-P8-LE-NEXT:    or r3, r3, r4
579; CHECK-P8-LE-NEXT:    lxvd2x vs0, 0, r3
580; CHECK-P8-LE-NEXT:    xxswapd v2, vs0
581; CHECK-P8-LE-NEXT:    blr
582;
583; CHECK-P8-BE-LABEL: ld_not_disjoint64_vector:
584; CHECK-P8-BE:       # %bb.0: # %entry
585; CHECK-P8-BE-NEXT:    li r4, 29
586; CHECK-P8-BE-NEXT:    rldic r4, r4, 35, 24
587; CHECK-P8-BE-NEXT:    oris r4, r4, 54437
588; CHECK-P8-BE-NEXT:    ori r4, r4, 4097
589; CHECK-P8-BE-NEXT:    or r3, r3, r4
590; CHECK-P8-BE-NEXT:    lxvw4x v2, 0, r3
591; CHECK-P8-BE-NEXT:    blr
592entry:
593  %or = or i64 %ptr, 1000000000001
594  %0 = inttoptr i64 %or to ptr
595  %1 = load <16 x i8>, ptr %0, align 16
596  ret <16 x i8> %1
597}
598
599; Function Attrs: norecurse nounwind readonly uwtable willreturn
600define dso_local <16 x i8> @ld_disjoint_unalign64_vector(i64 %ptr) {
601; CHECK-P10-LABEL: ld_disjoint_unalign64_vector:
602; CHECK-P10:       # %bb.0: # %entry
603; CHECK-P10-NEXT:    pli r4, 232
604; CHECK-P10-NEXT:    pli r5, 3567587329
605; CHECK-P10-NEXT:    rldicr r3, r3, 0, 23
606; CHECK-P10-NEXT:    rldimi r5, r4, 32, 0
607; CHECK-P10-NEXT:    lxvx v2, r3, r5
608; CHECK-P10-NEXT:    blr
609;
610; CHECK-P9-LABEL: ld_disjoint_unalign64_vector:
611; CHECK-P9:       # %bb.0: # %entry
612; CHECK-P9-NEXT:    li r4, 29
613; CHECK-P9-NEXT:    rldicr r3, r3, 0, 23
614; CHECK-P9-NEXT:    rldic r4, r4, 35, 24
615; CHECK-P9-NEXT:    oris r4, r4, 54437
616; CHECK-P9-NEXT:    ori r4, r4, 4097
617; CHECK-P9-NEXT:    lxvx v2, r3, r4
618; CHECK-P9-NEXT:    blr
619;
620; CHECK-P8-LE-LABEL: ld_disjoint_unalign64_vector:
621; CHECK-P8-LE:       # %bb.0: # %entry
622; CHECK-P8-LE-NEXT:    li r4, 29
623; CHECK-P8-LE-NEXT:    rldicr r3, r3, 0, 23
624; CHECK-P8-LE-NEXT:    rldic r4, r4, 35, 24
625; CHECK-P8-LE-NEXT:    oris r4, r4, 54437
626; CHECK-P8-LE-NEXT:    ori r4, r4, 4097
627; CHECK-P8-LE-NEXT:    lxvd2x vs0, r3, r4
628; CHECK-P8-LE-NEXT:    xxswapd v2, vs0
629; CHECK-P8-LE-NEXT:    blr
630;
631; CHECK-P8-BE-LABEL: ld_disjoint_unalign64_vector:
632; CHECK-P8-BE:       # %bb.0: # %entry
633; CHECK-P8-BE-NEXT:    li r4, 29
634; CHECK-P8-BE-NEXT:    rldicr r3, r3, 0, 23
635; CHECK-P8-BE-NEXT:    rldic r4, r4, 35, 24
636; CHECK-P8-BE-NEXT:    oris r4, r4, 54437
637; CHECK-P8-BE-NEXT:    ori r4, r4, 4097
638; CHECK-P8-BE-NEXT:    lxvw4x v2, r3, r4
639; CHECK-P8-BE-NEXT:    blr
640entry:
641  %and = and i64 %ptr, -1099511627776
642  %or = or i64 %and, 1000000000001
643  %0 = inttoptr i64 %or to ptr
644  %1 = load <16 x i8>, ptr %0, align 16
645  ret <16 x i8> %1
646}
647
648; Function Attrs: norecurse nounwind readonly uwtable willreturn
649define dso_local <16 x i8> @ld_disjoint_align64_vector(i64 %ptr) {
650; CHECK-P10-LABEL: ld_disjoint_align64_vector:
651; CHECK-P10:       # %bb.0: # %entry
652; CHECK-P10-NEXT:    pli r4, 244140625
653; CHECK-P10-NEXT:    rldicr r3, r3, 0, 23
654; CHECK-P10-NEXT:    rldic r4, r4, 12, 24
655; CHECK-P10-NEXT:    lxvx v2, r3, r4
656; CHECK-P10-NEXT:    blr
657;
658; CHECK-P9-LABEL: ld_disjoint_align64_vector:
659; CHECK-P9:       # %bb.0: # %entry
660; CHECK-P9-NEXT:    lis r4, 3725
661; CHECK-P9-NEXT:    rldicr r3, r3, 0, 23
662; CHECK-P9-NEXT:    ori r4, r4, 19025
663; CHECK-P9-NEXT:    rldic r4, r4, 12, 24
664; CHECK-P9-NEXT:    lxvx v2, r3, r4
665; CHECK-P9-NEXT:    blr
666;
667; CHECK-P8-LE-LABEL: ld_disjoint_align64_vector:
668; CHECK-P8-LE:       # %bb.0: # %entry
669; CHECK-P8-LE-NEXT:    lis r4, 3725
670; CHECK-P8-LE-NEXT:    rldicr r3, r3, 0, 23
671; CHECK-P8-LE-NEXT:    ori r4, r4, 19025
672; CHECK-P8-LE-NEXT:    rldic r4, r4, 12, 24
673; CHECK-P8-LE-NEXT:    lxvd2x vs0, r3, r4
674; CHECK-P8-LE-NEXT:    xxswapd v2, vs0
675; CHECK-P8-LE-NEXT:    blr
676;
677; CHECK-P8-BE-LABEL: ld_disjoint_align64_vector:
678; CHECK-P8-BE:       # %bb.0: # %entry
679; CHECK-P8-BE-NEXT:    lis r4, 3725
680; CHECK-P8-BE-NEXT:    rldicr r3, r3, 0, 23
681; CHECK-P8-BE-NEXT:    ori r4, r4, 19025
682; CHECK-P8-BE-NEXT:    rldic r4, r4, 12, 24
683; CHECK-P8-BE-NEXT:    lxvw4x v2, r3, r4
684; CHECK-P8-BE-NEXT:    blr
685entry:
686  %and = and i64 %ptr, -1099511627776
687  %or = or i64 %and, 1000000000000
688  %0 = inttoptr i64 %or to ptr
689  %1 = load <16 x i8>, ptr %0, align 4096
690  ret <16 x i8> %1
691}
692
693; Function Attrs: norecurse nounwind readonly uwtable willreturn
694define dso_local <16 x i8> @ld_cst_unalign16_vector() {
695; CHECK-LABEL: ld_cst_unalign16_vector:
696; CHECK:       # %bb.0: # %entry
697; CHECK-NEXT:    li r3, 255
698; CHECK-NEXT:    lxv v2, 0(r3)
699; CHECK-NEXT:    blr
700;
701; CHECK-P8-LE-LABEL: ld_cst_unalign16_vector:
702; CHECK-P8-LE:       # %bb.0: # %entry
703; CHECK-P8-LE-NEXT:    li r3, 255
704; CHECK-P8-LE-NEXT:    lxvd2x vs0, 0, r3
705; CHECK-P8-LE-NEXT:    xxswapd v2, vs0
706; CHECK-P8-LE-NEXT:    blr
707;
708; CHECK-P8-BE-LABEL: ld_cst_unalign16_vector:
709; CHECK-P8-BE:       # %bb.0: # %entry
710; CHECK-P8-BE-NEXT:    li r3, 255
711; CHECK-P8-BE-NEXT:    lxvw4x v2, 0, r3
712; CHECK-P8-BE-NEXT:    blr
713entry:
714  %0 = load <16 x i8>, ptr inttoptr (i64 255 to ptr), align 16
715  ret <16 x i8> %0
716}
717
718; Function Attrs: norecurse nounwind readonly uwtable willreturn
719define dso_local <16 x i8> @ld_cst_align16_vector() {
720; CHECK-LABEL: ld_cst_align16_vector:
721; CHECK:       # %bb.0: # %entry
722; CHECK-NEXT:    lxv v2, 4080(0)
723; CHECK-NEXT:    blr
724;
725; CHECK-P8-LE-LABEL: ld_cst_align16_vector:
726; CHECK-P8-LE:       # %bb.0: # %entry
727; CHECK-P8-LE-NEXT:    li r3, 4080
728; CHECK-P8-LE-NEXT:    lxvd2x vs0, 0, r3
729; CHECK-P8-LE-NEXT:    xxswapd v2, vs0
730; CHECK-P8-LE-NEXT:    blr
731;
732; CHECK-P8-BE-LABEL: ld_cst_align16_vector:
733; CHECK-P8-BE:       # %bb.0: # %entry
734; CHECK-P8-BE-NEXT:    li r3, 4080
735; CHECK-P8-BE-NEXT:    lxvw4x v2, 0, r3
736; CHECK-P8-BE-NEXT:    blr
737entry:
738  %0 = load <16 x i8>, ptr inttoptr (i64 4080 to ptr), align 16
739  ret <16 x i8> %0
740}
741
742; Function Attrs: norecurse nounwind readonly uwtable willreturn
743define dso_local <16 x i8> @ld_cst_unalign32_vector() {
744; CHECK-P10-LABEL: ld_cst_unalign32_vector:
745; CHECK-P10:       # %bb.0: # %entry
746; CHECK-P10-NEXT:    pli r3, 99999
747; CHECK-P10-NEXT:    lxv v2, 0(r3)
748; CHECK-P10-NEXT:    blr
749;
750; CHECK-P9-LABEL: ld_cst_unalign32_vector:
751; CHECK-P9:       # %bb.0: # %entry
752; CHECK-P9-NEXT:    lis r3, 1
753; CHECK-P9-NEXT:    ori r3, r3, 34463
754; CHECK-P9-NEXT:    lxv v2, 0(r3)
755; CHECK-P9-NEXT:    blr
756;
757; CHECK-P8-LE-LABEL: ld_cst_unalign32_vector:
758; CHECK-P8-LE:       # %bb.0: # %entry
759; CHECK-P8-LE-NEXT:    lis r3, 1
760; CHECK-P8-LE-NEXT:    ori r3, r3, 34463
761; CHECK-P8-LE-NEXT:    lxvd2x vs0, 0, r3
762; CHECK-P8-LE-NEXT:    xxswapd v2, vs0
763; CHECK-P8-LE-NEXT:    blr
764;
765; CHECK-P8-BE-LABEL: ld_cst_unalign32_vector:
766; CHECK-P8-BE:       # %bb.0: # %entry
767; CHECK-P8-BE-NEXT:    lis r3, 1
768; CHECK-P8-BE-NEXT:    ori r3, r3, 34463
769; CHECK-P8-BE-NEXT:    lxvw4x v2, 0, r3
770; CHECK-P8-BE-NEXT:    blr
771entry:
772  %0 = load <16 x i8>, ptr inttoptr (i64 99999 to ptr), align 16
773  ret <16 x i8> %0
774}
775
776; Function Attrs: norecurse nounwind readonly uwtable willreturn
777define dso_local <16 x i8> @ld_cst_align32_vector() {
778; CHECK-P10-LABEL: ld_cst_align32_vector:
779; CHECK-P10:       # %bb.0: # %entry
780; CHECK-P10-NEXT:    pli r3, 9999900
781; CHECK-P10-NEXT:    lxv v2, 0(r3)
782; CHECK-P10-NEXT:    blr
783;
784; CHECK-P9-LABEL: ld_cst_align32_vector:
785; CHECK-P9:       # %bb.0: # %entry
786; CHECK-P9-NEXT:    lis r3, 152
787; CHECK-P9-NEXT:    ori r3, r3, 38428
788; CHECK-P9-NEXT:    lxv v2, 0(r3)
789; CHECK-P9-NEXT:    blr
790;
791; CHECK-P8-LE-LABEL: ld_cst_align32_vector:
792; CHECK-P8-LE:       # %bb.0: # %entry
793; CHECK-P8-LE-NEXT:    lis r3, 152
794; CHECK-P8-LE-NEXT:    ori r3, r3, 38428
795; CHECK-P8-LE-NEXT:    lxvd2x vs0, 0, r3
796; CHECK-P8-LE-NEXT:    xxswapd v2, vs0
797; CHECK-P8-LE-NEXT:    blr
798;
799; CHECK-P8-BE-LABEL: ld_cst_align32_vector:
800; CHECK-P8-BE:       # %bb.0: # %entry
801; CHECK-P8-BE-NEXT:    lis r3, 152
802; CHECK-P8-BE-NEXT:    ori r3, r3, 38428
803; CHECK-P8-BE-NEXT:    lxvw4x v2, 0, r3
804; CHECK-P8-BE-NEXT:    blr
805entry:
806  %0 = load <16 x i8>, ptr inttoptr (i64 9999900 to ptr), align 16
807  ret <16 x i8> %0
808}
809
810; Function Attrs: norecurse nounwind readonly uwtable willreturn
811define dso_local <16 x i8> @ld_cst_unalign64_vector() {
812; CHECK-P10-LABEL: ld_cst_unalign64_vector:
813; CHECK-P10:       # %bb.0: # %entry
814; CHECK-P10-NEXT:    pli r3, 232
815; CHECK-P10-NEXT:    pli r4, 3567587329
816; CHECK-P10-NEXT:    rldimi r4, r3, 32, 0
817; CHECK-P10-NEXT:    lxv v2, 0(r4)
818; CHECK-P10-NEXT:    blr
819;
820; CHECK-P9-LABEL: ld_cst_unalign64_vector:
821; CHECK-P9:       # %bb.0: # %entry
822; CHECK-P9-NEXT:    li r3, 29
823; CHECK-P9-NEXT:    rldic r3, r3, 35, 24
824; CHECK-P9-NEXT:    oris r3, r3, 54437
825; CHECK-P9-NEXT:    ori r3, r3, 4097
826; CHECK-P9-NEXT:    lxv v2, 0(r3)
827; CHECK-P9-NEXT:    blr
828;
829; CHECK-P8-LE-LABEL: ld_cst_unalign64_vector:
830; CHECK-P8-LE:       # %bb.0: # %entry
831; CHECK-P8-LE-NEXT:    li r3, 29
832; CHECK-P8-LE-NEXT:    rldic r3, r3, 35, 24
833; CHECK-P8-LE-NEXT:    oris r3, r3, 54437
834; CHECK-P8-LE-NEXT:    ori r3, r3, 4097
835; CHECK-P8-LE-NEXT:    lxvd2x vs0, 0, r3
836; CHECK-P8-LE-NEXT:    xxswapd v2, vs0
837; CHECK-P8-LE-NEXT:    blr
838;
839; CHECK-P8-BE-LABEL: ld_cst_unalign64_vector:
840; CHECK-P8-BE:       # %bb.0: # %entry
841; CHECK-P8-BE-NEXT:    li r3, 29
842; CHECK-P8-BE-NEXT:    rldic r3, r3, 35, 24
843; CHECK-P8-BE-NEXT:    oris r3, r3, 54437
844; CHECK-P8-BE-NEXT:    ori r3, r3, 4097
845; CHECK-P8-BE-NEXT:    lxvw4x v2, 0, r3
846; CHECK-P8-BE-NEXT:    blr
847entry:
848  %0 = load <16 x i8>, ptr inttoptr (i64 1000000000001 to ptr), align 16
849  ret <16 x i8> %0
850}
851
852; Function Attrs: norecurse nounwind readonly uwtable willreturn
853define dso_local <16 x i8> @ld_cst_align64_vector() {
854; CHECK-P10-LABEL: ld_cst_align64_vector:
855; CHECK-P10:       # %bb.0: # %entry
856; CHECK-P10-NEXT:    pli r3, 244140625
857; CHECK-P10-NEXT:    rldic r3, r3, 12, 24
858; CHECK-P10-NEXT:    lxv v2, 0(r3)
859; CHECK-P10-NEXT:    blr
860;
861; CHECK-P9-LABEL: ld_cst_align64_vector:
862; CHECK-P9:       # %bb.0: # %entry
863; CHECK-P9-NEXT:    lis r3, 3725
864; CHECK-P9-NEXT:    ori r3, r3, 19025
865; CHECK-P9-NEXT:    rldic r3, r3, 12, 24
866; CHECK-P9-NEXT:    lxv v2, 0(r3)
867; CHECK-P9-NEXT:    blr
868;
869; CHECK-P8-LE-LABEL: ld_cst_align64_vector:
870; CHECK-P8-LE:       # %bb.0: # %entry
871; CHECK-P8-LE-NEXT:    lis r3, 3725
872; CHECK-P8-LE-NEXT:    ori r3, r3, 19025
873; CHECK-P8-LE-NEXT:    rldic r3, r3, 12, 24
874; CHECK-P8-LE-NEXT:    lxvd2x vs0, 0, r3
875; CHECK-P8-LE-NEXT:    xxswapd v2, vs0
876; CHECK-P8-LE-NEXT:    blr
877;
878; CHECK-P8-BE-LABEL: ld_cst_align64_vector:
879; CHECK-P8-BE:       # %bb.0: # %entry
880; CHECK-P8-BE-NEXT:    lis r3, 3725
881; CHECK-P8-BE-NEXT:    ori r3, r3, 19025
882; CHECK-P8-BE-NEXT:    rldic r3, r3, 12, 24
883; CHECK-P8-BE-NEXT:    lxvw4x v2, 0, r3
884; CHECK-P8-BE-NEXT:    blr
885entry:
886  %0 = load <16 x i8>, ptr inttoptr (i64 1000000000000 to ptr), align 4096
887  ret <16 x i8> %0
888}
889
890; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
891define dso_local void @st_0_vector(i64 %ptr, <16 x i8> %str) {
892; CHECK-LABEL: st_0_vector:
893; CHECK:       # %bb.0: # %entry
894; CHECK-NEXT:    stxv v2, 0(r3)
895; CHECK-NEXT:    blr
896;
897; CHECK-P8-LE-LABEL: st_0_vector:
898; CHECK-P8-LE:       # %bb.0: # %entry
899; CHECK-P8-LE-NEXT:    xxswapd vs0, v2
900; CHECK-P8-LE-NEXT:    stxvd2x vs0, 0, r3
901; CHECK-P8-LE-NEXT:    blr
902;
903; CHECK-P8-BE-LABEL: st_0_vector:
904; CHECK-P8-BE:       # %bb.0: # %entry
905; CHECK-P8-BE-NEXT:    stxvw4x v2, 0, r3
906; CHECK-P8-BE-NEXT:    blr
907entry:
908  %0 = inttoptr i64 %ptr to ptr
909  store <16 x i8> %str, ptr %0, align 16
910  ret void
911}
912
913; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
914define dso_local void @st_unalign16_vector(ptr nocapture %ptr, <16 x i8> %str) {
915; CHECK-P10-LABEL: st_unalign16_vector:
916; CHECK-P10:       # %bb.0: # %entry
917; CHECK-P10-NEXT:    pstxv v2, 1(r3), 0
918; CHECK-P10-NEXT:    blr
919;
920; CHECK-P9-LABEL: st_unalign16_vector:
921; CHECK-P9:       # %bb.0: # %entry
922; CHECK-P9-NEXT:    li r4, 1
923; CHECK-P9-NEXT:    stxvx v2, r3, r4
924; CHECK-P9-NEXT:    blr
925;
926; CHECK-P8-LE-LABEL: st_unalign16_vector:
927; CHECK-P8-LE:       # %bb.0: # %entry
928; CHECK-P8-LE-NEXT:    xxswapd vs0, v2
929; CHECK-P8-LE-NEXT:    addi r3, r3, 1
930; CHECK-P8-LE-NEXT:    stxvd2x vs0, 0, r3
931; CHECK-P8-LE-NEXT:    blr
932;
933; CHECK-P8-BE-LABEL: st_unalign16_vector:
934; CHECK-P8-BE:       # %bb.0: # %entry
935; CHECK-P8-BE-NEXT:    addi r3, r3, 1
936; CHECK-P8-BE-NEXT:    stxvw4x v2, 0, r3
937; CHECK-P8-BE-NEXT:    blr
938entry:
939  %add.ptr = getelementptr inbounds i8, ptr %ptr, i64 1
940  store <16 x i8> %str, ptr %add.ptr, align 16
941  ret void
942}
943
944; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
945define dso_local void @st_align16_vector(ptr nocapture %ptr, <16 x i8> %str) {
946; CHECK-P10-LABEL: st_align16_vector:
947; CHECK-P10:       # %bb.0: # %entry
948; CHECK-P10-NEXT:    pstxv v2, 8(r3), 0
949; CHECK-P10-NEXT:    blr
950;
951; CHECK-P9-LABEL: st_align16_vector:
952; CHECK-P9:       # %bb.0: # %entry
953; CHECK-P9-NEXT:    li r4, 8
954; CHECK-P9-NEXT:    stxvx v2, r3, r4
955; CHECK-P9-NEXT:    blr
956;
957; CHECK-P8-LE-LABEL: st_align16_vector:
958; CHECK-P8-LE:       # %bb.0: # %entry
959; CHECK-P8-LE-NEXT:    xxswapd vs0, v2
960; CHECK-P8-LE-NEXT:    addi r3, r3, 8
961; CHECK-P8-LE-NEXT:    stxvd2x vs0, 0, r3
962; CHECK-P8-LE-NEXT:    blr
963;
964; CHECK-P8-BE-LABEL: st_align16_vector:
965; CHECK-P8-BE:       # %bb.0: # %entry
966; CHECK-P8-BE-NEXT:    addi r3, r3, 8
967; CHECK-P8-BE-NEXT:    stxvw4x v2, 0, r3
968; CHECK-P8-BE-NEXT:    blr
969entry:
970  %add.ptr = getelementptr inbounds i8, ptr %ptr, i64 8
971  store <16 x i8> %str, ptr %add.ptr, align 16
972  ret void
973}
974
975; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
976define dso_local void @st_unalign32_vector(ptr nocapture %ptr, <16 x i8> %str) {
977; CHECK-P10-LABEL: st_unalign32_vector:
978; CHECK-P10:       # %bb.0: # %entry
979; CHECK-P10-NEXT:    pstxv v2, 99999(r3), 0
980; CHECK-P10-NEXT:    blr
981;
982; CHECK-P9-LABEL: st_unalign32_vector:
983; CHECK-P9:       # %bb.0: # %entry
984; CHECK-P9-NEXT:    lis r4, 1
985; CHECK-P9-NEXT:    ori r4, r4, 34463
986; CHECK-P9-NEXT:    stxvx v2, r3, r4
987; CHECK-P9-NEXT:    blr
988;
989; CHECK-P8-LE-LABEL: st_unalign32_vector:
990; CHECK-P8-LE:       # %bb.0: # %entry
991; CHECK-P8-LE-NEXT:    lis r4, 1
992; CHECK-P8-LE-NEXT:    xxswapd vs0, v2
993; CHECK-P8-LE-NEXT:    ori r4, r4, 34463
994; CHECK-P8-LE-NEXT:    stxvd2x vs0, r3, r4
995; CHECK-P8-LE-NEXT:    blr
996;
997; CHECK-P8-BE-LABEL: st_unalign32_vector:
998; CHECK-P8-BE:       # %bb.0: # %entry
999; CHECK-P8-BE-NEXT:    lis r4, 1
1000; CHECK-P8-BE-NEXT:    ori r4, r4, 34463
1001; CHECK-P8-BE-NEXT:    stxvw4x v2, r3, r4
1002; CHECK-P8-BE-NEXT:    blr
1003entry:
1004  %add.ptr = getelementptr inbounds i8, ptr %ptr, i64 99999
1005  store <16 x i8> %str, ptr %add.ptr, align 16
1006  ret void
1007}
1008
1009; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
1010define dso_local void @st_align32_vector(ptr nocapture %ptr, <16 x i8> %str) {
1011; CHECK-P10-LABEL: st_align32_vector:
1012; CHECK-P10:       # %bb.0: # %entry
1013; CHECK-P10-NEXT:    pstxv v2, 99999000(r3), 0
1014; CHECK-P10-NEXT:    blr
1015;
1016; CHECK-P9-LABEL: st_align32_vector:
1017; CHECK-P9:       # %bb.0: # %entry
1018; CHECK-P9-NEXT:    lis r4, 1525
1019; CHECK-P9-NEXT:    ori r4, r4, 56600
1020; CHECK-P9-NEXT:    stxvx v2, r3, r4
1021; CHECK-P9-NEXT:    blr
1022;
1023; CHECK-P8-LE-LABEL: st_align32_vector:
1024; CHECK-P8-LE:       # %bb.0: # %entry
1025; CHECK-P8-LE-NEXT:    lis r4, 1525
1026; CHECK-P8-LE-NEXT:    xxswapd vs0, v2
1027; CHECK-P8-LE-NEXT:    ori r4, r4, 56600
1028; CHECK-P8-LE-NEXT:    stxvd2x vs0, r3, r4
1029; CHECK-P8-LE-NEXT:    blr
1030;
1031; CHECK-P8-BE-LABEL: st_align32_vector:
1032; CHECK-P8-BE:       # %bb.0: # %entry
1033; CHECK-P8-BE-NEXT:    lis r4, 1525
1034; CHECK-P8-BE-NEXT:    ori r4, r4, 56600
1035; CHECK-P8-BE-NEXT:    stxvw4x v2, r3, r4
1036; CHECK-P8-BE-NEXT:    blr
1037entry:
1038  %add.ptr = getelementptr inbounds i8, ptr %ptr, i64 99999000
1039  store <16 x i8> %str, ptr %add.ptr, align 16
1040  ret void
1041}
1042
1043; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
1044define dso_local void @st_unalign64_vector(ptr nocapture %ptr, <16 x i8> %str) {
1045; CHECK-P10-LABEL: st_unalign64_vector:
1046; CHECK-P10:       # %bb.0: # %entry
1047; CHECK-P10-NEXT:    pli r4, 232
1048; CHECK-P10-NEXT:    pli r5, 3567587329
1049; CHECK-P10-NEXT:    rldimi r5, r4, 32, 0
1050; CHECK-P10-NEXT:    stxvx v2, r3, r5
1051; CHECK-P10-NEXT:    blr
1052;
1053; CHECK-P9-LABEL: st_unalign64_vector:
1054; CHECK-P9:       # %bb.0: # %entry
1055; CHECK-P9-NEXT:    li r4, 29
1056; CHECK-P9-NEXT:    rldic r4, r4, 35, 24
1057; CHECK-P9-NEXT:    oris r4, r4, 54437
1058; CHECK-P9-NEXT:    ori r4, r4, 4097
1059; CHECK-P9-NEXT:    stxvx v2, r3, r4
1060; CHECK-P9-NEXT:    blr
1061;
1062; CHECK-P8-LE-LABEL: st_unalign64_vector:
1063; CHECK-P8-LE:       # %bb.0: # %entry
1064; CHECK-P8-LE-NEXT:    li r4, 29
1065; CHECK-P8-LE-NEXT:    xxswapd vs0, v2
1066; CHECK-P8-LE-NEXT:    rldic r4, r4, 35, 24
1067; CHECK-P8-LE-NEXT:    oris r4, r4, 54437
1068; CHECK-P8-LE-NEXT:    ori r4, r4, 4097
1069; CHECK-P8-LE-NEXT:    stxvd2x vs0, r3, r4
1070; CHECK-P8-LE-NEXT:    blr
1071;
1072; CHECK-P8-BE-LABEL: st_unalign64_vector:
1073; CHECK-P8-BE:       # %bb.0: # %entry
1074; CHECK-P8-BE-NEXT:    li r4, 29
1075; CHECK-P8-BE-NEXT:    rldic r4, r4, 35, 24
1076; CHECK-P8-BE-NEXT:    oris r4, r4, 54437
1077; CHECK-P8-BE-NEXT:    ori r4, r4, 4097
1078; CHECK-P8-BE-NEXT:    stxvw4x v2, r3, r4
1079; CHECK-P8-BE-NEXT:    blr
1080entry:
1081  %add.ptr = getelementptr inbounds i8, ptr %ptr, i64 1000000000001
1082  store <16 x i8> %str, ptr %add.ptr, align 16
1083  ret void
1084}
1085
1086; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
1087define dso_local void @st_align64_vector(ptr nocapture %ptr, <16 x i8> %str) {
1088; CHECK-P10-LABEL: st_align64_vector:
1089; CHECK-P10:       # %bb.0: # %entry
1090; CHECK-P10-NEXT:    pli r4, 244140625
1091; CHECK-P10-NEXT:    rldic r4, r4, 12, 24
1092; CHECK-P10-NEXT:    stxvx v2, r3, r4
1093; CHECK-P10-NEXT:    blr
1094;
1095; CHECK-P9-LABEL: st_align64_vector:
1096; CHECK-P9:       # %bb.0: # %entry
1097; CHECK-P9-NEXT:    lis r4, 3725
1098; CHECK-P9-NEXT:    ori r4, r4, 19025
1099; CHECK-P9-NEXT:    rldic r4, r4, 12, 24
1100; CHECK-P9-NEXT:    stxvx v2, r3, r4
1101; CHECK-P9-NEXT:    blr
1102;
1103; CHECK-P8-LE-LABEL: st_align64_vector:
1104; CHECK-P8-LE:       # %bb.0: # %entry
1105; CHECK-P8-LE-NEXT:    lis r4, 3725
1106; CHECK-P8-LE-NEXT:    xxswapd vs0, v2
1107; CHECK-P8-LE-NEXT:    ori r4, r4, 19025
1108; CHECK-P8-LE-NEXT:    rldic r4, r4, 12, 24
1109; CHECK-P8-LE-NEXT:    stxvd2x vs0, r3, r4
1110; CHECK-P8-LE-NEXT:    blr
1111;
1112; CHECK-P8-BE-LABEL: st_align64_vector:
1113; CHECK-P8-BE:       # %bb.0: # %entry
1114; CHECK-P8-BE-NEXT:    lis r4, 3725
1115; CHECK-P8-BE-NEXT:    ori r4, r4, 19025
1116; CHECK-P8-BE-NEXT:    rldic r4, r4, 12, 24
1117; CHECK-P8-BE-NEXT:    stxvw4x v2, r3, r4
1118; CHECK-P8-BE-NEXT:    blr
1119entry:
1120  %add.ptr = getelementptr inbounds i8, ptr %ptr, i64 1000000000000
1121  store <16 x i8> %str, ptr %add.ptr, align 16
1122  ret void
1123}
1124
1125; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
1126define dso_local void @st_reg_vector(ptr nocapture %ptr, i64 %off, <16 x i8> %str) {
1127; CHECK-LABEL: st_reg_vector:
1128; CHECK:       # %bb.0: # %entry
1129; CHECK-NEXT:    stxvx v2, r3, r4
1130; CHECK-NEXT:    blr
1131;
1132; CHECK-P8-LE-LABEL: st_reg_vector:
1133; CHECK-P8-LE:       # %bb.0: # %entry
1134; CHECK-P8-LE-NEXT:    xxswapd vs0, v2
1135; CHECK-P8-LE-NEXT:    stxvd2x vs0, r3, r4
1136; CHECK-P8-LE-NEXT:    blr
1137;
1138; CHECK-P8-BE-LABEL: st_reg_vector:
1139; CHECK-P8-BE:       # %bb.0: # %entry
1140; CHECK-P8-BE-NEXT:    stxvw4x v2, r3, r4
1141; CHECK-P8-BE-NEXT:    blr
1142entry:
1143  %add.ptr = getelementptr inbounds i8, ptr %ptr, i64 %off
1144  store <16 x i8> %str, ptr %add.ptr, align 16
1145  ret void
1146}
1147
1148; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
1149define dso_local void @st_or1_vector(i64 %ptr, i8 zeroext %off, <16 x i8> %str) {
1150; CHECK-LABEL: st_or1_vector:
1151; CHECK:       # %bb.0: # %entry
1152; CHECK-NEXT:    or r3, r4, r3
1153; CHECK-NEXT:    stxv v2, 0(r3)
1154; CHECK-NEXT:    blr
1155;
1156; CHECK-P8-LE-LABEL: st_or1_vector:
1157; CHECK-P8-LE:       # %bb.0: # %entry
1158; CHECK-P8-LE-NEXT:    xxswapd vs0, v2
1159; CHECK-P8-LE-NEXT:    or r3, r4, r3
1160; CHECK-P8-LE-NEXT:    stxvd2x vs0, 0, r3
1161; CHECK-P8-LE-NEXT:    blr
1162;
1163; CHECK-P8-BE-LABEL: st_or1_vector:
1164; CHECK-P8-BE:       # %bb.0: # %entry
1165; CHECK-P8-BE-NEXT:    or r3, r4, r3
1166; CHECK-P8-BE-NEXT:    stxvw4x v2, 0, r3
1167; CHECK-P8-BE-NEXT:    blr
1168entry:
1169  %conv = zext i8 %off to i64
1170  %or = or i64 %conv, %ptr
1171  %0 = inttoptr i64 %or to ptr
1172  store <16 x i8> %str, ptr %0, align 16
1173  ret void
1174}
1175
1176; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
1177define dso_local void @st_or2_vector(i64 %ptr, i8 zeroext %off, <16 x i8> %str) {
1178; CHECK-LABEL: st_or2_vector:
1179; CHECK:       # %bb.0: # %entry
1180; CHECK-NEXT:    rldicr r3, r3, 0, 51
1181; CHECK-NEXT:    stxvx v2, r3, r4
1182; CHECK-NEXT:    blr
1183;
1184; CHECK-P8-LE-LABEL: st_or2_vector:
1185; CHECK-P8-LE:       # %bb.0: # %entry
1186; CHECK-P8-LE-NEXT:    xxswapd vs0, v2
1187; CHECK-P8-LE-NEXT:    rldicr r3, r3, 0, 51
1188; CHECK-P8-LE-NEXT:    stxvd2x vs0, r3, r4
1189; CHECK-P8-LE-NEXT:    blr
1190;
1191; CHECK-P8-BE-LABEL: st_or2_vector:
1192; CHECK-P8-BE:       # %bb.0: # %entry
1193; CHECK-P8-BE-NEXT:    rldicr r3, r3, 0, 51
1194; CHECK-P8-BE-NEXT:    stxvw4x v2, r3, r4
1195; CHECK-P8-BE-NEXT:    blr
1196entry:
1197  %and = and i64 %ptr, -4096
1198  %conv = zext i8 %off to i64
1199  %or = or i64 %and, %conv
1200  %0 = inttoptr i64 %or to ptr
1201  store <16 x i8> %str, ptr %0, align 16
1202  ret void
1203}
1204
1205; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
1206define dso_local void @st_not_disjoint16_vector(i64 %ptr, <16 x i8> %str) {
1207; CHECK-LABEL: st_not_disjoint16_vector:
1208; CHECK:       # %bb.0: # %entry
1209; CHECK-NEXT:    ori r3, r3, 6
1210; CHECK-NEXT:    stxv v2, 0(r3)
1211; CHECK-NEXT:    blr
1212;
1213; CHECK-P8-LE-LABEL: st_not_disjoint16_vector:
1214; CHECK-P8-LE:       # %bb.0: # %entry
1215; CHECK-P8-LE-NEXT:    xxswapd vs0, v2
1216; CHECK-P8-LE-NEXT:    ori r3, r3, 6
1217; CHECK-P8-LE-NEXT:    stxvd2x vs0, 0, r3
1218; CHECK-P8-LE-NEXT:    blr
1219;
1220; CHECK-P8-BE-LABEL: st_not_disjoint16_vector:
1221; CHECK-P8-BE:       # %bb.0: # %entry
1222; CHECK-P8-BE-NEXT:    ori r3, r3, 6
1223; CHECK-P8-BE-NEXT:    stxvw4x v2, 0, r3
1224; CHECK-P8-BE-NEXT:    blr
1225entry:
1226  %or = or i64 %ptr, 6
1227  %0 = inttoptr i64 %or to ptr
1228  store <16 x i8> %str, ptr %0, align 16
1229  ret void
1230}
1231
1232; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
1233define dso_local void @st_disjoint_unalign16_vector(i64 %ptr, <16 x i8> %str) {
1234; CHECK-P10-LABEL: st_disjoint_unalign16_vector:
1235; CHECK-P10:       # %bb.0: # %entry
1236; CHECK-P10-NEXT:    rldicr r3, r3, 0, 51
1237; CHECK-P10-NEXT:    pstxv v2, 6(r3), 0
1238; CHECK-P10-NEXT:    blr
1239;
1240; CHECK-P9-LABEL: st_disjoint_unalign16_vector:
1241; CHECK-P9:       # %bb.0: # %entry
1242; CHECK-P9-NEXT:    rldicr r3, r3, 0, 51
1243; CHECK-P9-NEXT:    li r4, 6
1244; CHECK-P9-NEXT:    stxvx v2, r3, r4
1245; CHECK-P9-NEXT:    blr
1246;
1247; CHECK-P8-LE-LABEL: st_disjoint_unalign16_vector:
1248; CHECK-P8-LE:       # %bb.0: # %entry
1249; CHECK-P8-LE-NEXT:    rldicr r3, r3, 0, 51
1250; CHECK-P8-LE-NEXT:    xxswapd vs0, v2
1251; CHECK-P8-LE-NEXT:    ori r3, r3, 6
1252; CHECK-P8-LE-NEXT:    stxvd2x vs0, 0, r3
1253; CHECK-P8-LE-NEXT:    blr
1254;
1255; CHECK-P8-BE-LABEL: st_disjoint_unalign16_vector:
1256; CHECK-P8-BE:       # %bb.0: # %entry
1257; CHECK-P8-BE-NEXT:    rldicr r3, r3, 0, 51
1258; CHECK-P8-BE-NEXT:    ori r3, r3, 6
1259; CHECK-P8-BE-NEXT:    stxvw4x v2, 0, r3
1260; CHECK-P8-BE-NEXT:    blr
1261entry:
1262  %and = and i64 %ptr, -4096
1263  %or = or i64 %and, 6
1264  %0 = inttoptr i64 %or to ptr
1265  store <16 x i8> %str, ptr %0, align 16
1266  ret void
1267}
1268
1269; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
1270define dso_local void @st_disjoint_align16_vector(i64 %ptr, <16 x i8> %str) {
1271; CHECK-P10-LABEL: st_disjoint_align16_vector:
1272; CHECK-P10:       # %bb.0: # %entry
1273; CHECK-P10-NEXT:    rldicr r3, r3, 0, 51
1274; CHECK-P10-NEXT:    pstxv v2, 24(r3), 0
1275; CHECK-P10-NEXT:    blr
1276;
1277; CHECK-P9-LABEL: st_disjoint_align16_vector:
1278; CHECK-P9:       # %bb.0: # %entry
1279; CHECK-P9-NEXT:    rldicr r3, r3, 0, 51
1280; CHECK-P9-NEXT:    li r4, 24
1281; CHECK-P9-NEXT:    stxvx v2, r3, r4
1282; CHECK-P9-NEXT:    blr
1283;
1284; CHECK-P8-LE-LABEL: st_disjoint_align16_vector:
1285; CHECK-P8-LE:       # %bb.0: # %entry
1286; CHECK-P8-LE-NEXT:    rldicr r3, r3, 0, 51
1287; CHECK-P8-LE-NEXT:    xxswapd vs0, v2
1288; CHECK-P8-LE-NEXT:    ori r3, r3, 24
1289; CHECK-P8-LE-NEXT:    stxvd2x vs0, 0, r3
1290; CHECK-P8-LE-NEXT:    blr
1291;
1292; CHECK-P8-BE-LABEL: st_disjoint_align16_vector:
1293; CHECK-P8-BE:       # %bb.0: # %entry
1294; CHECK-P8-BE-NEXT:    rldicr r3, r3, 0, 51
1295; CHECK-P8-BE-NEXT:    ori r3, r3, 24
1296; CHECK-P8-BE-NEXT:    stxvw4x v2, 0, r3
1297; CHECK-P8-BE-NEXT:    blr
1298entry:
1299  %and = and i64 %ptr, -4096
1300  %or = or i64 %and, 24
1301  %0 = inttoptr i64 %or to ptr
1302  store <16 x i8> %str, ptr %0, align 16
1303  ret void
1304}
1305
1306; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
1307define dso_local void @st_not_disjoint32_vector(i64 %ptr, <16 x i8> %str) {
1308; CHECK-LABEL: st_not_disjoint32_vector:
1309; CHECK:       # %bb.0: # %entry
1310; CHECK-NEXT:    ori r3, r3, 34463
1311; CHECK-NEXT:    oris r3, r3, 1
1312; CHECK-NEXT:    stxv v2, 0(r3)
1313; CHECK-NEXT:    blr
1314;
1315; CHECK-P8-LE-LABEL: st_not_disjoint32_vector:
1316; CHECK-P8-LE:       # %bb.0: # %entry
1317; CHECK-P8-LE-NEXT:    ori r3, r3, 34463
1318; CHECK-P8-LE-NEXT:    xxswapd vs0, v2
1319; CHECK-P8-LE-NEXT:    oris r3, r3, 1
1320; CHECK-P8-LE-NEXT:    stxvd2x vs0, 0, r3
1321; CHECK-P8-LE-NEXT:    blr
1322;
1323; CHECK-P8-BE-LABEL: st_not_disjoint32_vector:
1324; CHECK-P8-BE:       # %bb.0: # %entry
1325; CHECK-P8-BE-NEXT:    ori r3, r3, 34463
1326; CHECK-P8-BE-NEXT:    oris r3, r3, 1
1327; CHECK-P8-BE-NEXT:    stxvw4x v2, 0, r3
1328; CHECK-P8-BE-NEXT:    blr
1329entry:
1330  %or = or i64 %ptr, 99999
1331  %0 = inttoptr i64 %or to ptr
1332  store <16 x i8> %str, ptr %0, align 16
1333  ret void
1334}
1335
1336; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
1337define dso_local void @st_disjoint_unalign32_vector(i64 %ptr, <16 x i8> %str) {
1338; CHECK-P10-LABEL: st_disjoint_unalign32_vector:
1339; CHECK-P10:       # %bb.0: # %entry
1340; CHECK-P10-NEXT:    rldicr r3, r3, 0, 43
1341; CHECK-P10-NEXT:    pstxv v2, 99999(r3), 0
1342; CHECK-P10-NEXT:    blr
1343;
1344; CHECK-P9-LABEL: st_disjoint_unalign32_vector:
1345; CHECK-P9:       # %bb.0: # %entry
1346; CHECK-P9-NEXT:    lis r4, 1
1347; CHECK-P9-NEXT:    rldicr r3, r3, 0, 43
1348; CHECK-P9-NEXT:    ori r4, r4, 34463
1349; CHECK-P9-NEXT:    stxvx v2, r3, r4
1350; CHECK-P9-NEXT:    blr
1351;
1352; CHECK-P8-LE-LABEL: st_disjoint_unalign32_vector:
1353; CHECK-P8-LE:       # %bb.0: # %entry
1354; CHECK-P8-LE-NEXT:    lis r4, 1
1355; CHECK-P8-LE-NEXT:    xxswapd vs0, v2
1356; CHECK-P8-LE-NEXT:    rldicr r3, r3, 0, 43
1357; CHECK-P8-LE-NEXT:    ori r4, r4, 34463
1358; CHECK-P8-LE-NEXT:    stxvd2x vs0, r3, r4
1359; CHECK-P8-LE-NEXT:    blr
1360;
1361; CHECK-P8-BE-LABEL: st_disjoint_unalign32_vector:
1362; CHECK-P8-BE:       # %bb.0: # %entry
1363; CHECK-P8-BE-NEXT:    lis r4, 1
1364; CHECK-P8-BE-NEXT:    rldicr r3, r3, 0, 43
1365; CHECK-P8-BE-NEXT:    ori r4, r4, 34463
1366; CHECK-P8-BE-NEXT:    stxvw4x v2, r3, r4
1367; CHECK-P8-BE-NEXT:    blr
1368entry:
1369  %and = and i64 %ptr, -1048576
1370  %or = or i64 %and, 99999
1371  %0 = inttoptr i64 %or to ptr
1372  store <16 x i8> %str, ptr %0, align 16
1373  ret void
1374}
1375
1376; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
1377define dso_local void @st_disjoint_align32_vector(i64 %ptr, <16 x i8> %str) {
1378; CHECK-P10-LABEL: st_disjoint_align32_vector:
1379; CHECK-P10:       # %bb.0: # %entry
1380; CHECK-P10-NEXT:    lis r4, -15264
1381; CHECK-P10-NEXT:    and r3, r3, r4
1382; CHECK-P10-NEXT:    pstxv v2, 999990000(r3), 0
1383; CHECK-P10-NEXT:    blr
1384;
1385; CHECK-P9-LABEL: st_disjoint_align32_vector:
1386; CHECK-P9:       # %bb.0: # %entry
1387; CHECK-P9-NEXT:    lis r4, -15264
1388; CHECK-P9-NEXT:    and r3, r3, r4
1389; CHECK-P9-NEXT:    lis r4, 15258
1390; CHECK-P9-NEXT:    ori r4, r4, 41712
1391; CHECK-P9-NEXT:    stxvx v2, r3, r4
1392; CHECK-P9-NEXT:    blr
1393;
1394; CHECK-P8-LE-LABEL: st_disjoint_align32_vector:
1395; CHECK-P8-LE:       # %bb.0: # %entry
1396; CHECK-P8-LE-NEXT:    lis r4, -15264
1397; CHECK-P8-LE-NEXT:    xxswapd vs0, v2
1398; CHECK-P8-LE-NEXT:    and r3, r3, r4
1399; CHECK-P8-LE-NEXT:    lis r4, 15258
1400; CHECK-P8-LE-NEXT:    ori r4, r4, 41712
1401; CHECK-P8-LE-NEXT:    stxvd2x vs0, r3, r4
1402; CHECK-P8-LE-NEXT:    blr
1403;
1404; CHECK-P8-BE-LABEL: st_disjoint_align32_vector:
1405; CHECK-P8-BE:       # %bb.0: # %entry
1406; CHECK-P8-BE-NEXT:    lis r4, -15264
1407; CHECK-P8-BE-NEXT:    and r3, r3, r4
1408; CHECK-P8-BE-NEXT:    lis r4, 15258
1409; CHECK-P8-BE-NEXT:    ori r4, r4, 41712
1410; CHECK-P8-BE-NEXT:    stxvw4x v2, r3, r4
1411; CHECK-P8-BE-NEXT:    blr
1412entry:
1413  %and = and i64 %ptr, -1000341504
1414  %or = or i64 %and, 999990000
1415  %0 = inttoptr i64 %or to ptr
1416  store <16 x i8> %str, ptr %0, align 16
1417  ret void
1418}
1419
1420; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
1421define dso_local void @st_not_disjoint64_vector(i64 %ptr, <16 x i8> %str) {
1422; CHECK-P10-LABEL: st_not_disjoint64_vector:
1423; CHECK-P10:       # %bb.0: # %entry
1424; CHECK-P10-NEXT:    pli r4, 232
1425; CHECK-P10-NEXT:    pli r5, 3567587329
1426; CHECK-P10-NEXT:    rldimi r5, r4, 32, 0
1427; CHECK-P10-NEXT:    or r3, r3, r5
1428; CHECK-P10-NEXT:    stxv v2, 0(r3)
1429; CHECK-P10-NEXT:    blr
1430;
1431; CHECK-P9-LABEL: st_not_disjoint64_vector:
1432; CHECK-P9:       # %bb.0: # %entry
1433; CHECK-P9-NEXT:    li r4, 29
1434; CHECK-P9-NEXT:    rldic r4, r4, 35, 24
1435; CHECK-P9-NEXT:    oris r4, r4, 54437
1436; CHECK-P9-NEXT:    ori r4, r4, 4097
1437; CHECK-P9-NEXT:    or r3, r3, r4
1438; CHECK-P9-NEXT:    stxv v2, 0(r3)
1439; CHECK-P9-NEXT:    blr
1440;
1441; CHECK-P8-LE-LABEL: st_not_disjoint64_vector:
1442; CHECK-P8-LE:       # %bb.0: # %entry
1443; CHECK-P8-LE-NEXT:    li r4, 29
1444; CHECK-P8-LE-NEXT:    xxswapd vs0, v2
1445; CHECK-P8-LE-NEXT:    rldic r4, r4, 35, 24
1446; CHECK-P8-LE-NEXT:    oris r4, r4, 54437
1447; CHECK-P8-LE-NEXT:    ori r4, r4, 4097
1448; CHECK-P8-LE-NEXT:    or r3, r3, r4
1449; CHECK-P8-LE-NEXT:    stxvd2x vs0, 0, r3
1450; CHECK-P8-LE-NEXT:    blr
1451;
1452; CHECK-P8-BE-LABEL: st_not_disjoint64_vector:
1453; CHECK-P8-BE:       # %bb.0: # %entry
1454; CHECK-P8-BE-NEXT:    li r4, 29
1455; CHECK-P8-BE-NEXT:    rldic r4, r4, 35, 24
1456; CHECK-P8-BE-NEXT:    oris r4, r4, 54437
1457; CHECK-P8-BE-NEXT:    ori r4, r4, 4097
1458; CHECK-P8-BE-NEXT:    or r3, r3, r4
1459; CHECK-P8-BE-NEXT:    stxvw4x v2, 0, r3
1460; CHECK-P8-BE-NEXT:    blr
1461entry:
1462  %or = or i64 %ptr, 1000000000001
1463  %0 = inttoptr i64 %or to ptr
1464  store <16 x i8> %str, ptr %0, align 16
1465  ret void
1466}
1467
1468; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
1469define dso_local void @st_disjoint_unalign64_vector(i64 %ptr, <16 x i8> %str) {
1470; CHECK-P10-LABEL: st_disjoint_unalign64_vector:
1471; CHECK-P10:       # %bb.0: # %entry
1472; CHECK-P10-NEXT:    pli r4, 232
1473; CHECK-P10-NEXT:    pli r5, 3567587329
1474; CHECK-P10-NEXT:    rldicr r3, r3, 0, 23
1475; CHECK-P10-NEXT:    rldimi r5, r4, 32, 0
1476; CHECK-P10-NEXT:    stxvx v2, r3, r5
1477; CHECK-P10-NEXT:    blr
1478;
1479; CHECK-P9-LABEL: st_disjoint_unalign64_vector:
1480; CHECK-P9:       # %bb.0: # %entry
1481; CHECK-P9-NEXT:    li r4, 29
1482; CHECK-P9-NEXT:    rldicr r3, r3, 0, 23
1483; CHECK-P9-NEXT:    rldic r4, r4, 35, 24
1484; CHECK-P9-NEXT:    oris r4, r4, 54437
1485; CHECK-P9-NEXT:    ori r4, r4, 4097
1486; CHECK-P9-NEXT:    stxvx v2, r3, r4
1487; CHECK-P9-NEXT:    blr
1488;
1489; CHECK-P8-LE-LABEL: st_disjoint_unalign64_vector:
1490; CHECK-P8-LE:       # %bb.0: # %entry
1491; CHECK-P8-LE-NEXT:    li r4, 29
1492; CHECK-P8-LE-NEXT:    xxswapd vs0, v2
1493; CHECK-P8-LE-NEXT:    rldicr r3, r3, 0, 23
1494; CHECK-P8-LE-NEXT:    rldic r4, r4, 35, 24
1495; CHECK-P8-LE-NEXT:    oris r4, r4, 54437
1496; CHECK-P8-LE-NEXT:    ori r4, r4, 4097
1497; CHECK-P8-LE-NEXT:    stxvd2x vs0, r3, r4
1498; CHECK-P8-LE-NEXT:    blr
1499;
1500; CHECK-P8-BE-LABEL: st_disjoint_unalign64_vector:
1501; CHECK-P8-BE:       # %bb.0: # %entry
1502; CHECK-P8-BE-NEXT:    li r4, 29
1503; CHECK-P8-BE-NEXT:    rldicr r3, r3, 0, 23
1504; CHECK-P8-BE-NEXT:    rldic r4, r4, 35, 24
1505; CHECK-P8-BE-NEXT:    oris r4, r4, 54437
1506; CHECK-P8-BE-NEXT:    ori r4, r4, 4097
1507; CHECK-P8-BE-NEXT:    stxvw4x v2, r3, r4
1508; CHECK-P8-BE-NEXT:    blr
1509entry:
1510  %and = and i64 %ptr, -1099511627776
1511  %or = or i64 %and, 1000000000001
1512  %0 = inttoptr i64 %or to ptr
1513  store <16 x i8> %str, ptr %0, align 16
1514  ret void
1515}
1516
1517; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
1518define dso_local void @st_disjoint_align64_vector(i64 %ptr, <16 x i8> %str) {
1519; CHECK-P10-LABEL: st_disjoint_align64_vector:
1520; CHECK-P10:       # %bb.0: # %entry
1521; CHECK-P10-NEXT:    pli r4, 244140625
1522; CHECK-P10-NEXT:    rldicr r3, r3, 0, 23
1523; CHECK-P10-NEXT:    rldic r4, r4, 12, 24
1524; CHECK-P10-NEXT:    stxvx v2, r3, r4
1525; CHECK-P10-NEXT:    blr
1526;
1527; CHECK-P9-LABEL: st_disjoint_align64_vector:
1528; CHECK-P9:       # %bb.0: # %entry
1529; CHECK-P9-NEXT:    lis r4, 3725
1530; CHECK-P9-NEXT:    rldicr r3, r3, 0, 23
1531; CHECK-P9-NEXT:    ori r4, r4, 19025
1532; CHECK-P9-NEXT:    rldic r4, r4, 12, 24
1533; CHECK-P9-NEXT:    stxvx v2, r3, r4
1534; CHECK-P9-NEXT:    blr
1535;
1536; CHECK-P8-LE-LABEL: st_disjoint_align64_vector:
1537; CHECK-P8-LE:       # %bb.0: # %entry
1538; CHECK-P8-LE-NEXT:    lis r4, 3725
1539; CHECK-P8-LE-NEXT:    xxswapd vs0, v2
1540; CHECK-P8-LE-NEXT:    rldicr r3, r3, 0, 23
1541; CHECK-P8-LE-NEXT:    ori r4, r4, 19025
1542; CHECK-P8-LE-NEXT:    rldic r4, r4, 12, 24
1543; CHECK-P8-LE-NEXT:    stxvd2x vs0, r3, r4
1544; CHECK-P8-LE-NEXT:    blr
1545;
1546; CHECK-P8-BE-LABEL: st_disjoint_align64_vector:
1547; CHECK-P8-BE:       # %bb.0: # %entry
1548; CHECK-P8-BE-NEXT:    lis r4, 3725
1549; CHECK-P8-BE-NEXT:    rldicr r3, r3, 0, 23
1550; CHECK-P8-BE-NEXT:    ori r4, r4, 19025
1551; CHECK-P8-BE-NEXT:    rldic r4, r4, 12, 24
1552; CHECK-P8-BE-NEXT:    stxvw4x v2, r3, r4
1553; CHECK-P8-BE-NEXT:    blr
1554entry:
1555  %and = and i64 %ptr, -1099511627776
1556  %or = or i64 %and, 1000000000000
1557  %0 = inttoptr i64 %or to ptr
1558  store <16 x i8> %str, ptr %0, align 4096
1559  ret void
1560}
1561
1562; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
1563define dso_local void @st_cst_unalign16_vector(<16 x i8> %str) {
1564; CHECK-LABEL: st_cst_unalign16_vector:
1565; CHECK:       # %bb.0: # %entry
1566; CHECK-NEXT:    li r3, 255
1567; CHECK-NEXT:    stxv v2, 0(r3)
1568; CHECK-NEXT:    blr
1569;
1570; CHECK-P8-LE-LABEL: st_cst_unalign16_vector:
1571; CHECK-P8-LE:       # %bb.0: # %entry
1572; CHECK-P8-LE-NEXT:    xxswapd vs0, v2
1573; CHECK-P8-LE-NEXT:    li r3, 255
1574; CHECK-P8-LE-NEXT:    stxvd2x vs0, 0, r3
1575; CHECK-P8-LE-NEXT:    blr
1576;
1577; CHECK-P8-BE-LABEL: st_cst_unalign16_vector:
1578; CHECK-P8-BE:       # %bb.0: # %entry
1579; CHECK-P8-BE-NEXT:    li r3, 255
1580; CHECK-P8-BE-NEXT:    stxvw4x v2, 0, r3
1581; CHECK-P8-BE-NEXT:    blr
1582entry:
1583  store <16 x i8> %str, ptr inttoptr (i64 255 to ptr), align 16
1584  ret void
1585}
1586
1587; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
1588define dso_local void @st_cst_align16_vector(<16 x i8> %str) {
1589; CHECK-LABEL: st_cst_align16_vector:
1590; CHECK:       # %bb.0: # %entry
1591; CHECK-NEXT:    stxv v2, 4080(0)
1592; CHECK-NEXT:    blr
1593;
1594; CHECK-P8-LE-LABEL: st_cst_align16_vector:
1595; CHECK-P8-LE:       # %bb.0: # %entry
1596; CHECK-P8-LE-NEXT:    xxswapd vs0, v2
1597; CHECK-P8-LE-NEXT:    li r3, 4080
1598; CHECK-P8-LE-NEXT:    stxvd2x vs0, 0, r3
1599; CHECK-P8-LE-NEXT:    blr
1600;
1601; CHECK-P8-BE-LABEL: st_cst_align16_vector:
1602; CHECK-P8-BE:       # %bb.0: # %entry
1603; CHECK-P8-BE-NEXT:    li r3, 4080
1604; CHECK-P8-BE-NEXT:    stxvw4x v2, 0, r3
1605; CHECK-P8-BE-NEXT:    blr
1606entry:
1607  store <16 x i8> %str, ptr inttoptr (i64 4080 to ptr), align 16
1608  ret void
1609}
1610
1611; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
1612define dso_local void @st_cst_unalign32_vector(<16 x i8> %str) {
1613; CHECK-P10-LABEL: st_cst_unalign32_vector:
1614; CHECK-P10:       # %bb.0: # %entry
1615; CHECK-P10-NEXT:    pli r3, 99999
1616; CHECK-P10-NEXT:    stxv v2, 0(r3)
1617; CHECK-P10-NEXT:    blr
1618;
1619; CHECK-P9-LABEL: st_cst_unalign32_vector:
1620; CHECK-P9:       # %bb.0: # %entry
1621; CHECK-P9-NEXT:    lis r3, 1
1622; CHECK-P9-NEXT:    ori r3, r3, 34463
1623; CHECK-P9-NEXT:    stxv v2, 0(r3)
1624; CHECK-P9-NEXT:    blr
1625;
1626; CHECK-P8-LE-LABEL: st_cst_unalign32_vector:
1627; CHECK-P8-LE:       # %bb.0: # %entry
1628; CHECK-P8-LE-NEXT:    lis r3, 1
1629; CHECK-P8-LE-NEXT:    xxswapd vs0, v2
1630; CHECK-P8-LE-NEXT:    ori r3, r3, 34463
1631; CHECK-P8-LE-NEXT:    stxvd2x vs0, 0, r3
1632; CHECK-P8-LE-NEXT:    blr
1633;
1634; CHECK-P8-BE-LABEL: st_cst_unalign32_vector:
1635; CHECK-P8-BE:       # %bb.0: # %entry
1636; CHECK-P8-BE-NEXT:    lis r3, 1
1637; CHECK-P8-BE-NEXT:    ori r3, r3, 34463
1638; CHECK-P8-BE-NEXT:    stxvw4x v2, 0, r3
1639; CHECK-P8-BE-NEXT:    blr
1640entry:
1641  store <16 x i8> %str, ptr inttoptr (i64 99999 to ptr), align 16
1642  ret void
1643}
1644
1645; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
1646define dso_local void @st_cst_align32_vector(<16 x i8> %str) {
1647; CHECK-P10-LABEL: st_cst_align32_vector:
1648; CHECK-P10:       # %bb.0: # %entry
1649; CHECK-P10-NEXT:    pli r3, 9999900
1650; CHECK-P10-NEXT:    stxv v2, 0(r3)
1651; CHECK-P10-NEXT:    blr
1652;
1653; CHECK-P9-LABEL: st_cst_align32_vector:
1654; CHECK-P9:       # %bb.0: # %entry
1655; CHECK-P9-NEXT:    lis r3, 152
1656; CHECK-P9-NEXT:    ori r3, r3, 38428
1657; CHECK-P9-NEXT:    stxv v2, 0(r3)
1658; CHECK-P9-NEXT:    blr
1659;
1660; CHECK-P8-LE-LABEL: st_cst_align32_vector:
1661; CHECK-P8-LE:       # %bb.0: # %entry
1662; CHECK-P8-LE-NEXT:    lis r3, 152
1663; CHECK-P8-LE-NEXT:    xxswapd vs0, v2
1664; CHECK-P8-LE-NEXT:    ori r3, r3, 38428
1665; CHECK-P8-LE-NEXT:    stxvd2x vs0, 0, r3
1666; CHECK-P8-LE-NEXT:    blr
1667;
1668; CHECK-P8-BE-LABEL: st_cst_align32_vector:
1669; CHECK-P8-BE:       # %bb.0: # %entry
1670; CHECK-P8-BE-NEXT:    lis r3, 152
1671; CHECK-P8-BE-NEXT:    ori r3, r3, 38428
1672; CHECK-P8-BE-NEXT:    stxvw4x v2, 0, r3
1673; CHECK-P8-BE-NEXT:    blr
1674entry:
1675  store <16 x i8> %str, ptr inttoptr (i64 9999900 to ptr), align 16
1676  ret void
1677}
1678
1679; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
1680define dso_local void @st_cst_unalign64_vector(<16 x i8> %str) {
1681; CHECK-P10-LABEL: st_cst_unalign64_vector:
1682; CHECK-P10:       # %bb.0: # %entry
1683; CHECK-P10-NEXT:    pli r3, 232
1684; CHECK-P10-NEXT:    pli r4, 3567587329
1685; CHECK-P10-NEXT:    rldimi r4, r3, 32, 0
1686; CHECK-P10-NEXT:    stxv v2, 0(r4)
1687; CHECK-P10-NEXT:    blr
1688;
1689; CHECK-P9-LABEL: st_cst_unalign64_vector:
1690; CHECK-P9:       # %bb.0: # %entry
1691; CHECK-P9-NEXT:    li r3, 29
1692; CHECK-P9-NEXT:    rldic r3, r3, 35, 24
1693; CHECK-P9-NEXT:    oris r3, r3, 54437
1694; CHECK-P9-NEXT:    ori r3, r3, 4097
1695; CHECK-P9-NEXT:    stxv v2, 0(r3)
1696; CHECK-P9-NEXT:    blr
1697;
1698; CHECK-P8-LE-LABEL: st_cst_unalign64_vector:
1699; CHECK-P8-LE:       # %bb.0: # %entry
1700; CHECK-P8-LE-NEXT:    li r3, 29
1701; CHECK-P8-LE-NEXT:    xxswapd vs0, v2
1702; CHECK-P8-LE-NEXT:    rldic r3, r3, 35, 24
1703; CHECK-P8-LE-NEXT:    oris r3, r3, 54437
1704; CHECK-P8-LE-NEXT:    ori r3, r3, 4097
1705; CHECK-P8-LE-NEXT:    stxvd2x vs0, 0, r3
1706; CHECK-P8-LE-NEXT:    blr
1707;
1708; CHECK-P8-BE-LABEL: st_cst_unalign64_vector:
1709; CHECK-P8-BE:       # %bb.0: # %entry
1710; CHECK-P8-BE-NEXT:    li r3, 29
1711; CHECK-P8-BE-NEXT:    rldic r3, r3, 35, 24
1712; CHECK-P8-BE-NEXT:    oris r3, r3, 54437
1713; CHECK-P8-BE-NEXT:    ori r3, r3, 4097
1714; CHECK-P8-BE-NEXT:    stxvw4x v2, 0, r3
1715; CHECK-P8-BE-NEXT:    blr
1716entry:
1717  store <16 x i8> %str, ptr inttoptr (i64 1000000000001 to ptr), align 16
1718  ret void
1719}
1720
1721; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
1722define dso_local void @st_cst_align64_vector(<16 x i8> %str) {
1723; CHECK-P10-LABEL: st_cst_align64_vector:
1724; CHECK-P10:       # %bb.0: # %entry
1725; CHECK-P10-NEXT:    pli r3, 244140625
1726; CHECK-P10-NEXT:    rldic r3, r3, 12, 24
1727; CHECK-P10-NEXT:    stxv v2, 0(r3)
1728; CHECK-P10-NEXT:    blr
1729;
1730; CHECK-P9-LABEL: st_cst_align64_vector:
1731; CHECK-P9:       # %bb.0: # %entry
1732; CHECK-P9-NEXT:    lis r3, 3725
1733; CHECK-P9-NEXT:    ori r3, r3, 19025
1734; CHECK-P9-NEXT:    rldic r3, r3, 12, 24
1735; CHECK-P9-NEXT:    stxv v2, 0(r3)
1736; CHECK-P9-NEXT:    blr
1737;
1738; CHECK-P8-LE-LABEL: st_cst_align64_vector:
1739; CHECK-P8-LE:       # %bb.0: # %entry
1740; CHECK-P8-LE-NEXT:    lis r3, 3725
1741; CHECK-P8-LE-NEXT:    xxswapd vs0, v2
1742; CHECK-P8-LE-NEXT:    ori r3, r3, 19025
1743; CHECK-P8-LE-NEXT:    rldic r3, r3, 12, 24
1744; CHECK-P8-LE-NEXT:    stxvd2x vs0, 0, r3
1745; CHECK-P8-LE-NEXT:    blr
1746;
1747; CHECK-P8-BE-LABEL: st_cst_align64_vector:
1748; CHECK-P8-BE:       # %bb.0: # %entry
1749; CHECK-P8-BE-NEXT:    lis r3, 3725
1750; CHECK-P8-BE-NEXT:    ori r3, r3, 19025
1751; CHECK-P8-BE-NEXT:    rldic r3, r3, 12, 24
1752; CHECK-P8-BE-NEXT:    stxvw4x v2, 0, r3
1753; CHECK-P8-BE-NEXT:    blr
1754entry:
1755  store <16 x i8> %str, ptr inttoptr (i64 1000000000000 to ptr), align 4096
1756  ret void
1757}
1758