xref: /llvm-project/llvm/test/CodeGen/PowerPC/vec_shift.ll (revision 5403c59c608c08c8ecd4303763f08eb046eb5e4d)
1; RUN: llc -verify-machineinstrs < %s  -mtriple=ppc32-- -mcpu=g5
2; PR3628
3
4define void @update(<4 x i32> %val, ptr %dst) nounwind {
5entry:
6	%shl = shl <4 x i32> %val, < i32 4, i32 3, i32 2, i32 1 >
7	%shr = ashr <4 x i32> %shl, < i32 1, i32 2, i32 3, i32 4 >
8	store <4 x i32> %shr, ptr %dst
9	ret void
10}
11