xref: /llvm-project/llvm/test/CodeGen/PowerPC/vec-extract-itofp.ll (revision 5403c59c608c08c8ecd4303763f08eb046eb5e4d)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mcpu=pwr9 -mtriple=powerpc64le-unknown-unknown -ppc-vsr-nums-as-vr \
3; RUN:   -relocation-model=pic -ppc-asm-full-reg-names -verify-machineinstrs \
4; RUN:   < %s | FileCheck %s
5; RUN: llc -mcpu=pwr9 -mtriple=powerpc64-unknown-unknown -ppc-vsr-nums-as-vr \
6; RUN:   -ppc-asm-full-reg-names -verify-machineinstrs \
7; RUN:   < %s | FileCheck %s -check-prefix=CHECK-BE
8
9define dso_local void @testutof(<8 x i16> %a, ptr nocapture %ptr) local_unnamed_addr #0 {
10; CHECK-LABEL: testutof:
11; CHECK:       # %bb.0: # %entry
12; CHECK-NEXT:    vextractuh v2, v2, 14
13; CHECK-NEXT:    xscvuxdsp f0, v2
14; CHECK-NEXT:    stfs f0, 0(r5)
15; CHECK-NEXT:    blr
16;
17; CHECK-BE-LABEL: testutof:
18; CHECK-BE:       # %bb.0: # %entry
19; CHECK-BE-NEXT:    vextractuh v2, v2, 0
20; CHECK-BE-NEXT:    xscvuxdsp f0, v2
21; CHECK-BE-NEXT:    stfs f0, 0(r5)
22; CHECK-BE-NEXT:    blr
23entry:
24  %vecext = extractelement <8 x i16> %a, i32 0
25  %conv = uitofp i16 %vecext to float
26  store float %conv, ptr %ptr, align 4
27  ret void
28}
29
30define dso_local void @testutod(<8 x i16> %a, ptr nocapture %ptr) local_unnamed_addr #0 {
31; CHECK-LABEL: testutod:
32; CHECK:       # %bb.0: # %entry
33; CHECK-NEXT:    vextractuh v2, v2, 14
34; CHECK-NEXT:    xscvuxddp f0, v2
35; CHECK-NEXT:    stfd f0, 0(r5)
36; CHECK-NEXT:    blr
37;
38; CHECK-BE-LABEL: testutod:
39; CHECK-BE:       # %bb.0: # %entry
40; CHECK-BE-NEXT:    vextractuh v2, v2, 0
41; CHECK-BE-NEXT:    xscvuxddp f0, v2
42; CHECK-BE-NEXT:    stfd f0, 0(r5)
43; CHECK-BE-NEXT:    blr
44entry:
45  %vecext = extractelement <8 x i16> %a, i32 0
46  %conv = uitofp i16 %vecext to double
47  store double %conv, ptr %ptr, align 8
48  ret void
49}
50
51define dso_local void @teststof(<8 x i16> %a, ptr nocapture %ptr) local_unnamed_addr #0 {
52; CHECK-LABEL: teststof:
53; CHECK:       # %bb.0: # %entry
54; CHECK-NEXT:    vextractuh v2, v2, 14
55; CHECK-NEXT:    vextsh2d v2, v2
56; CHECK-NEXT:    xscvsxdsp f0, v2
57; CHECK-NEXT:    stfs f0, 0(r5)
58; CHECK-NEXT:    blr
59;
60; CHECK-BE-LABEL: teststof:
61; CHECK-BE:       # %bb.0: # %entry
62; CHECK-BE-NEXT:    vextractuh v2, v2, 0
63; CHECK-BE-NEXT:    vextsh2d v2, v2
64; CHECK-BE-NEXT:    xscvsxdsp f0, v2
65; CHECK-BE-NEXT:    stfs f0, 0(r5)
66; CHECK-BE-NEXT:    blr
67entry:
68  %vecext = extractelement <8 x i16> %a, i32 0
69  %conv = sitofp i16 %vecext to float
70  store float %conv, ptr %ptr, align 4
71  ret void
72}
73
74define dso_local void @teststod(<8 x i16> %a, ptr nocapture %ptr) local_unnamed_addr #0 {
75; CHECK-LABEL: teststod:
76; CHECK:       # %bb.0: # %entry
77; CHECK-NEXT:    vextractuh v2, v2, 14
78; CHECK-NEXT:    vextsh2d v2, v2
79; CHECK-NEXT:    xscvsxddp f0, v2
80; CHECK-NEXT:    stfd f0, 0(r5)
81; CHECK-NEXT:    blr
82;
83; CHECK-BE-LABEL: teststod:
84; CHECK-BE:       # %bb.0: # %entry
85; CHECK-BE-NEXT:    vextractuh v2, v2, 0
86; CHECK-BE-NEXT:    vextsh2d v2, v2
87; CHECK-BE-NEXT:    xscvsxddp f0, v2
88; CHECK-BE-NEXT:    stfd f0, 0(r5)
89; CHECK-BE-NEXT:    blr
90entry:
91  %vecext = extractelement <8 x i16> %a, i32 0
92  %conv = sitofp i16 %vecext to double
93  store double %conv, ptr %ptr, align 8
94  ret void
95}
96
97define dso_local void @testsubtod(<16 x i8> %a, ptr nocapture %ptr) local_unnamed_addr #0 {
98; CHECK-LABEL: testsubtod:
99; CHECK:       # %bb.0: # %entry
100; CHECK-NEXT:    vextractub v2, v2, 15
101; CHECK-NEXT:    xscvuxddp f0, v2
102; CHECK-NEXT:    stfd f0, 0(r5)
103; CHECK-NEXT:    blr
104;
105; CHECK-BE-LABEL: testsubtod:
106; CHECK-BE:       # %bb.0: # %entry
107; CHECK-BE-NEXT:    vextractub v2, v2, 0
108; CHECK-BE-NEXT:    xscvuxddp f0, v2
109; CHECK-BE-NEXT:    stfd f0, 0(r5)
110; CHECK-BE-NEXT:    blr
111entry:
112  %vecext = extractelement <16 x i8> %a, i32 0
113  %conv = uitofp i8 %vecext to double
114  store double %conv, ptr %ptr, align 8
115  ret void
116}
117
118define dso_local void @testsbtod(<16 x i8> %a, ptr nocapture %ptr) local_unnamed_addr #0 {
119; CHECK-LABEL: testsbtod:
120; CHECK:       # %bb.0: # %entry
121; CHECK-NEXT:    vextractuh v2, v2, 15
122; CHECK-NEXT:    vextsh2d v2, v2
123; CHECK-NEXT:    xscvsxddp f0, v2
124; CHECK-NEXT:    stfd f0, 0(r5)
125; CHECK-NEXT:    blr
126;
127; CHECK-BE-LABEL: testsbtod:
128; CHECK-BE:       # %bb.0: # %entry
129; CHECK-BE-NEXT:    vextractub v2, v2, 0
130; CHECK-BE-NEXT:    vextsh2d v2, v2
131; CHECK-BE-NEXT:    xscvsxddp f0, v2
132; CHECK-BE-NEXT:    stfd f0, 0(r5)
133; CHECK-BE-NEXT:    blr
134entry:
135  %vecext = extractelement <16 x i8> %a, i32 0
136  %conv = sitofp i8 %vecext to double
137  store double %conv, ptr %ptr, align 8
138  ret void
139}
140
141define dso_local void @testsubtof(<16 x i8> %a, ptr nocapture %ptr) local_unnamed_addr #0 {
142; CHECK-LABEL: testsubtof:
143; CHECK:       # %bb.0: # %entry
144; CHECK-NEXT:    vextractub v2, v2, 15
145; CHECK-NEXT:    xscvuxdsp f0, v2
146; CHECK-NEXT:    stfs f0, 0(r5)
147; CHECK-NEXT:    blr
148;
149; CHECK-BE-LABEL: testsubtof:
150; CHECK-BE:       # %bb.0: # %entry
151; CHECK-BE-NEXT:    vextractub v2, v2, 0
152; CHECK-BE-NEXT:    xscvuxdsp f0, v2
153; CHECK-BE-NEXT:    stfs f0, 0(r5)
154; CHECK-BE-NEXT:    blr
155entry:
156  %vecext = extractelement <16 x i8> %a, i32 0
157  %conv = uitofp i8 %vecext to float
158  store float %conv, ptr %ptr, align 8
159  ret void
160}
161
162define dso_local void @testsbtof(<16 x i8> %a, ptr nocapture %ptr) local_unnamed_addr #0 {
163; CHECK-LABEL: testsbtof:
164; CHECK:       # %bb.0: # %entry
165; CHECK-NEXT:    vextractub v2, v2, 15
166; CHECK-NEXT:    vextsh2d v2, v2
167; CHECK-NEXT:    xscvsxdsp f0, v2
168; CHECK-NEXT:    stfs f0, 0(r5)
169; CHECK-NEXT:    blr
170;
171; CHECK-BE-LABEL: testsbtof:
172; CHECK-BE:       # %bb.0: # %entry
173; CHECK-BE-NEXT:    vextractub v2, v2, 0
174; CHECK-BE-NEXT:    vextsh2d v2, v2
175; CHECK-BE-NEXT:    xscvsxdsp f0, v2
176; CHECK-BE-NEXT:    stfs f0, 0(r5)
177; CHECK-BE-NEXT:    blr
178entry:
179  %vecext = extractelement <16 x i8> %a, i32 0
180  %conv = sitofp i8 %vecext to float
181  store float %conv, ptr %ptr, align 8
182  ret void
183}
184