1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -verify-machineinstrs -ppc-asm-full-reg-names < %s -mtriple=powerpc-unknown-linux-gnu | FileCheck -check-prefix=P32 %s 3; RUN: llc -verify-machineinstrs -ppc-asm-full-reg-names < %s -mtriple=powerpc64-unknown-linux-gnu | FileCheck -check-prefix=P64 %s 4; RUN: llc -verify-machineinstrs -ppc-asm-full-reg-names < %s -mtriple=powerpc64le-unknown-linux-gnu | FileCheck -check-prefix=P64 %s 5 6; PR8327 7define ptr @test1(ptr %foo) nounwind { 8; P32-LABEL: test1: 9; P32: # %bb.0: 10; P32-NEXT: lbz r5, 0(r3) 11; P32-NEXT: lwz r4, 4(r3) 12; P32-NEXT: addi r6, r5, 1 13; P32-NEXT: cmpwi r5, 8 14; P32-NEXT: stb r6, 0(r3) 15; P32-NEXT: mr r6, r4 16; P32-NEXT: bge cr0, .LBB0_3 17; P32-NEXT: # %bb.1: 18; P32-NEXT: stw r6, 4(r3) 19; P32-NEXT: blt cr0, .LBB0_4 20; P32-NEXT: .LBB0_2: 21; P32-NEXT: lwz r3, 0(r4) 22; P32-NEXT: blr 23; P32-NEXT: .LBB0_3: 24; P32-NEXT: addi r6, r4, 4 25; P32-NEXT: stw r6, 4(r3) 26; P32-NEXT: bge cr0, .LBB0_2 27; P32-NEXT: .LBB0_4: 28; P32-NEXT: lwz r3, 8(r3) 29; P32-NEXT: slwi r4, r5, 2 30; P32-NEXT: add r4, r3, r4 31; P32-NEXT: lwz r3, 0(r4) 32; P32-NEXT: blr 33; 34; P64-LABEL: test1: 35; P64: # %bb.0: 36; P64-NEXT: ld r4, 0(r3) 37; P64-NEXT: addi r5, r4, 8 38; P64-NEXT: std r5, 0(r3) 39; P64-NEXT: ld r3, 0(r4) 40; P64-NEXT: blr 41 %A = va_arg ptr %foo, ptr 42 ret ptr %A 43} 44 45 46