xref: /llvm-project/llvm/test/CodeGen/PowerPC/toc-data-common.ll (revision a51712751c184ebe056718c938d2526693a31564)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mcpu=ppc -mtriple powerpc-ibm-aix-xcoff -verify-machineinstrs < %s | FileCheck %s --check-prefix=CHECK
3; RUN: llc -mcpu=ppc -mtriple powerpc64-ibm-aix-xcoff -verify-machineinstrs < %s | FileCheck %s --check-prefix=CHECK-64
4
5; RUN: llc -filetype=obj -mcpu=ppc -mtriple powerpc-ibm-aix-xcoff -verify-machineinstrs < %s -o %t32.o
6; RUN: llvm-objdump -t --symbol-description %t32.o | FileCheck %s --check-prefix=OBJ32
7
8; RUN: llc -filetype=obj -mcpu=ppc -mtriple powerpc64-ibm-aix-xcoff -verify-machineinstrs < %s -o %t64.o
9; RUN: llvm-objdump -t --symbol-description %t64.o | FileCheck %s --check-prefix=OBJ64
10
11@a1 = common global i32 0, align 4 #0
12@a2 = global i32 0, align 4 #0
13@a3 = common global i32 0, align 4
14@a4 = global i32 0, align 4
15
16define void @set(i32 noundef %_a) {
17; CHECK-LABEL: set:
18; CHECK:       # %bb.0: # %entry
19; CHECK-NEXT:    la 4, a2[TD](2)
20; CHECK-NEXT:    lwz 5, L..C0(2) # @a4
21; CHECK-NEXT:    stw 3, 0(4)
22; CHECK-NEXT:    la 4, a1[TD](2)
23; CHECK-NEXT:    stw 3, 0(4)
24; CHECK-NEXT:    lwz 4, L..C1(2) # @a3
25; CHECK-NEXT:    stw 3, 0(5)
26; CHECK-NEXT:    stw 3, 0(4)
27; CHECK-NEXT:    blr
28;
29; CHECK-64-LABEL: set:
30; CHECK-64:       # %bb.0: # %entry
31; CHECK-64-NEXT:    la 4, a2[TD](2)
32; CHECK-64-NEXT:    ld 5, L..C0(2) # @a4
33; CHECK-64-NEXT:    stw 3, 0(4)
34; CHECK-64-NEXT:    la 4, a1[TD](2)
35; CHECK-64-NEXT:    stw 3, 0(4)
36; CHECK-64-NEXT:    ld 4, L..C1(2) # @a3
37; CHECK-64-NEXT:    stw 3, 0(5)
38; CHECK-64-NEXT:    stw 3, 0(4)
39; CHECK-64-NEXT:    blr
40entry:
41store i32 %_a, ptr @a2, align 4
42store i32 %_a, ptr @a1, align 4
43store i32 %_a, ptr @a4, align 4
44store i32 %_a, ptr @a3, align 4
45ret void
46}
47
48define i32 @get1() {
49; CHECK-LABEL: get1:
50; CHECK:       # %bb.0: # %entry
51; CHECK-NEXT:    la 3, a2[TD](2)
52; CHECK-NEXT:    lwz 3, 0(3)
53; CHECK-NEXT:    blr
54;
55; CHECK-64-LABEL: get1:
56; CHECK-64:       # %bb.0: # %entry
57; CHECK-64-NEXT:    la 3, a2[TD](2)
58; CHECK-64-NEXT:    lwz 3, 0(3)
59; CHECK-64-NEXT:    blr
60entry:
61%0 = load i32, ptr @a2, align 4
62ret i32 %0
63}
64
65define i32 @get2() {
66; CHECK-LABEL: get2:
67; CHECK:       # %bb.0: # %entry
68; CHECK-NEXT:    la 3, a1[TD](2)
69; CHECK-NEXT:    lwz 3, 0(3)
70; CHECK-NEXT:    blr
71;
72; CHECK-64-LABEL: get2:
73; CHECK-64:       # %bb.0: # %entry
74; CHECK-64-NEXT:    la 3, a1[TD](2)
75; CHECK-64-NEXT:    lwz 3, 0(3)
76; CHECK-64-NEXT:    blr
77entry:
78%0 = load i32, ptr @a1, align 4
79ret i32 %0
80}
81
82define i32 @get3() {
83; CHECK-LABEL: get3:
84; CHECK:       # %bb.0: # %entry
85; CHECK-NEXT:    lwz 3, L..C0(2) # @a4
86; CHECK-NEXT:    lwz 3, 0(3)
87; CHECK-NEXT:    blr
88;
89; CHECK-64-LABEL: get3:
90; CHECK-64:       # %bb.0: # %entry
91; CHECK-64-NEXT:    ld 3, L..C0(2) # @a4
92; CHECK-64-NEXT:    lwz 3, 0(3)
93; CHECK-64-NEXT:    blr
94entry:
95%0 = load i32, ptr @a4, align 4
96ret i32 %0
97}
98
99define i32 @get4() {
100; CHECK-LABEL: get4:
101; CHECK:       # %bb.0: # %entry
102; CHECK-NEXT:    lwz 3, L..C1(2) # @a3
103; CHECK-NEXT:    lwz 3, 0(3)
104; CHECK-NEXT:    blr
105;
106; CHECK-64-LABEL: get4:
107; CHECK-64:       # %bb.0: # %entry
108; CHECK-64-NEXT:    ld 3, L..C1(2) # @a3
109; CHECK-64-NEXT:    lwz 3, 0(3)
110; CHECK-64-NEXT:    blr
111entry:
112%0 = load i32, ptr @a3, align 4
113ret i32 %0
114}
115
116define nonnull ptr @escape1() {
117; CHECK-LABEL: escape1:
118; CHECK:       # %bb.0: # %entry
119; CHECK-NEXT:    la 3, a2[TD](2)
120; CHECK-NEXT:    blr
121;
122; CHECK-64-LABEL: escape1:
123; CHECK-64:       # %bb.0: # %entry
124; CHECK-64-NEXT:    la 3, a2[TD](2)
125; CHECK-64-NEXT:    blr
126entry:
127ret ptr @a2
128}
129
130define nonnull ptr @escape2() {
131; CHECK-LABEL: escape2:
132; CHECK:       # %bb.0: # %entry
133; CHECK-NEXT:    la 3, a1[TD](2)
134; CHECK-NEXT:    blr
135;
136; CHECK-64-LABEL: escape2:
137; CHECK-64:       # %bb.0: # %entry
138; CHECK-64-NEXT:    la 3, a1[TD](2)
139; CHECK-64-NEXT:    blr
140entry:
141ret ptr @a1
142}
143
144define nonnull ptr @escape3() {
145; CHECK-LABEL: escape3:
146; CHECK:       # %bb.0: # %entry
147; CHECK-NEXT:    lwz 3, L..C0(2) # @a4
148; CHECK-NEXT:    blr
149;
150; CHECK-64-LABEL: escape3:
151; CHECK-64:       # %bb.0: # %entry
152; CHECK-64-NEXT:    ld 3, L..C0(2) # @a4
153; CHECK-64-NEXT:    blr
154entry:
155ret ptr @a4
156}
157
158define nonnull ptr @escape4() {
159; CHECK-LABEL: escape4:
160; CHECK:       # %bb.0: # %entry
161; CHECK-NEXT:    lwz 3, L..C1(2) # @a3
162; CHECK-NEXT:    blr
163;
164; CHECK-64-LABEL: escape4:
165; CHECK-64:       # %bb.0: # %entry
166; CHECK-64-NEXT:    ld 3, L..C1(2) # @a3
167; CHECK-64-NEXT:    blr
168entry:
169ret ptr @a3
170}
171
172attributes #0 = { "toc-data" }
173
174; CHECK: .comm a3[RW],4,2 # @a3
175; CHECK-NEXT: .csect a4[RW],2
176; CHECK-NEXT: .globl a4[RW] # @a4
177; CHECK-NEXT: .align 2
178; CHECK-NEXT: .vbyte 4, 0 # 0x0
179; CHECK-NEXT: .toc
180; CHECK-LABEL: L..C0:
181; CHECK-NEXT: .tc a4[TC],a4[RW]
182; CHECK-LABEL: L..C1:
183; CHECK-NEXT: .tc a3[TC],a3[RW]
184; CHECK-NEXT: .csect a2[TD],2
185; CHECK-NEXT: .globl a2[TD] # @a2
186; CHECK-NEXT: .align 2
187; CHECK-NEXT: .vbyte 4, 0 # 0x0
188; CHECK-NEXT: .comm a1[TD],4,2 # @a1
189
190; OBJ32:       {{([[:xdigit:]]{8})}} g     O .data  00000004 (idx: {{[0-9]+}}) a4[RW]
191; OBJ32-LABEL: {{([[:xdigit:]]{8})}} l       .data  00000000 (idx: {{[0-9]+}}) TOC[TC0]
192; OBJ32-NEXT:  {{([[:xdigit:]]{8})}} l     O .data  00000004 (idx: {{[0-9]+}}) a4[TC]
193; OBJ32-NEXT:  {{([[:xdigit:]]{8})}} l     O .data  00000004 (idx: {{[0-9]+}}) a3[TC]
194; OBJ32-NEXT:  {{([[:xdigit:]]{8})}} g     O .data  00000004 (idx: {{[0-9]+}}) a2[TD]
195; OBJ32-NEXT:  {{([[:xdigit:]]{8})}} g     O *COM*  00000004 (idx: {{[0-9]+}}) a1[TD]
196; OBJ32-NEXT:  {{([[:xdigit:]]{8})}} g     O *COM*  00000004 (idx: {{[0-9]+}}) a3[RW]
197
198; OBJ64:       {{([[:xdigit:]]{16})}} g     O .data  0000000000000004 (idx: {{[0-9]+}}) a4[RW]
199; OBJ64-LABEL: {{([[:xdigit:]]{16})}} l       .data  0000000000000000 (idx: {{[0-9]+}}) TOC[TC0]
200; OBJ64-NEXT:  {{([[:xdigit:]]{16})}} l     O .data  0000000000000008 (idx: {{[0-9]+}}) a4[TC]
201; OBJ64-NEXT:  {{([[:xdigit:]]{16})}} l     O .data  0000000000000008 (idx: {{[0-9]+}}) a3[TC]
202; OBJ64-NEXT:  {{([[:xdigit:]]{16})}} g     O .data  0000000000000004 (idx: {{[0-9]+}}) a2[TD]
203; OBJ64-NEXT:  {{([[:xdigit:]]{16})}} g     O *COM*  0000000000000004 (idx: {{[0-9]+}}) a1[TD]
204; OBJ64-NEXT:  {{([[:xdigit:]]{16})}} g     O *COM*  0000000000000004 (idx: {{[0-9]+}}) a3[RW]
205