xref: /llvm-project/llvm/test/CodeGen/PowerPC/testComparesllgeus.ll (revision b922a3621116b404d868af8b74cab25ab78555be)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \
3; RUN:   -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
4; RUN:  --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
5; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \
6; RUN:   -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
7; RUN:  --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
8
9@glob = dso_local local_unnamed_addr global i16 0, align 2
10
11; Function Attrs: norecurse nounwind readnone
12define i64 @test_llgeus(i16 zeroext %a, i16 zeroext %b) {
13; CHECK-LABEL: test_llgeus:
14; CHECK:       # %bb.0: # %entry
15; CHECK-NEXT:    sub r3, r3, r4
16; CHECK-NEXT:    not r3, r3
17; CHECK-NEXT:    rldicl r3, r3, 1, 63
18; CHECK-NEXT:    blr
19entry:
20  %cmp = icmp uge i16 %a, %b
21  %conv3 = zext i1 %cmp to i64
22  ret i64 %conv3
23}
24
25; Function Attrs: norecurse nounwind readnone
26define i64 @test_llgeus_sext(i16 zeroext %a, i16 zeroext %b) {
27; CHECK-LABEL: test_llgeus_sext:
28; CHECK:       # %bb.0: # %entry
29; CHECK-NEXT:    sub r3, r3, r4
30; CHECK-NEXT:    rldicl r3, r3, 1, 63
31; CHECK-NEXT:    addi r3, r3, -1
32; CHECK-NEXT:    blr
33entry:
34  %cmp = icmp uge i16 %a, %b
35  %conv3 = sext i1 %cmp to i64
36  ret i64 %conv3
37}
38
39; Function Attrs: norecurse nounwind readnone
40define i64 @test_llgeus_z(i16 zeroext %a) {
41; CHECK-LABEL: test_llgeus_z:
42; CHECK:       # %bb.0: # %entry
43; CHECK-NEXT:    li r3, 1
44; CHECK-NEXT:    blr
45entry:
46  %cmp = icmp uge i16 %a, 0
47  %conv1 = zext i1 %cmp to i64
48  ret i64 %conv1
49}
50
51; Function Attrs: norecurse nounwind readnone
52define i64 @test_llgeus_sext_z(i16 zeroext %a) {
53; CHECK-LABEL: test_llgeus_sext_z:
54; CHECK:       # %bb.0: # %entry
55; CHECK-NEXT:    li r3, -1
56; CHECK-NEXT:    blr
57entry:
58  %cmp = icmp uge i16 %a, 0
59  %conv1 = sext i1 %cmp to i64
60  ret i64 %conv1
61}
62
63; Function Attrs: norecurse nounwind
64define dso_local void @test_llgeus_store(i16 zeroext %a, i16 zeroext %b) {
65; CHECK-LABEL: test_llgeus_store:
66; CHECK:       # %bb.0: # %entry
67; CHECK-NEXT:    sub r3, r3, r4
68; CHECK-NEXT:    addis r4, r2, glob@toc@ha
69; CHECK-NEXT:    not r3, r3
70; CHECK-NEXT:    rldicl r3, r3, 1, 63
71; CHECK-NEXT:    sth r3, glob@toc@l(r4)
72; CHECK-NEXT:    blr
73entry:
74  %cmp = icmp uge i16 %a, %b
75  %conv3 = zext i1 %cmp to i16
76  store i16 %conv3, ptr @glob
77  ret void
78}
79
80; Function Attrs: norecurse nounwind
81define dso_local void @test_llgeus_sext_store(i16 zeroext %a, i16 zeroext %b) {
82; CHECK-LABEL: test_llgeus_sext_store:
83; CHECK:       # %bb.0: # %entry
84; CHECK-NEXT:    sub r3, r3, r4
85; CHECK-NEXT:    addis r4, r2, glob@toc@ha
86; CHECK-NEXT:    rldicl r3, r3, 1, 63
87; CHECK-NEXT:    addi r3, r3, -1
88; CHECK-NEXT:    sth r3, glob@toc@l(r4)
89; CHECK-NEXT:    blr
90entry:
91  %cmp = icmp uge i16 %a, %b
92  %conv3 = sext i1 %cmp to i16
93  store i16 %conv3, ptr @glob
94  ret void
95}
96
97; Function Attrs: norecurse nounwind
98define dso_local void @test_llgeus_z_store(i16 zeroext %a) {
99; CHECK-LABEL: test_llgeus_z_store:
100; CHECK:       # %bb.0: # %entry
101; CHECK-NEXT:    addis r3, r2, glob@toc@ha
102; CHECK-NEXT:    li r4, 1
103; CHECK-NEXT:    sth r4, glob@toc@l(r3)
104; CHECK-NEXT:    blr
105entry:
106  %cmp = icmp uge i16 %a, 0
107  %conv1 = zext i1 %cmp to i16
108  store i16 %conv1, ptr @glob
109  ret void
110}
111
112; Function Attrs: norecurse nounwind
113define dso_local void @test_llgeus_sext_z_store(i16 zeroext %a) {
114; CHECK-LABEL: test_llgeus_sext_z_store:
115; CHECK:       # %bb.0: # %entry
116; CHECK-NEXT:    addis r3, r2, glob@toc@ha
117; CHECK-NEXT:    li r4, -1
118; CHECK-NEXT:    sth r4, glob@toc@l(r3)
119; CHECK-NEXT:    blr
120entry:
121  %cmp = icmp uge i16 %a, 0
122  %conv1 = sext i1 %cmp to i16
123  store i16 %conv1, ptr @glob
124  ret void
125}
126
127