xref: /llvm-project/llvm/test/CodeGen/PowerPC/testComparesiltsll.ll (revision b922a3621116b404d868af8b74cab25ab78555be)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \
3; RUN:   -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
4; RUN:  --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
5; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \
6; RUN:   -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
7; RUN:  --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
8
9@glob = dso_local local_unnamed_addr global i64 0, align 8
10
11; Function Attrs: norecurse nounwind readnone
12define dso_local signext i32 @test_iltsll(i64 %a, i64 %b) {
13; CHECK-LABEL: test_iltsll:
14; CHECK:       # %bb.0: # %entry
15; CHECK-NEXT:    sradi r5, r3, 63
16; CHECK-NEXT:    rldicl r6, r4, 1, 63
17; CHECK-NEXT:    subc r3, r3, r4
18; CHECK-NEXT:    adde r3, r6, r5
19; CHECK-NEXT:    xori r3, r3, 1
20; CHECK-NEXT:    blr
21entry:
22  %cmp = icmp slt i64 %a, %b
23  %conv = zext i1 %cmp to i32
24  ret i32 %conv
25}
26
27; Function Attrs: norecurse nounwind readnone
28define dso_local signext i32 @test_iltsll_sext(i64 %a, i64 %b) {
29; CHECK-LABEL: test_iltsll_sext:
30; CHECK:       # %bb.0: # %entry
31; CHECK-NEXT:    sradi r5, r3, 63
32; CHECK-NEXT:    rldicl r6, r4, 1, 63
33; CHECK-NEXT:    subc r3, r3, r4
34; CHECK-NEXT:    adde r3, r6, r5
35; CHECK-NEXT:    xori r3, r3, 1
36; CHECK-NEXT:    neg r3, r3
37; CHECK-NEXT:    blr
38entry:
39  %cmp = icmp slt i64 %a, %b
40  %sub = sext i1 %cmp to i32
41  ret i32 %sub
42}
43
44; Function Attrs: norecurse nounwind readnone
45define dso_local signext i32 @test_iltsll_sext_z(i64 %a) {
46; CHECK-LABEL: test_iltsll_sext_z:
47; CHECK:       # %bb.0: # %entry
48; CHECK-NEXT:    sradi r3, r3, 63
49; CHECK-NEXT:    blr
50entry:
51  %cmp = icmp slt i64 %a, 0
52  %sub = sext i1 %cmp to i32
53  ret i32 %sub
54}
55
56; Function Attrs: norecurse nounwind
57define dso_local void @test_iltsll_store(i64 %a, i64 %b) {
58; CHECK-LABEL: test_iltsll_store:
59; CHECK:       # %bb.0: # %entry
60; CHECK-NEXT:    sradi r5, r3, 63
61; CHECK-NEXT:    rldicl r6, r4, 1, 63
62; CHECK-NEXT:    subc r3, r3, r4
63; CHECK-NEXT:    addis r4, r2, glob@toc@ha
64; CHECK-NEXT:    adde r3, r6, r5
65; CHECK-NEXT:    xori r3, r3, 1
66; CHECK-NEXT:    std r3, glob@toc@l(r4)
67; CHECK-NEXT:    blr
68entry:
69  %cmp = icmp slt i64 %a, %b
70  %conv1 = zext i1 %cmp to i64
71  store i64 %conv1, ptr @glob, align 8
72  ret void
73}
74
75; Function Attrs: norecurse nounwind
76define dso_local void @test_iltsll_sext_store(i64 %a, i64 %b) {
77; CHECK-LABEL: test_iltsll_sext_store:
78; CHECK:       # %bb.0: # %entry
79; CHECK-NEXT:    sradi r5, r3, 63
80; CHECK-NEXT:    rldicl r6, r4, 1, 63
81; CHECK-NEXT:    subc r3, r3, r4
82; CHECK-NEXT:    addis r4, r2, glob@toc@ha
83; CHECK-NEXT:    adde r3, r6, r5
84; CHECK-NEXT:    xori r3, r3, 1
85; CHECK-NEXT:    neg r3, r3
86; CHECK-NEXT:    std r3, glob@toc@l(r4)
87; CHECK-NEXT:    blr
88entry:
89  %cmp = icmp slt i64 %a, %b
90  %conv1 = sext i1 %cmp to i64
91  store i64 %conv1, ptr @glob, align 8
92  ret void
93}
94
95; Function Attrs: norecurse nounwind
96define dso_local void @test_iltsll_sext_z_store(i64 %a) {
97; CHECK-LABEL: test_iltsll_sext_z_store:
98; CHECK:       # %bb.0: # %entry
99; CHECK-NEXT:    sradi r3, r3, 63
100; CHECK-NEXT:    addis r4, r2, glob@toc@ha
101; CHECK-NEXT:    std r3, glob@toc@l(r4)
102; CHECK-NEXT:    blr
103entry:
104  %cmp = icmp slt i64 %a, 0
105  %conv2 = sext i1 %cmp to i64
106  store i64 %conv2, ptr @glob, align 8
107  ret void
108}
109