1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \ 3; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \ 4; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl 5; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \ 6; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \ 7; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl 8 9@glob = dso_local local_unnamed_addr global i8 0, align 1 10 11; Function Attrs: norecurse nounwind readnone 12define dso_local signext i32 @test_igeuc(i8 zeroext %a, i8 zeroext %b) { 13; CHECK-LABEL: test_igeuc: 14; CHECK: # %bb.0: # %entry 15; CHECK-NEXT: sub r3, r3, r4 16; CHECK-NEXT: not r3, r3 17; CHECK-NEXT: rldicl r3, r3, 1, 63 18; CHECK-NEXT: blr 19entry: 20 %cmp = icmp uge i8 %a, %b 21 %conv2 = zext i1 %cmp to i32 22 ret i32 %conv2 23} 24 25; Function Attrs: norecurse nounwind readnone 26define dso_local signext i32 @test_igeuc_sext(i8 zeroext %a, i8 zeroext %b) { 27; CHECK-LABEL: test_igeuc_sext: 28; CHECK: # %bb.0: # %entry 29; CHECK-NEXT: sub r3, r3, r4 30; CHECK-NEXT: rldicl r3, r3, 1, 63 31; CHECK-NEXT: addi r3, r3, -1 32; CHECK-NEXT: blr 33entry: 34 %cmp = icmp uge i8 %a, %b 35 %sub = sext i1 %cmp to i32 36 ret i32 %sub 37 38} 39 40; Function Attrs: norecurse nounwind readnone 41define dso_local signext i32 @test_igeuc_z(i8 zeroext %a) { 42; CHECK-LABEL: test_igeuc_z: 43; CHECK: # %bb.0: # %entry 44; CHECK-NEXT: li r3, 1 45; CHECK-NEXT: blr 46entry: 47 %cmp = icmp uge i8 %a, 0 48 %conv2 = zext i1 %cmp to i32 49 ret i32 %conv2 50} 51 52; Function Attrs: norecurse nounwind readnone 53define dso_local signext i32 @test_igeuc_sext_z(i8 zeroext %a) { 54; CHECK-LABEL: test_igeuc_sext_z: 55; CHECK: # %bb.0: # %entry 56; CHECK-NEXT: li r3, -1 57; CHECK-NEXT: blr 58entry: 59 %cmp = icmp uge i8 %a, 0 60 %conv2 = sext i1 %cmp to i32 61 ret i32 %conv2 62} 63 64; Function Attrs: norecurse nounwind 65define dso_local void @test_igeuc_store(i8 zeroext %a, i8 zeroext %b) { 66; CHECK-LABEL: test_igeuc_store: 67; CHECK: # %bb.0: # %entry 68; CHECK-NEXT: sub r3, r3, r4 69; CHECK-NEXT: addis r4, r2, glob@toc@ha 70; CHECK-NEXT: not r3, r3 71; CHECK-NEXT: rldicl r3, r3, 1, 63 72; CHECK-NEXT: stb r3, glob@toc@l(r4) 73; CHECK-NEXT: blr 74entry: 75 %cmp = icmp uge i8 %a, %b 76 %conv3 = zext i1 %cmp to i8 77 store i8 %conv3, ptr @glob 78 ret void 79} 80 81; Function Attrs: norecurse nounwind 82define dso_local void @test_igeuc_sext_store(i8 zeroext %a, i8 zeroext %b) { 83; CHECK-LABEL: test_igeuc_sext_store: 84; CHECK: # %bb.0: # %entry 85; CHECK-NEXT: sub r3, r3, r4 86; CHECK-NEXT: addis r4, r2, glob@toc@ha 87; CHECK-NEXT: rldicl r3, r3, 1, 63 88; CHECK-NEXT: addi r3, r3, -1 89; CHECK-NEXT: stb r3, glob@toc@l(r4) 90; CHECK-NEXT: blr 91entry: 92 %cmp = icmp uge i8 %a, %b 93 %conv3 = sext i1 %cmp to i8 94 store i8 %conv3, ptr @glob 95 ret void 96; CHECK-TBD-LABEL: @test_igeuc_sext_store 97; CHECK-TBD: subf [[REG1:r[0-9]+]], r3, r4 98; CHECK-TBD: rldicl [[REG2:r[0-9]+]], [[REG1]], 1, 63 99; CHECK-TBD: addi [[REG3:r[0-9]+]], [[REG2]], -1 100; CHECK-TBD: stb [[REG3]] 101; CHECK-TBD: blr 102} 103 104; Function Attrs : norecurse nounwind 105define dso_local void @test_igeuc_z_store(i8 zeroext %a) { 106; CHECK-LABEL: test_igeuc_z_store: 107; CHECK: # %bb.0: # %entry 108; CHECK-NEXT: addis r3, r2, glob@toc@ha 109; CHECK-NEXT: li r4, 1 110; CHECK-NEXT: stb r4, glob@toc@l(r3) 111; CHECK-NEXT: blr 112entry: 113 %cmp = icmp uge i8 %a, 0 114 %conv3 = zext i1 %cmp to i8 115 store i8 %conv3, ptr @glob 116 ret void 117} 118 119; Function Attrs: norecurse nounwind 120define dso_local void @test_igeuc_sext_z_store(i8 zeroext %a) { 121; CHECK-LABEL: test_igeuc_sext_z_store: 122; CHECK: # %bb.0: # %entry 123; CHECK-NEXT: addis r3, r2, glob@toc@ha 124; CHECK-NEXT: li r4, -1 125; CHECK-NEXT: stb r4, glob@toc@l(r3) 126; CHECK-NEXT: blr 127entry: 128 %cmp = icmp uge i8 %a, 0 129 %conv3 = sext i1 %cmp to i8 130 store i8 %conv3, ptr @glob 131 ret void 132} 133