1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr8 -verify-machineinstrs | FileCheck %s 3 4@CVal = external local_unnamed_addr global i8, align 1 5@SVal = external local_unnamed_addr global i16, align 2 6@IVal = external local_unnamed_addr global i32, align 4 7@LVal = external local_unnamed_addr global i64, align 8 8@USVal = external local_unnamed_addr global i16, align 2 9@arr = external local_unnamed_addr global ptr, align 8 10@arri = external local_unnamed_addr global ptr, align 8 11 12; Test the same constant can be used by different stores. 13 14%struct.S = type { i64, i8, i16, i32 } 15 16define void @foo(ptr %p) { 17; CHECK-LABEL: foo: 18; CHECK: # %bb.0: 19; CHECK-NEXT: li 4, 0 20; CHECK-NEXT: std 4, 0(3) 21; CHECK-NEXT: stb 4, 8(3) 22; CHECK-NEXT: sth 4, 10(3) 23; CHECK-NEXT: stw 4, 12(3) 24; CHECK-NEXT: blr 25 store i64 0, ptr %p, align 8 26 %c = getelementptr %struct.S, ptr %p, i64 0, i32 1 27 store i8 0, ptr %c, align 8 28 %s = getelementptr %struct.S, ptr %p, i64 0, i32 2 29 store i16 0, ptr %s, align 2 30 %i = getelementptr %struct.S, ptr %p, i64 0, i32 3 31 store i32 0, ptr %i, align 4 32 ret void 33 34} 35 36define void @bar(ptr %p) { 37; CHECK-LABEL: bar: 38; CHECK: # %bb.0: 39; CHECK-NEXT: li 4, 2 40; CHECK-NEXT: stw 4, 12(3) 41; CHECK-NEXT: sth 4, 10(3) 42; CHECK-NEXT: stb 4, 8(3) 43; CHECK-NEXT: std 4, 0(3) 44; CHECK-NEXT: blr 45 %i = getelementptr %struct.S, ptr %p, i64 0, i32 3 46 store i32 2, ptr %i, align 4 47 %s = getelementptr %struct.S, ptr %p, i64 0, i32 2 48 store i16 2, ptr %s, align 2 49 %c = getelementptr %struct.S, ptr %p, i64 0, i32 1 50 store i8 2, ptr %c, align 8 51 store i64 2, ptr %p, align 8 52 ret void 53 54} 55 56; Function Attrs: norecurse nounwind 57define void @setSmallNeg() { 58; CHECK-LABEL: setSmallNeg: 59; CHECK: # %bb.0: # %entry 60; CHECK-NEXT: addis 3, 2, .LC0@toc@ha 61; CHECK-NEXT: li 4, -7 62; CHECK-NEXT: ld 3, .LC0@toc@l(3) 63; CHECK-NEXT: stb 4, 0(3) 64; CHECK-NEXT: addis 3, 2, .LC1@toc@ha 65; CHECK-NEXT: ld 3, .LC1@toc@l(3) 66; CHECK-NEXT: sth 4, 0(3) 67; CHECK-NEXT: addis 3, 2, .LC2@toc@ha 68; CHECK-NEXT: ld 3, .LC2@toc@l(3) 69; CHECK-NEXT: stw 4, 0(3) 70; CHECK-NEXT: addis 3, 2, .LC3@toc@ha 71; CHECK-NEXT: ld 3, .LC3@toc@l(3) 72; CHECK-NEXT: std 4, 0(3) 73; CHECK-NEXT: blr 74entry: 75 store i8 -7, ptr @CVal, align 1 76 store i16 -7, ptr @SVal, align 2 77 store i32 -7, ptr @IVal, align 4 78 store i64 -7, ptr @LVal, align 8 79 ret void 80} 81 82; Function Attrs: norecurse nounwind 83define void @setSmallPos() { 84; CHECK-LABEL: setSmallPos: 85; CHECK: # %bb.0: # %entry 86; CHECK-NEXT: addis 3, 2, .LC0@toc@ha 87; CHECK-NEXT: li 4, 8 88; CHECK-NEXT: ld 3, .LC0@toc@l(3) 89; CHECK-NEXT: stb 4, 0(3) 90; CHECK-NEXT: addis 3, 2, .LC1@toc@ha 91; CHECK-NEXT: ld 3, .LC1@toc@l(3) 92; CHECK-NEXT: sth 4, 0(3) 93; CHECK-NEXT: addis 3, 2, .LC2@toc@ha 94; CHECK-NEXT: ld 3, .LC2@toc@l(3) 95; CHECK-NEXT: stw 4, 0(3) 96; CHECK-NEXT: addis 3, 2, .LC3@toc@ha 97; CHECK-NEXT: ld 3, .LC3@toc@l(3) 98; CHECK-NEXT: std 4, 0(3) 99; CHECK-NEXT: blr 100entry: 101 store i8 8, ptr @CVal, align 1 102 store i16 8, ptr @SVal, align 2 103 store i32 8, ptr @IVal, align 4 104 store i64 8, ptr @LVal, align 8 105 ret void 106} 107 108; Function Attrs: norecurse nounwind 109define void @setMaxNeg() { 110; CHECK-LABEL: setMaxNeg: 111; CHECK: # %bb.0: # %entry 112; CHECK-NEXT: addis 3, 2, .LC1@toc@ha 113; CHECK-NEXT: li 4, -32768 114; CHECK-NEXT: ld 3, .LC1@toc@l(3) 115; CHECK-NEXT: sth 4, 0(3) 116; CHECK-NEXT: addis 3, 2, .LC2@toc@ha 117; CHECK-NEXT: ld 3, .LC2@toc@l(3) 118; CHECK-NEXT: stw 4, 0(3) 119; CHECK-NEXT: addis 3, 2, .LC3@toc@ha 120; CHECK-NEXT: ld 3, .LC3@toc@l(3) 121; CHECK-NEXT: std 4, 0(3) 122; CHECK-NEXT: blr 123entry: 124 store i16 -32768, ptr @SVal, align 2 125 store i32 -32768, ptr @IVal, align 4 126 store i64 -32768, ptr @LVal, align 8 127 ret void 128} 129 130; Function Attrs: norecurse nounwind 131define void @setMaxPos() { 132; CHECK-LABEL: setMaxPos: 133; CHECK: # %bb.0: # %entry 134; CHECK-NEXT: addis 3, 2, .LC1@toc@ha 135; CHECK-NEXT: li 4, 32767 136; CHECK-NEXT: ld 3, .LC1@toc@l(3) 137; CHECK-NEXT: sth 4, 0(3) 138; CHECK-NEXT: addis 3, 2, .LC2@toc@ha 139; CHECK-NEXT: ld 3, .LC2@toc@l(3) 140; CHECK-NEXT: stw 4, 0(3) 141; CHECK-NEXT: addis 3, 2, .LC3@toc@ha 142; CHECK-NEXT: ld 3, .LC3@toc@l(3) 143; CHECK-NEXT: std 4, 0(3) 144; CHECK-NEXT: blr 145entry: 146 store i16 32767, ptr @SVal, align 2 147 store i32 32767, ptr @IVal, align 4 148 store i64 32767, ptr @LVal, align 8 149 ret void 150} 151 152; Function Attrs: norecurse nounwind 153define void @setExcessiveNeg() { 154; CHECK-LABEL: setExcessiveNeg: 155; CHECK: # %bb.0: # %entry 156; CHECK-NEXT: addis 3, 2, .LC2@toc@ha 157; CHECK-NEXT: lis 4, -1 158; CHECK-NEXT: ld 3, .LC2@toc@l(3) 159; CHECK-NEXT: ori 4, 4, 32767 160; CHECK-NEXT: stw 4, 0(3) 161; CHECK-NEXT: addis 3, 2, .LC3@toc@ha 162; CHECK-NEXT: ld 3, .LC3@toc@l(3) 163; CHECK-NEXT: std 4, 0(3) 164; CHECK-NEXT: blr 165entry: 166 store i32 -32769, ptr @IVal, align 4 167 store i64 -32769, ptr @LVal, align 8 168 ret void 169} 170 171; Function Attrs: norecurse nounwind 172define void @setExcessivePos() { 173; CHECK-LABEL: setExcessivePos: 174; CHECK: # %bb.0: # %entry 175; CHECK-NEXT: addis 3, 2, .LC4@toc@ha 176; CHECK-NEXT: li 4, 0 177; CHECK-NEXT: ld 3, .LC4@toc@l(3) 178; CHECK-NEXT: ori 4, 4, 32768 179; CHECK-NEXT: sth 4, 0(3) 180; CHECK-NEXT: addis 3, 2, .LC2@toc@ha 181; CHECK-NEXT: ld 3, .LC2@toc@l(3) 182; CHECK-NEXT: stw 4, 0(3) 183; CHECK-NEXT: addis 3, 2, .LC3@toc@ha 184; CHECK-NEXT: ld 3, .LC3@toc@l(3) 185; CHECK-NEXT: std 4, 0(3) 186; CHECK-NEXT: blr 187entry: 188 store i16 -32768, ptr @USVal, align 2 189 store i32 32768, ptr @IVal, align 4 190 store i64 32768, ptr @LVal, align 8 191 ret void 192} 193 194define void @SetArr(i32 signext %Len) { 195; CHECK-LABEL: SetArr: 196; CHECK: # %bb.0: # %entry 197; CHECK-NEXT: cmpwi 3, 0 198; CHECK-NEXT: blelr 0 199; CHECK-NEXT: # %bb.1: # %for.body.lr.ph 200; CHECK-NEXT: addis 4, 2, .LC5@toc@ha 201; CHECK-NEXT: addis 5, 2, .LC6@toc@ha 202; CHECK-NEXT: clrldi 6, 3, 32 203; CHECK-NEXT: ld 4, .LC5@toc@l(4) 204; CHECK-NEXT: ld 5, .LC6@toc@l(5) 205; CHECK-NEXT: ld 4, 0(4) 206; CHECK-NEXT: ld 5, 0(5) 207; CHECK-NEXT: mtctr 6 208; CHECK-NEXT: addi 3, 4, -8 209; CHECK-NEXT: addi 4, 5, -4 210; CHECK-NEXT: li 5, -7 211; CHECK-NEXT: .p2align 4 212; CHECK-NEXT: .LBB8_2: # %for.body 213; CHECK-NEXT: # 214; CHECK-NEXT: stdu 5, 8(3) 215; CHECK-NEXT: stwu 5, 4(4) 216; CHECK-NEXT: bdnz .LBB8_2 217; CHECK-NEXT: # %bb.3: # %for.cond.cleanup 218; CHECK-NEXT: blr 219entry: 220 %cmp7 = icmp sgt i32 %Len, 0 221 br i1 %cmp7, label %for.body.lr.ph, label %for.cond.cleanup 222 223for.body.lr.ph: ; preds = %entry 224 %0 = load ptr, ptr @arr, align 8 225 %1 = load ptr, ptr @arri, align 8 226 %wide.trip.count = zext i32 %Len to i64 227 br label %for.body 228 229for.cond.cleanup: ; preds = %for.body, %entry 230 ret void 231 232for.body: ; preds = %for.body, %for.body.lr.ph 233 %indvars.iv = phi i64 [ 0, %for.body.lr.ph ], [ %indvars.iv.next, %for.body ] 234 %arrayidx = getelementptr inbounds i64, ptr %0, i64 %indvars.iv 235 store i64 -7, ptr %arrayidx, align 8 236 %arrayidx2 = getelementptr inbounds i32, ptr %1, i64 %indvars.iv 237 store i32 -7, ptr %arrayidx2, align 4 238 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1 239 %exitcond = icmp eq i64 %indvars.iv.next, %wide.trip.count 240 br i1 %exitcond, label %for.cond.cleanup, label %for.body 241} 242 243define void @setSameValDiffSizeCI() { 244; CHECK-LABEL: setSameValDiffSizeCI: 245; CHECK: # %bb.0: # %entry 246; CHECK-NEXT: addis 3, 2, .LC2@toc@ha 247; CHECK-NEXT: li 4, 255 248; CHECK-NEXT: ld 3, .LC2@toc@l(3) 249; CHECK-NEXT: stw 4, 0(3) 250; CHECK-NEXT: addis 3, 2, .LC0@toc@ha 251; CHECK-NEXT: ld 3, .LC0@toc@l(3) 252; CHECK-NEXT: stb 4, 0(3) 253; CHECK-NEXT: blr 254entry: 255 store i32 255, ptr @IVal, align 4 256 store i8 -1, ptr @CVal, align 1 257 ret void 258} 259 260define void @setSameValDiffSizeSI() { 261; CHECK-LABEL: setSameValDiffSizeSI: 262; CHECK: # %bb.0: # %entry 263; CHECK-NEXT: addis 3, 2, .LC2@toc@ha 264; CHECK-NEXT: li 4, 0 265; CHECK-NEXT: ld 3, .LC2@toc@l(3) 266; CHECK-NEXT: ori 4, 4, 65535 267; CHECK-NEXT: stw 4, 0(3) 268; CHECK-NEXT: addis 3, 2, .LC1@toc@ha 269; CHECK-NEXT: ld 3, .LC1@toc@l(3) 270; CHECK-NEXT: sth 4, 0(3) 271; CHECK-NEXT: blr 272entry: 273 store i32 65535, ptr @IVal, align 4 274 store i16 -1, ptr @SVal, align 2 275 ret void 276} 277