1; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 < %s 2target triple = "powerpc64-unknown-linux-gnu" 3 4define void @autogen_SD4932(i8) { 5BB: 6 %A4 = alloca i8 7 %A = alloca <1 x ppc_fp128> 8 %Shuff = shufflevector <16 x i32> <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1>, <16 x i32> <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1>, <16 x i32> <i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 undef, i32 29, i32 31, i32 1, i32 3, i32 5> 9 br label %CF 10 11CF: ; preds = %CF80, %CF, %BB 12 %L5 = load i64, ptr undef 13 store i8 %0, ptr %A4 14 %Shuff7 = shufflevector <16 x i32> <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1>, <16 x i32> %Shuff, <16 x i32> <i32 28, i32 30, i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 undef, i32 20, i32 22, i32 24, i32 26> 15 br i1 undef, label %CF, label %CF77 16 17CF77: ; preds = %CF81, %CF83, %CF77, %CF 18 br i1 undef, label %CF77, label %CF82 19 20CF82: ; preds = %CF82, %CF77 21 %L19 = load i64, ptr undef 22 store <1 x ppc_fp128> zeroinitializer, ptr %A 23 store i8 -65, ptr %A4 24 br i1 undef, label %CF82, label %CF83 25 26CF83: ; preds = %CF82 27 %L34 = load i64, ptr undef 28 br i1 undef, label %CF77, label %CF81 29 30CF81: ; preds = %CF83 31 %Shuff43 = shufflevector <16 x i32> %Shuff7, <16 x i32> undef, <16 x i32> <i32 15, i32 17, i32 19, i32 21, i32 23, i32 undef, i32 undef, i32 29, i32 31, i32 undef, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13> 32 store ppc_fp128 0xM00000000000000000000000000000000, ptr %A4 33 br i1 undef, label %CF77, label %CF78 34 35CF78: ; preds = %CF78, %CF81 36 br i1 undef, label %CF78, label %CF79 37 38CF79: ; preds = %CF79, %CF78 39 br i1 undef, label %CF79, label %CF80 40 41CF80: ; preds = %CF79 42 store i64 %L19, ptr undef 43 %Cmp75 = icmp uge i32 206779, undef 44 br i1 %Cmp75, label %CF, label %CF76 45 46CF76: ; preds = %CF80 47 store i64 %L5, ptr undef 48 store i64 %L34, ptr undef 49 ret void 50} 51 52define void @autogen_SD88042(ptr, ptr, i8) { 53BB: 54 %A4 = alloca <2 x i1> 55 %A = alloca <16 x float> 56 %L = load i8, ptr %0 57 %Sl = select i1 false, ptr %A, ptr %A 58 %Sl27 = select i1 false, i8 undef, i8 %L 59 br label %CF 60 61CF: ; preds = %CF78, %CF, %BB 62 br i1 undef, label %CF, label %CF77 63 64CF77: ; preds = %CF80, %CF77, %CF 65 store <16 x float> zeroinitializer, ptr %Sl 66 %L58 = load i32, ptr %1 67 store i8 0, ptr %0 68 br i1 undef, label %CF77, label %CF80 69 70CF80: ; preds = %CF77 71 store i64 0, ptr %A4 72 %E67 = extractelement <8 x i1> zeroinitializer, i32 1 73 br i1 %E67, label %CF77, label %CF78 74 75CF78: ; preds = %CF80 76 %Cmp73 = icmp eq i32 189865, %L58 77 br i1 %Cmp73, label %CF, label %CF76 78 79CF76: ; preds = %CF78 80 store i8 %2, ptr %0 81 store i8 %Sl27, ptr %0 82 ret void 83} 84 85define void @autogen_SD37497(ptr, ptr, ptr) { 86BB: 87 %A1 = alloca i1 88 %I8 = insertelement <1 x i32> <i32 -1>, i32 454855, i32 0 89 %Cmp = icmp ult <4 x i64> <i64 -1, i64 -1, i64 -1, i64 -1>, undef 90 %L10 = load i64, ptr %2 91 %E11 = extractelement <4 x i1> %Cmp, i32 2 92 br label %CF72 93 94CF72: ; preds = %CF74, %CF72, %BB 95 store double 0xB47BB29A53790718, ptr undef 96 %E18 = extractelement <1 x i32> <i32 -1>, i32 0 97 %FC22 = sitofp <1 x i32> %I8 to <1 x float> 98 br i1 undef, label %CF72, label %CF74 99 100CF74: ; preds = %CF72 101 store i8 0, ptr %0 102 %L31 = load i64, ptr %A1 103 store i64 477323, ptr %A1 104 %Sl37 = select i1 false, ptr undef, ptr %1 105 %Cmp38 = icmp ugt i1 undef, undef 106 br i1 %Cmp38, label %CF72, label %CF73 107 108CF73: ; preds = %CF74 109 store i64 %L31, ptr %A1 110 %B55 = fdiv <1 x float> undef, %FC22 111 %Sl63 = select i1 %E11, ptr undef, ptr %Sl37 112 store i32 %E18, ptr %Sl63 113 store i64 %L10, ptr %A1 114 ret void 115} 116