1; RUN: llc -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 < %s | FileCheck %s 2; RUN: llc -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -frame-pointer=all < %s | FileCheck -check-prefix=CHECK-FP %s 3; RUN: llc -mtriple=powerpc-unknown-linux-gnu -frame-pointer=all < %s | FileCheck -check-prefix=CHECK-32 %s 4; RUN: llc -mtriple=powerpc-unknown-linux-gnu -frame-pointer=all -relocation-model=pic < %s | FileCheck -check-prefix=CHECK-32-PIC %s 5target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64" 6target triple = "powerpc64-unknown-linux-gnu" 7 8%struct.s = type { i32, i32 } 9 10declare void @bar(ptr) 11 12@barbaz = external global i32 13 14define void @goo(ptr byval(%struct.s) nocapture readonly %a) { 15entry: 16 %x = alloca [2 x i32], align 32 17 %0 = load i32, ptr %a, align 4 18 store i32 %0, ptr %x, align 32 19 %b = getelementptr inbounds %struct.s, ptr %a, i64 0, i32 1 20 %1 = load i32, ptr %b, align 4 21 %2 = load i32, ptr @barbaz, align 4 22 %arrayidx2 = getelementptr inbounds [2 x i32], ptr %x, i64 0, i64 1 23 store i32 %2, ptr %arrayidx2, align 4 24 call void @bar(ptr %x) 25 ret void 26} 27 28; CHECK-LABEL: @goo 29 30; CHECK-DAG: mflr {{[0-9]+}} 31; CHECK-DAG: clrldi [[REG:[0-9]+]], 1, 59 32; CHECK-DAG: std 30, -16(1) 33; CHECK-DAG: mr 30, 1 34; CHECK-DAG: std 0, 16(1) 35; CHECK-DAG: subfic 0, [[REG]], -160 36; CHECK: stdux 1, 1, 0 37 38; CHECK: .cfi_def_cfa_register r30 39; CHECK: .cfi_offset r30, -16 40; CHECK: .cfi_offset lr, 16 41 42; CHECK: std 3, 48(30) 43 44; CHECK: mr 1, 30 45; CHECK-DAG: ld [[SR:[0-9]+]], 16(1) 46; CHECK-DAG: ld 30, -16(1) 47; CHECK-DAG: mtlr [[SR]] 48; CHECK: blr 49 50; CHECK-FP-LABEL: @goo 51 52; CHECK-FP-DAG: mflr {{[0-9]+}} 53; CHECK-FP-DAG: clrldi [[REG:[0-9]+]], 1, 59 54; CHECK-FP-DAG: std 31, -8(1) 55; CHECK-FP-DAG: std 30, -16(1) 56; CHECK-FP-DAG: mr 30, 1 57; CHECK-FP-DAG: std 0, 16(1) 58; CHECK-FP-DAG: subfic 0, [[REG]], -160 59; CHECK-FP: stdux 1, 1, 0 60 61; CHECK-FP: .cfi_def_cfa_register r30 62; CHECK-FP: .cfi_offset r31, -8 63; CHECK-FP: .cfi_offset r30, -16 64; CHECK-FP: .cfi_offset lr, 16 65 66; CHECK-FP: mr 31, 1 67 68; CHECK-FP: std 3, 48(30) 69 70; CHECK-FP: mr 1, 30 71; CHECK-FP-DAG: ld [[SR:[0-9]+]], 16(1) 72; CHECK-FP-DAG: ld 31, -8(1) 73; CHECK-FP-DAG: ld 30, -16(1) 74; CHECK-FP-DAG: mtlr [[SR]] 75; CHECK-FP: blr 76 77; CHECK-32-LABEL: @goo 78; CHECK-32-DAG: mflr [[LR:[0-9]+]] 79; CHECK-32-DAG: clrlwi [[REG:[0-9]+]], 1, 27 80; CHECK-32-DAG: stw [[LR]], 4(1) 81; CHECK-32-DAG: subfic 0, [[REG]], -64 82; CHECK-32: stwux 1, 1, 0 83; CHECK-32: sub 0, 1, 0 84; CHECK-32: addic 0, 0, -4 85; CHECK-32: stwx 31, 0, 0 86; CHECK-32: addic 0, 0, -4 87; CHECK-32: stwx 30, 0, 0 88; CHECK-32: addic 30, 0, 8 89 90; CHECK-32-PIC-LABEL: @goo 91; CHECK-32-PIC-DAG: mflr [[LR:[0-9]+]] 92; CHECK-32-PIC-DAG: clrlwi [[REG:[0-9]+]], 1, 27 93; CHECK-32-PIC-DAG: stw [[LR]], 4(1) 94; CHECK-32-PIC-DAG: subfic 0, [[REG]], -64 95; CHECK-32-PIC: stwux 1, 1, 0 96; CHECK-32-PIC: sub 0, 1, 0 97; CHECK-32-PIC: addic 0, 0, -4 98; CHECK-32-PIC: stwx 31, 0, 0 99; CHECK-32-PIC: addic 0, 0, -4 100; CHECK-32-PIC: stwx 30, 0, 0 101; CHECK-32-PIC: addic 0, 0, -4 102; CHECK-32-PIC: stwx 29, 0, 0 103; CHECK-32-PIC: addic 29, 0, 12 104 105; The large-frame-size case. 106define void @hoo(ptr byval(%struct.s) nocapture readonly %a) { 107entry: 108 %x = alloca [200000 x i32], align 32 109 %0 = load i32, ptr %a, align 4 110 store i32 %0, ptr %x, align 32 111 %b = getelementptr inbounds %struct.s, ptr %a, i64 0, i32 1 112 %1 = load i32, ptr %b, align 4 113 %arrayidx2 = getelementptr inbounds [200000 x i32], ptr %x, i64 0, i64 1 114 store i32 %1, ptr %arrayidx2, align 4 115 call void @bar(ptr %x) 116 ret void 117} 118 119; CHECK-LABEL: @hoo 120 121; CHECK-DAG: lis [[REG1:[0-9]+]], -13 122; CHECK-DAG: clrldi [[REG3:[0-9]+]], 1, 59 123; CHECK-DAG: mflr {{[0-9]+}} 124; CHECK-DAG: ori [[REG2:[0-9]+]], [[REG1]], 51808 125; CHECK-DAG: std 30, -16(1) 126; CHECK-DAG: mr 30, 1 127; CHECK-DAG: std 0, 16(1) 128; CHECK-DAG: subc 0, [[REG2]], [[REG3]] 129; CHECK: stdux 1, 1, 0 130 131; CHECK: .cfi_def_cfa_register r30 132 133; CHECK: blr 134 135; CHECK-32-LABEL: @hoo 136 137; CHECK-32-DAG: lis [[REG1:[0-9]+]], -13 138; CHECK-32-DAG: clrlwi [[REG3:[0-9]+]], 1, 27 139; CHECK-32-DAG: mflr [[LR:[0-9]+]] 140; CHECK-32-DAG: ori [[REG2:[0-9]+]], [[REG1]], 51904 141; CHECK-32-DAG: stw [[LR]], 4(1) 142; CHECK-32-DAG: subc 0, [[REG2]], [[REG3]] 143; CHECK-32: stwux 1, 1, 0 144; CHECK-32: sub 0, 1, 0 145; CHECK-32: addic 0, 0, -4 146; CHECK-32: stwx 31, 0, 0 147; CHECK-32: addic 0, 0, -4 148; CHECK-32: stwx 30, 0, 0 149; CHECK-32: addic 30, 0, 8 150 151; CHECK-32: blr 152 153; CHECK-32-PIC-LABEL: @hoo 154 155; CHECK-32-PIC-DAG: lis [[REG1:[0-9]+]], -13 156; CHECK-32-PIC-DAG: clrlwi [[REG3:[0-9]+]], 1, 27 157; CHECK-32-PIC-DAG: mflr {{[0-9]+}} 158; CHECK-32-PIC-DAG: ori [[REG2:[0-9]+]], [[REG1]], 51904 159; CHECK-32-PIC-DAG: stw 0, 4(1) 160; CHECK-32-PIC-DAG: subc 0, [[REG2]], [[REG3]] 161; CHECK-32-PIC: stwux 1, 1, 0 162; CHECK-32-PIC: sub 0, 1, 0 163; CHECK-32-PIC: addic 0, 0, -4 164; CHECK-32-PIC: stwx 31, 0, 0 165; CHECK-32-PIC: addic 0, 0, -8 166; CHECK-32-PIC: stwx 29, 0, 0 167; CHECK-32-PIC: addic 29, 0, 12 168 169; CHECK-32: blr 170 171; Make sure that the FP save area is still allocated correctly relative to 172; where r30 is saved. 173define void @loo(ptr byval(%struct.s) nocapture readonly %a) { 174entry: 175 %x = alloca [2 x i32], align 32 176 %0 = load i32, ptr %a, align 4 177 store i32 %0, ptr %x, align 32 178 %b = getelementptr inbounds %struct.s, ptr %a, i64 0, i32 1 179 %1 = load i32, ptr %b, align 4 180 %arrayidx2 = getelementptr inbounds [2 x i32], ptr %x, i64 0, i64 1 181 store i32 %1, ptr %arrayidx2, align 4 182 call void @bar(ptr %x) 183 call void asm sideeffect "", "~{f30}"() nounwind 184 ret void 185} 186 187; CHECK-LABEL: @loo 188 189; CHECK-DAG: mflr {{[0-9]+}} 190; CHECK-DAG: clrldi [[REG:[0-9]+]], 1, 59 191; CHECK-DAG: std 30, -32(1) 192; CHECK-DAG: mr 30, 1 193; CHECK-DAG: std 0, 16(1) 194; CHECK-DAG: subfic 0, [[REG]], -192 195; CHECK: stdux 1, 1, 0 196 197; CHECK: .cfi_def_cfa_register r30 198 199; CHECK: stfd 30, -16(30) 200 201; CHECK: blr 202 203; CHECK-FP-LABEL: @loo 204 205; CHECK-FP-DAG: mflr {{[0-9]+}} 206; CHECK-FP-DAG: clrldi [[REG:[0-9]+]], 1, 59 207; CHECK-FP-DAG: std 31, -24(1) 208; CHECK-FP-DAG: std 30, -32(1) 209; CHECK-FP-DAG: mr 30, 1 210; CHECK-FP-DAG: std 0, 16(1) 211; CHECK-FP-DAG: subfic 0, [[REG]], -192 212; CHECK-FP: stdux 1, 1, 0 213 214; CHECK-FP: .cfi_def_cfa_register r30 215 216; CHECK-FP: stfd 30, -16(30) 217 218; CHECK-FP: blr 219