xref: /llvm-project/llvm/test/CodeGen/PowerPC/sink-side-effect.ll (revision a701b7e368b70688bb4b84dafcaa43fa7c9a3649)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=powerpc64le -mcpu=pwr9 -verify-machineinstrs -disable-cgp-delete-phis < %s | FileCheck %s
3
4define double @zot(ptr %arg, ptr %arg1, ptr %arg2) {
5; CHECK-LABEL: zot:
6; CHECK:       # %bb.0: # %bb
7; CHECK-NEXT:    bc 12, 20, .LBB0_2
8; CHECK-NEXT:  # %bb.1: # %bb3
9; CHECK-NEXT:    lhz 5, 0(5)
10; CHECK-NEXT:    rlwinm. 5, 5, 28, 30, 31
11; CHECK-NEXT:  .LBB0_2: # %bb10
12; CHECK-NEXT:    lfs 0, 0(4)
13; CHECK-NEXT:    lwz 3, 0(3)
14; CHECK-NEXT:    li 4, 2
15; CHECK-NEXT:    fmr 1, 0
16; CHECK-NEXT:    b .LBB0_4
17; CHECK-NEXT:    .p2align 5
18; CHECK-NEXT:  .LBB0_3: # %bb17
19; CHECK-NEXT:    #
20; CHECK-NEXT:    addi 4, 4, 1
21; CHECK-NEXT:  .LBB0_4: # %bb17
22; CHECK-NEXT:    #
23; CHECK-NEXT:    cmpw 4, 3
24; CHECK-NEXT:    bge 0, .LBB0_3
25; CHECK-NEXT:  # %bb.5:
26; CHECK-NEXT:    xsmuldp 1, 1, 0
27; CHECK-NEXT:    b .LBB0_3
28bb:
29  %tmp = load i32, ptr %arg, align 8
30  br i1 undef, label %bb9, label %bb3
31
32bb3:
33  %tmp4 = load i16, ptr %arg2, align 4
34  %tmp5 = lshr i16 %tmp4, 4
35  %tmp6 = and i16 %tmp5, 3
36  %tmp7 = zext i16 %tmp6 to i32
37  %tmp8 = icmp eq i16 %tmp6, 0
38  br i1 %tmp8, label %bb9, label %bb10
39
40bb9:
41  br label %bb10
42
43bb10:
44  %tmp11 = phi i32 [ undef, %bb9 ], [ %tmp7, %bb3 ]
45  %tmp12 = icmp sgt i32 %tmp11, 1
46  br label %bb13
47
48bb13:
49  %tmp14 = load float, ptr %arg1, align 4
50  %tmp15 = fpext float %tmp14 to double
51  br label %bb16
52
53bb16:
54  br label %bb17
55
56bb17:
57  %tmp18 = phi i32 [ %tmp23, %bb17 ], [ 2, %bb16 ]
58  %tmp19 = phi double [ %tmp22, %bb17 ], [ %tmp15, %bb16 ]
59  %tmp20 = icmp slt i32 %tmp18, %tmp
60  %tmp21 = fmul fast double %tmp19, %tmp15
61  %tmp22 = select i1 %tmp20, double %tmp21, double %tmp19
62  %tmp23 = add nuw i32 %tmp18, 1
63  br label %bb17
64}
65
66declare double @ham()
67