xref: /llvm-project/llvm/test/CodeGen/PowerPC/select-i1-vs-i1.ll (revision 8e901c255df45e38cb1d69a576804029e20868bf) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
2; RUN: llc -ppc-reduce-cr-logicals -verify-machineinstrs -tail-dup-placement=false < %s | FileCheck %s
3; RUN: llc -ppc-reduce-cr-logicals -verify-machineinstrs \
4; RUN:   -mattr=-isel < %s | FileCheck --check-prefix=CHECK-NO-ISEL %s
5target datalayout = "E-m:e-i64:64-n32:64"
6target triple = "powerpc64-unknown-linux-gnu"
7
8; FIXME: We should check the operands to the cr* logical operation itself, but
9; unfortunately, FileCheck does not yet understand how to do arithmetic, so we
10; can't do so without introducing a register-allocation dependency.
11
12define signext i32 @testi32slt(i32 signext %c1, i32 signext %c2, i32 signext %c3, i32 signext %c4, i32 signext %a1, i32 signext %a2) #0 {
13; CHECK-LABEL: testi32slt:
14; CHECK:       # %bb.0: # %entry
15; CHECK-NEXT:    cmpw 5, 6
16; CHECK-NEXT:    cmpw 1, 3, 4
17; CHECK-NEXT:    crandc 20, 6, 2
18; CHECK-NEXT:    isel 3, 7, 8, 20
19; CHECK-NEXT:    blr
20;
21; CHECK-NO-ISEL-LABEL: testi32slt:
22; CHECK-NO-ISEL:       # %bb.0: # %entry
23; CHECK-NO-ISEL-NEXT:    cmpw 5, 6
24; CHECK-NO-ISEL-NEXT:    bc 12, 2, .LBB0_3
25; CHECK-NO-ISEL-NEXT:  # %bb.1: # %entry
26; CHECK-NO-ISEL-NEXT:    cmpw 3, 4
27; CHECK-NO-ISEL-NEXT:    bc 4, 2, .LBB0_3
28; CHECK-NO-ISEL-NEXT:  # %bb.2: # %entry
29; CHECK-NO-ISEL-NEXT:    mr 3, 7
30; CHECK-NO-ISEL-NEXT:    blr
31; CHECK-NO-ISEL-NEXT:  .LBB0_3: # %entry
32; CHECK-NO-ISEL-NEXT:    mr 7, 8
33; CHECK-NO-ISEL-NEXT:    mr 3, 7
34; CHECK-NO-ISEL-NEXT:    blr
35entry:
36  %cmp1 = icmp eq i32 %c3, %c4
37  %cmp3tmp = icmp eq i32 %c1, %c2
38  %cmp3 = icmp slt i1 %cmp3tmp, %cmp1
39  %cond = select i1 %cmp3, i32 %a1, i32 %a2
40  ret i32 %cond
41
42}
43
44define signext i32 @testi32ult(i32 signext %c1, i32 signext %c2, i32 signext %c3, i32 signext %c4, i32 signext %a1, i32 signext %a2) #0 {
45; CHECK-LABEL: testi32ult:
46; CHECK:       # %bb.0: # %entry
47; CHECK-NEXT:    cmpw 5, 6
48; CHECK-NEXT:    cmpw 1, 3, 4
49; CHECK-NEXT:    crandc 20, 2, 6
50; CHECK-NEXT:    isel 3, 7, 8, 20
51; CHECK-NEXT:    blr
52;
53; CHECK-NO-ISEL-LABEL: testi32ult:
54; CHECK-NO-ISEL:       # %bb.0: # %entry
55; CHECK-NO-ISEL-NEXT:    cmpw 5, 6
56; CHECK-NO-ISEL-NEXT:    bc 4, 2, .LBB1_3
57; CHECK-NO-ISEL-NEXT:  # %bb.1: # %entry
58; CHECK-NO-ISEL-NEXT:    cmpw 3, 4
59; CHECK-NO-ISEL-NEXT:    bc 12, 2, .LBB1_3
60; CHECK-NO-ISEL-NEXT:  # %bb.2: # %entry
61; CHECK-NO-ISEL-NEXT:    mr 3, 7
62; CHECK-NO-ISEL-NEXT:    blr
63; CHECK-NO-ISEL-NEXT:  .LBB1_3: # %entry
64; CHECK-NO-ISEL-NEXT:    mr 7, 8
65; CHECK-NO-ISEL-NEXT:    mr 3, 7
66; CHECK-NO-ISEL-NEXT:    blr
67entry:
68  %cmp1 = icmp eq i32 %c3, %c4
69  %cmp3tmp = icmp eq i32 %c1, %c2
70  %cmp3 = icmp ult i1 %cmp3tmp, %cmp1
71  %cond = select i1 %cmp3, i32 %a1, i32 %a2
72  ret i32 %cond
73
74}
75
76define signext i32 @testi32sle(i32 signext %c1, i32 signext %c2, i32 signext %c3, i32 signext %c4, i32 signext %a1, i32 signext %a2) #0 {
77; CHECK-LABEL: testi32sle:
78; CHECK:       # %bb.0: # %entry
79; CHECK-NEXT:    cmpw 5, 6
80; CHECK-NEXT:    cmpw 1, 3, 4
81; CHECK-NEXT:    crorc 20, 6, 2
82; CHECK-NEXT:    isel 3, 7, 8, 20
83; CHECK-NEXT:    blr
84;
85; CHECK-NO-ISEL-LABEL: testi32sle:
86; CHECK-NO-ISEL:       # %bb.0: # %entry
87; CHECK-NO-ISEL-NEXT:    cmpw 5, 6
88; CHECK-NO-ISEL-NEXT:    bc 4, 2, .LBB2_3
89; CHECK-NO-ISEL-NEXT:  # %bb.1: # %entry
90; CHECK-NO-ISEL-NEXT:    cmpw 3, 4
91; CHECK-NO-ISEL-NEXT:    bc 12, 2, .LBB2_3
92; CHECK-NO-ISEL-NEXT:  # %bb.2: # %entry
93; CHECK-NO-ISEL-NEXT:    mr 7, 8
94; CHECK-NO-ISEL-NEXT:  .LBB2_3: # %entry
95; CHECK-NO-ISEL-NEXT:    mr 3, 7
96; CHECK-NO-ISEL-NEXT:    blr
97entry:
98  %cmp1 = icmp eq i32 %c3, %c4
99  %cmp3tmp = icmp eq i32 %c1, %c2
100  %cmp3 = icmp sle i1 %cmp3tmp, %cmp1
101  %cond = select i1 %cmp3, i32 %a1, i32 %a2
102  ret i32 %cond
103
104}
105
106define signext i32 @testi32ule(i32 signext %c1, i32 signext %c2, i32 signext %c3, i32 signext %c4, i32 signext %a1, i32 signext %a2) #0 {
107; CHECK-LABEL: testi32ule:
108; CHECK:       # %bb.0: # %entry
109; CHECK-NEXT:    cmpw 5, 6
110; CHECK-NEXT:    cmpw 1, 3, 4
111; CHECK-NEXT:    crorc 20, 2, 6
112; CHECK-NEXT:    isel 3, 7, 8, 20
113; CHECK-NEXT:    blr
114;
115; CHECK-NO-ISEL-LABEL: testi32ule:
116; CHECK-NO-ISEL:       # %bb.0: # %entry
117; CHECK-NO-ISEL-NEXT:    cmpw 5, 6
118; CHECK-NO-ISEL-NEXT:    bc 12, 2, .LBB3_3
119; CHECK-NO-ISEL-NEXT:  # %bb.1: # %entry
120; CHECK-NO-ISEL-NEXT:    cmpw 3, 4
121; CHECK-NO-ISEL-NEXT:    bc 4, 2, .LBB3_3
122; CHECK-NO-ISEL-NEXT:  # %bb.2: # %entry
123; CHECK-NO-ISEL-NEXT:    mr 7, 8
124; CHECK-NO-ISEL-NEXT:  .LBB3_3: # %entry
125; CHECK-NO-ISEL-NEXT:    mr 3, 7
126; CHECK-NO-ISEL-NEXT:    blr
127entry:
128  %cmp1 = icmp eq i32 %c3, %c4
129  %cmp3tmp = icmp eq i32 %c1, %c2
130  %cmp3 = icmp ule i1 %cmp3tmp, %cmp1
131  %cond = select i1 %cmp3, i32 %a1, i32 %a2
132  ret i32 %cond
133
134}
135
136define signext i32 @testi32eq(i32 signext %c1, i32 signext %c2, i32 signext %c3, i32 signext %c4, i32 signext %a1, i32 signext %a2) #0 {
137; CHECK-LABEL: testi32eq:
138; CHECK:       # %bb.0: # %entry
139; CHECK-NEXT:    cmpw 5, 6
140; CHECK-NEXT:    cmpw 1, 3, 4
141; CHECK-NEXT:    creqv 20, 6, 2
142; CHECK-NEXT:    isel 3, 7, 8, 20
143; CHECK-NEXT:    blr
144;
145; CHECK-NO-ISEL-LABEL: testi32eq:
146; CHECK-NO-ISEL:       # %bb.0: # %entry
147; CHECK-NO-ISEL-NEXT:    cmpw 5, 6
148; CHECK-NO-ISEL-NEXT:    cmpw 1, 3, 4
149; CHECK-NO-ISEL-NEXT:    creqv 20, 6, 2
150; CHECK-NO-ISEL-NEXT:    bc 12, 20, .LBB4_2
151; CHECK-NO-ISEL-NEXT:  # %bb.1: # %entry
152; CHECK-NO-ISEL-NEXT:    mr 7, 8
153; CHECK-NO-ISEL-NEXT:  .LBB4_2: # %entry
154; CHECK-NO-ISEL-NEXT:    mr 3, 7
155; CHECK-NO-ISEL-NEXT:    blr
156entry:
157  %cmp1 = icmp eq i32 %c3, %c4
158  %cmp3tmp = icmp eq i32 %c1, %c2
159  %cmp3 = icmp eq i1 %cmp3tmp, %cmp1
160  %cond = select i1 %cmp3, i32 %a1, i32 %a2
161  ret i32 %cond
162
163}
164
165define signext i32 @testi32sge(i32 signext %c1, i32 signext %c2, i32 signext %c3, i32 signext %c4, i32 signext %a1, i32 signext %a2) #0 {
166; CHECK-LABEL: testi32sge:
167; CHECK:       # %bb.0: # %entry
168; CHECK-NEXT:    cmpw 5, 6
169; CHECK-NEXT:    cmpw 1, 3, 4
170; CHECK-NEXT:    crorc 20, 2, 6
171; CHECK-NEXT:    isel 3, 7, 8, 20
172; CHECK-NEXT:    blr
173;
174; CHECK-NO-ISEL-LABEL: testi32sge:
175; CHECK-NO-ISEL:       # %bb.0: # %entry
176; CHECK-NO-ISEL-NEXT:    cmpw 5, 6
177; CHECK-NO-ISEL-NEXT:    bc 12, 2, .LBB5_3
178; CHECK-NO-ISEL-NEXT:  # %bb.1: # %entry
179; CHECK-NO-ISEL-NEXT:    cmpw 3, 4
180; CHECK-NO-ISEL-NEXT:    bc 4, 2, .LBB5_3
181; CHECK-NO-ISEL-NEXT:  # %bb.2: # %entry
182; CHECK-NO-ISEL-NEXT:    mr 7, 8
183; CHECK-NO-ISEL-NEXT:  .LBB5_3: # %entry
184; CHECK-NO-ISEL-NEXT:    mr 3, 7
185; CHECK-NO-ISEL-NEXT:    blr
186entry:
187  %cmp1 = icmp eq i32 %c3, %c4
188  %cmp3tmp = icmp eq i32 %c1, %c2
189  %cmp3 = icmp sge i1 %cmp3tmp, %cmp1
190  %cond = select i1 %cmp3, i32 %a1, i32 %a2
191  ret i32 %cond
192
193}
194
195define signext i32 @testi32uge(i32 signext %c1, i32 signext %c2, i32 signext %c3, i32 signext %c4, i32 signext %a1, i32 signext %a2) #0 {
196; CHECK-LABEL: testi32uge:
197; CHECK:       # %bb.0: # %entry
198; CHECK-NEXT:    cmpw 5, 6
199; CHECK-NEXT:    cmpw 1, 3, 4
200; CHECK-NEXT:    crorc 20, 6, 2
201; CHECK-NEXT:    isel 3, 7, 8, 20
202; CHECK-NEXT:    blr
203;
204; CHECK-NO-ISEL-LABEL: testi32uge:
205; CHECK-NO-ISEL:       # %bb.0: # %entry
206; CHECK-NO-ISEL-NEXT:    cmpw 5, 6
207; CHECK-NO-ISEL-NEXT:    bc 4, 2, .LBB6_3
208; CHECK-NO-ISEL-NEXT:  # %bb.1: # %entry
209; CHECK-NO-ISEL-NEXT:    cmpw 3, 4
210; CHECK-NO-ISEL-NEXT:    bc 12, 2, .LBB6_3
211; CHECK-NO-ISEL-NEXT:  # %bb.2: # %entry
212; CHECK-NO-ISEL-NEXT:    mr 7, 8
213; CHECK-NO-ISEL-NEXT:  .LBB6_3: # %entry
214; CHECK-NO-ISEL-NEXT:    mr 3, 7
215; CHECK-NO-ISEL-NEXT:    blr
216entry:
217  %cmp1 = icmp eq i32 %c3, %c4
218  %cmp3tmp = icmp eq i32 %c1, %c2
219  %cmp3 = icmp uge i1 %cmp3tmp, %cmp1
220  %cond = select i1 %cmp3, i32 %a1, i32 %a2
221  ret i32 %cond
222
223}
224
225define signext i32 @testi32sgt(i32 signext %c1, i32 signext %c2, i32 signext %c3, i32 signext %c4, i32 signext %a1, i32 signext %a2) #0 {
226; CHECK-LABEL: testi32sgt:
227; CHECK:       # %bb.0: # %entry
228; CHECK-NEXT:    cmpw 5, 6
229; CHECK-NEXT:    cmpw 1, 3, 4
230; CHECK-NEXT:    crandc 20, 2, 6
231; CHECK-NEXT:    isel 3, 7, 8, 20
232; CHECK-NEXT:    blr
233;
234; CHECK-NO-ISEL-LABEL: testi32sgt:
235; CHECK-NO-ISEL:       # %bb.0: # %entry
236; CHECK-NO-ISEL-NEXT:    cmpw 5, 6
237; CHECK-NO-ISEL-NEXT:    bc 4, 2, .LBB7_3
238; CHECK-NO-ISEL-NEXT:  # %bb.1: # %entry
239; CHECK-NO-ISEL-NEXT:    cmpw 3, 4
240; CHECK-NO-ISEL-NEXT:    bc 12, 2, .LBB7_3
241; CHECK-NO-ISEL-NEXT:  # %bb.2: # %entry
242; CHECK-NO-ISEL-NEXT:    mr 3, 7
243; CHECK-NO-ISEL-NEXT:    blr
244; CHECK-NO-ISEL-NEXT:  .LBB7_3: # %entry
245; CHECK-NO-ISEL-NEXT:    mr 7, 8
246; CHECK-NO-ISEL-NEXT:    mr 3, 7
247; CHECK-NO-ISEL-NEXT:    blr
248entry:
249  %cmp1 = icmp eq i32 %c3, %c4
250  %cmp3tmp = icmp eq i32 %c1, %c2
251  %cmp3 = icmp sgt i1 %cmp3tmp, %cmp1
252  %cond = select i1 %cmp3, i32 %a1, i32 %a2
253  ret i32 %cond
254
255}
256
257define signext i32 @testi32ugt(i32 signext %c1, i32 signext %c2, i32 signext %c3, i32 signext %c4, i32 signext %a1, i32 signext %a2) #0 {
258; CHECK-LABEL: testi32ugt:
259; CHECK:       # %bb.0: # %entry
260; CHECK-NEXT:    cmpw 5, 6
261; CHECK-NEXT:    cmpw 1, 3, 4
262; CHECK-NEXT:    crandc 20, 6, 2
263; CHECK-NEXT:    isel 3, 7, 8, 20
264; CHECK-NEXT:    blr
265;
266; CHECK-NO-ISEL-LABEL: testi32ugt:
267; CHECK-NO-ISEL:       # %bb.0: # %entry
268; CHECK-NO-ISEL-NEXT:    cmpw 5, 6
269; CHECK-NO-ISEL-NEXT:    bc 12, 2, .LBB8_3
270; CHECK-NO-ISEL-NEXT:  # %bb.1: # %entry
271; CHECK-NO-ISEL-NEXT:    cmpw 3, 4
272; CHECK-NO-ISEL-NEXT:    bc 4, 2, .LBB8_3
273; CHECK-NO-ISEL-NEXT:  # %bb.2: # %entry
274; CHECK-NO-ISEL-NEXT:    mr 3, 7
275; CHECK-NO-ISEL-NEXT:    blr
276; CHECK-NO-ISEL-NEXT:  .LBB8_3: # %entry
277; CHECK-NO-ISEL-NEXT:    mr 7, 8
278; CHECK-NO-ISEL-NEXT:    mr 3, 7
279; CHECK-NO-ISEL-NEXT:    blr
280entry:
281  %cmp1 = icmp eq i32 %c3, %c4
282  %cmp3tmp = icmp eq i32 %c1, %c2
283  %cmp3 = icmp ugt i1 %cmp3tmp, %cmp1
284  %cond = select i1 %cmp3, i32 %a1, i32 %a2
285  ret i32 %cond
286
287}
288
289define signext i32 @testi32ne(i32 signext %c1, i32 signext %c2, i32 signext %c3, i32 signext %c4, i32 signext %a1, i32 signext %a2) #0 {
290; CHECK-LABEL: testi32ne:
291; CHECK:       # %bb.0: # %entry
292; CHECK-NEXT:    cmpw 5, 6
293; CHECK-NEXT:    cmpw 1, 3, 4
294; CHECK-NEXT:    crxor 20, 6, 2
295; CHECK-NEXT:    isel 3, 7, 8, 20
296; CHECK-NEXT:    blr
297;
298; CHECK-NO-ISEL-LABEL: testi32ne:
299; CHECK-NO-ISEL:       # %bb.0: # %entry
300; CHECK-NO-ISEL-NEXT:    cmpw 5, 6
301; CHECK-NO-ISEL-NEXT:    cmpw 1, 3, 4
302; CHECK-NO-ISEL-NEXT:    crxor 20, 6, 2
303; CHECK-NO-ISEL-NEXT:    bc 12, 20, .LBB9_2
304; CHECK-NO-ISEL-NEXT:  # %bb.1: # %entry
305; CHECK-NO-ISEL-NEXT:    mr 7, 8
306; CHECK-NO-ISEL-NEXT:  .LBB9_2: # %entry
307; CHECK-NO-ISEL-NEXT:    mr 3, 7
308; CHECK-NO-ISEL-NEXT:    blr
309entry:
310  %cmp1 = icmp eq i32 %c3, %c4
311  %cmp3tmp = icmp eq i32 %c1, %c2
312  %cmp3 = icmp ne i1 %cmp3tmp, %cmp1
313  %cond = select i1 %cmp3, i32 %a1, i32 %a2
314  ret i32 %cond
315
316}
317
318define i64 @testi64slt(i64 %c1, i64 %c2, i64 %c3, i64 %c4, i64 %a1, i64 %a2) #0 {
319; CHECK-LABEL: testi64slt:
320; CHECK:       # %bb.0: # %entry
321; CHECK-NEXT:    cmpd 5, 6
322; CHECK-NEXT:    cmpd 1, 3, 4
323; CHECK-NEXT:    crandc 20, 6, 2
324; CHECK-NEXT:    isel 3, 7, 8, 20
325; CHECK-NEXT:    blr
326;
327; CHECK-NO-ISEL-LABEL: testi64slt:
328; CHECK-NO-ISEL:       # %bb.0: # %entry
329; CHECK-NO-ISEL-NEXT:    cmpd 5, 6
330; CHECK-NO-ISEL-NEXT:    bc 12, 2, .LBB10_3
331; CHECK-NO-ISEL-NEXT:  # %bb.1: # %entry
332; CHECK-NO-ISEL-NEXT:    cmpd 3, 4
333; CHECK-NO-ISEL-NEXT:    bc 4, 2, .LBB10_3
334; CHECK-NO-ISEL-NEXT:  # %bb.2: # %entry
335; CHECK-NO-ISEL-NEXT:    mr 3, 7
336; CHECK-NO-ISEL-NEXT:    blr
337; CHECK-NO-ISEL-NEXT:  .LBB10_3: # %entry
338; CHECK-NO-ISEL-NEXT:    mr 7, 8
339; CHECK-NO-ISEL-NEXT:    mr 3, 7
340; CHECK-NO-ISEL-NEXT:    blr
341entry:
342  %cmp1 = icmp eq i64 %c3, %c4
343  %cmp3tmp = icmp eq i64 %c1, %c2
344  %cmp3 = icmp slt i1 %cmp3tmp, %cmp1
345  %cond = select i1 %cmp3, i64 %a1, i64 %a2
346  ret i64 %cond
347
348}
349
350define i64 @testi64ult(i64 %c1, i64 %c2, i64 %c3, i64 %c4, i64 %a1, i64 %a2) #0 {
351; CHECK-LABEL: testi64ult:
352; CHECK:       # %bb.0: # %entry
353; CHECK-NEXT:    cmpd 5, 6
354; CHECK-NEXT:    cmpd 1, 3, 4
355; CHECK-NEXT:    crandc 20, 2, 6
356; CHECK-NEXT:    isel 3, 7, 8, 20
357; CHECK-NEXT:    blr
358;
359; CHECK-NO-ISEL-LABEL: testi64ult:
360; CHECK-NO-ISEL:       # %bb.0: # %entry
361; CHECK-NO-ISEL-NEXT:    cmpd 5, 6
362; CHECK-NO-ISEL-NEXT:    bc 4, 2, .LBB11_3
363; CHECK-NO-ISEL-NEXT:  # %bb.1: # %entry
364; CHECK-NO-ISEL-NEXT:    cmpd 3, 4
365; CHECK-NO-ISEL-NEXT:    bc 12, 2, .LBB11_3
366; CHECK-NO-ISEL-NEXT:  # %bb.2: # %entry
367; CHECK-NO-ISEL-NEXT:    mr 3, 7
368; CHECK-NO-ISEL-NEXT:    blr
369; CHECK-NO-ISEL-NEXT:  .LBB11_3: # %entry
370; CHECK-NO-ISEL-NEXT:    mr 7, 8
371; CHECK-NO-ISEL-NEXT:    mr 3, 7
372; CHECK-NO-ISEL-NEXT:    blr
373entry:
374  %cmp1 = icmp eq i64 %c3, %c4
375  %cmp3tmp = icmp eq i64 %c1, %c2
376  %cmp3 = icmp ult i1 %cmp3tmp, %cmp1
377  %cond = select i1 %cmp3, i64 %a1, i64 %a2
378  ret i64 %cond
379
380}
381
382define i64 @testi64sle(i64 %c1, i64 %c2, i64 %c3, i64 %c4, i64 %a1, i64 %a2) #0 {
383; CHECK-LABEL: testi64sle:
384; CHECK:       # %bb.0: # %entry
385; CHECK-NEXT:    cmpd 5, 6
386; CHECK-NEXT:    cmpd 1, 3, 4
387; CHECK-NEXT:    crorc 20, 6, 2
388; CHECK-NEXT:    isel 3, 7, 8, 20
389; CHECK-NEXT:    blr
390;
391; CHECK-NO-ISEL-LABEL: testi64sle:
392; CHECK-NO-ISEL:       # %bb.0: # %entry
393; CHECK-NO-ISEL-NEXT:    cmpd 5, 6
394; CHECK-NO-ISEL-NEXT:    bc 4, 2, .LBB12_3
395; CHECK-NO-ISEL-NEXT:  # %bb.1: # %entry
396; CHECK-NO-ISEL-NEXT:    cmpd 3, 4
397; CHECK-NO-ISEL-NEXT:    bc 12, 2, .LBB12_3
398; CHECK-NO-ISEL-NEXT:  # %bb.2: # %entry
399; CHECK-NO-ISEL-NEXT:    mr 7, 8
400; CHECK-NO-ISEL-NEXT:  .LBB12_3: # %entry
401; CHECK-NO-ISEL-NEXT:    mr 3, 7
402; CHECK-NO-ISEL-NEXT:    blr
403entry:
404  %cmp1 = icmp eq i64 %c3, %c4
405  %cmp3tmp = icmp eq i64 %c1, %c2
406  %cmp3 = icmp sle i1 %cmp3tmp, %cmp1
407  %cond = select i1 %cmp3, i64 %a1, i64 %a2
408  ret i64 %cond
409
410}
411
412define i64 @testi64ule(i64 %c1, i64 %c2, i64 %c3, i64 %c4, i64 %a1, i64 %a2) #0 {
413; CHECK-LABEL: testi64ule:
414; CHECK:       # %bb.0: # %entry
415; CHECK-NEXT:    cmpd 5, 6
416; CHECK-NEXT:    cmpd 1, 3, 4
417; CHECK-NEXT:    crorc 20, 2, 6
418; CHECK-NEXT:    isel 3, 7, 8, 20
419; CHECK-NEXT:    blr
420;
421; CHECK-NO-ISEL-LABEL: testi64ule:
422; CHECK-NO-ISEL:       # %bb.0: # %entry
423; CHECK-NO-ISEL-NEXT:    cmpd 5, 6
424; CHECK-NO-ISEL-NEXT:    bc 12, 2, .LBB13_3
425; CHECK-NO-ISEL-NEXT:  # %bb.1: # %entry
426; CHECK-NO-ISEL-NEXT:    cmpd 3, 4
427; CHECK-NO-ISEL-NEXT:    bc 4, 2, .LBB13_3
428; CHECK-NO-ISEL-NEXT:  # %bb.2: # %entry
429; CHECK-NO-ISEL-NEXT:    mr 7, 8
430; CHECK-NO-ISEL-NEXT:  .LBB13_3: # %entry
431; CHECK-NO-ISEL-NEXT:    mr 3, 7
432; CHECK-NO-ISEL-NEXT:    blr
433entry:
434  %cmp1 = icmp eq i64 %c3, %c4
435  %cmp3tmp = icmp eq i64 %c1, %c2
436  %cmp3 = icmp ule i1 %cmp3tmp, %cmp1
437  %cond = select i1 %cmp3, i64 %a1, i64 %a2
438  ret i64 %cond
439
440}
441
442define i64 @testi64eq(i64 %c1, i64 %c2, i64 %c3, i64 %c4, i64 %a1, i64 %a2) #0 {
443; CHECK-LABEL: testi64eq:
444; CHECK:       # %bb.0: # %entry
445; CHECK-NEXT:    cmpd 5, 6
446; CHECK-NEXT:    cmpd 1, 3, 4
447; CHECK-NEXT:    creqv 20, 6, 2
448; CHECK-NEXT:    isel 3, 7, 8, 20
449; CHECK-NEXT:    blr
450;
451; CHECK-NO-ISEL-LABEL: testi64eq:
452; CHECK-NO-ISEL:       # %bb.0: # %entry
453; CHECK-NO-ISEL-NEXT:    cmpd 5, 6
454; CHECK-NO-ISEL-NEXT:    cmpd 1, 3, 4
455; CHECK-NO-ISEL-NEXT:    creqv 20, 6, 2
456; CHECK-NO-ISEL-NEXT:    bc 12, 20, .LBB14_2
457; CHECK-NO-ISEL-NEXT:  # %bb.1: # %entry
458; CHECK-NO-ISEL-NEXT:    mr 7, 8
459; CHECK-NO-ISEL-NEXT:  .LBB14_2: # %entry
460; CHECK-NO-ISEL-NEXT:    mr 3, 7
461; CHECK-NO-ISEL-NEXT:    blr
462entry:
463  %cmp1 = icmp eq i64 %c3, %c4
464  %cmp3tmp = icmp eq i64 %c1, %c2
465  %cmp3 = icmp eq i1 %cmp3tmp, %cmp1
466  %cond = select i1 %cmp3, i64 %a1, i64 %a2
467  ret i64 %cond
468
469}
470
471define i64 @testi64sge(i64 %c1, i64 %c2, i64 %c3, i64 %c4, i64 %a1, i64 %a2) #0 {
472; CHECK-LABEL: testi64sge:
473; CHECK:       # %bb.0: # %entry
474; CHECK-NEXT:    cmpd 5, 6
475; CHECK-NEXT:    cmpd 1, 3, 4
476; CHECK-NEXT:    crorc 20, 2, 6
477; CHECK-NEXT:    isel 3, 7, 8, 20
478; CHECK-NEXT:    blr
479;
480; CHECK-NO-ISEL-LABEL: testi64sge:
481; CHECK-NO-ISEL:       # %bb.0: # %entry
482; CHECK-NO-ISEL-NEXT:    cmpd 5, 6
483; CHECK-NO-ISEL-NEXT:    bc 12, 2, .LBB15_3
484; CHECK-NO-ISEL-NEXT:  # %bb.1: # %entry
485; CHECK-NO-ISEL-NEXT:    cmpd 3, 4
486; CHECK-NO-ISEL-NEXT:    bc 4, 2, .LBB15_3
487; CHECK-NO-ISEL-NEXT:  # %bb.2: # %entry
488; CHECK-NO-ISEL-NEXT:    mr 7, 8
489; CHECK-NO-ISEL-NEXT:  .LBB15_3: # %entry
490; CHECK-NO-ISEL-NEXT:    mr 3, 7
491; CHECK-NO-ISEL-NEXT:    blr
492entry:
493  %cmp1 = icmp eq i64 %c3, %c4
494  %cmp3tmp = icmp eq i64 %c1, %c2
495  %cmp3 = icmp sge i1 %cmp3tmp, %cmp1
496  %cond = select i1 %cmp3, i64 %a1, i64 %a2
497  ret i64 %cond
498
499}
500
501define i64 @testi64uge(i64 %c1, i64 %c2, i64 %c3, i64 %c4, i64 %a1, i64 %a2) #0 {
502; CHECK-LABEL: testi64uge:
503; CHECK:       # %bb.0: # %entry
504; CHECK-NEXT:    cmpd 5, 6
505; CHECK-NEXT:    cmpd 1, 3, 4
506; CHECK-NEXT:    crorc 20, 6, 2
507; CHECK-NEXT:    isel 3, 7, 8, 20
508; CHECK-NEXT:    blr
509;
510; CHECK-NO-ISEL-LABEL: testi64uge:
511; CHECK-NO-ISEL:       # %bb.0: # %entry
512; CHECK-NO-ISEL-NEXT:    cmpd 5, 6
513; CHECK-NO-ISEL-NEXT:    bc 4, 2, .LBB16_3
514; CHECK-NO-ISEL-NEXT:  # %bb.1: # %entry
515; CHECK-NO-ISEL-NEXT:    cmpd 3, 4
516; CHECK-NO-ISEL-NEXT:    bc 12, 2, .LBB16_3
517; CHECK-NO-ISEL-NEXT:  # %bb.2: # %entry
518; CHECK-NO-ISEL-NEXT:    mr 7, 8
519; CHECK-NO-ISEL-NEXT:  .LBB16_3: # %entry
520; CHECK-NO-ISEL-NEXT:    mr 3, 7
521; CHECK-NO-ISEL-NEXT:    blr
522entry:
523  %cmp1 = icmp eq i64 %c3, %c4
524  %cmp3tmp = icmp eq i64 %c1, %c2
525  %cmp3 = icmp uge i1 %cmp3tmp, %cmp1
526  %cond = select i1 %cmp3, i64 %a1, i64 %a2
527  ret i64 %cond
528
529}
530
531define i64 @testi64sgt(i64 %c1, i64 %c2, i64 %c3, i64 %c4, i64 %a1, i64 %a2) #0 {
532; CHECK-LABEL: testi64sgt:
533; CHECK:       # %bb.0: # %entry
534; CHECK-NEXT:    cmpd 5, 6
535; CHECK-NEXT:    cmpd 1, 3, 4
536; CHECK-NEXT:    crandc 20, 2, 6
537; CHECK-NEXT:    isel 3, 7, 8, 20
538; CHECK-NEXT:    blr
539;
540; CHECK-NO-ISEL-LABEL: testi64sgt:
541; CHECK-NO-ISEL:       # %bb.0: # %entry
542; CHECK-NO-ISEL-NEXT:    cmpd 5, 6
543; CHECK-NO-ISEL-NEXT:    bc 4, 2, .LBB17_3
544; CHECK-NO-ISEL-NEXT:  # %bb.1: # %entry
545; CHECK-NO-ISEL-NEXT:    cmpd 3, 4
546; CHECK-NO-ISEL-NEXT:    bc 12, 2, .LBB17_3
547; CHECK-NO-ISEL-NEXT:  # %bb.2: # %entry
548; CHECK-NO-ISEL-NEXT:    mr 3, 7
549; CHECK-NO-ISEL-NEXT:    blr
550; CHECK-NO-ISEL-NEXT:  .LBB17_3: # %entry
551; CHECK-NO-ISEL-NEXT:    mr 7, 8
552; CHECK-NO-ISEL-NEXT:    mr 3, 7
553; CHECK-NO-ISEL-NEXT:    blr
554entry:
555  %cmp1 = icmp eq i64 %c3, %c4
556  %cmp3tmp = icmp eq i64 %c1, %c2
557  %cmp3 = icmp sgt i1 %cmp3tmp, %cmp1
558  %cond = select i1 %cmp3, i64 %a1, i64 %a2
559  ret i64 %cond
560
561}
562
563define i64 @testi64ugt(i64 %c1, i64 %c2, i64 %c3, i64 %c4, i64 %a1, i64 %a2) #0 {
564; CHECK-LABEL: testi64ugt:
565; CHECK:       # %bb.0: # %entry
566; CHECK-NEXT:    cmpd 5, 6
567; CHECK-NEXT:    cmpd 1, 3, 4
568; CHECK-NEXT:    crandc 20, 6, 2
569; CHECK-NEXT:    isel 3, 7, 8, 20
570; CHECK-NEXT:    blr
571;
572; CHECK-NO-ISEL-LABEL: testi64ugt:
573; CHECK-NO-ISEL:       # %bb.0: # %entry
574; CHECK-NO-ISEL-NEXT:    cmpd 5, 6
575; CHECK-NO-ISEL-NEXT:    bc 12, 2, .LBB18_3
576; CHECK-NO-ISEL-NEXT:  # %bb.1: # %entry
577; CHECK-NO-ISEL-NEXT:    cmpd 3, 4
578; CHECK-NO-ISEL-NEXT:    bc 4, 2, .LBB18_3
579; CHECK-NO-ISEL-NEXT:  # %bb.2: # %entry
580; CHECK-NO-ISEL-NEXT:    mr 3, 7
581; CHECK-NO-ISEL-NEXT:    blr
582; CHECK-NO-ISEL-NEXT:  .LBB18_3: # %entry
583; CHECK-NO-ISEL-NEXT:    mr 7, 8
584; CHECK-NO-ISEL-NEXT:    mr 3, 7
585; CHECK-NO-ISEL-NEXT:    blr
586entry:
587  %cmp1 = icmp eq i64 %c3, %c4
588  %cmp3tmp = icmp eq i64 %c1, %c2
589  %cmp3 = icmp ugt i1 %cmp3tmp, %cmp1
590  %cond = select i1 %cmp3, i64 %a1, i64 %a2
591  ret i64 %cond
592
593}
594
595define i64 @testi64ne(i64 %c1, i64 %c2, i64 %c3, i64 %c4, i64 %a1, i64 %a2) #0 {
596; CHECK-LABEL: testi64ne:
597; CHECK:       # %bb.0: # %entry
598; CHECK-NEXT:    cmpd 5, 6
599; CHECK-NEXT:    cmpd 1, 3, 4
600; CHECK-NEXT:    crxor 20, 6, 2
601; CHECK-NEXT:    isel 3, 7, 8, 20
602; CHECK-NEXT:    blr
603;
604; CHECK-NO-ISEL-LABEL: testi64ne:
605; CHECK-NO-ISEL:       # %bb.0: # %entry
606; CHECK-NO-ISEL-NEXT:    cmpd 5, 6
607; CHECK-NO-ISEL-NEXT:    cmpd 1, 3, 4
608; CHECK-NO-ISEL-NEXT:    crxor 20, 6, 2
609; CHECK-NO-ISEL-NEXT:    bc 12, 20, .LBB19_2
610; CHECK-NO-ISEL-NEXT:  # %bb.1: # %entry
611; CHECK-NO-ISEL-NEXT:    mr 7, 8
612; CHECK-NO-ISEL-NEXT:  .LBB19_2: # %entry
613; CHECK-NO-ISEL-NEXT:    mr 3, 7
614; CHECK-NO-ISEL-NEXT:    blr
615entry:
616  %cmp1 = icmp eq i64 %c3, %c4
617  %cmp3tmp = icmp eq i64 %c1, %c2
618  %cmp3 = icmp ne i1 %cmp3tmp, %cmp1
619  %cond = select i1 %cmp3, i64 %a1, i64 %a2
620  ret i64 %cond
621
622}
623
624define float @testfloatslt(float %c1, float %c2, float %c3, float %c4, float %a1, float %a2) #0 {
625; CHECK-LABEL: testfloatslt:
626; CHECK:       # %bb.0: # %entry
627; CHECK-NEXT:    fcmpu 0, 3, 4
628; CHECK-NEXT:    bc 12, 2, .LBB20_2
629; CHECK-NEXT:  # %bb.1: # %entry
630; CHECK-NEXT:    fcmpu 0, 1, 2
631; CHECK-NEXT:    bc 12, 2, .LBB20_3
632; CHECK-NEXT:  .LBB20_2: # %entry
633; CHECK-NEXT:    fmr 5, 6
634; CHECK-NEXT:  .LBB20_3: # %entry
635; CHECK-NEXT:    fmr 1, 5
636; CHECK-NEXT:    blr
637;
638; CHECK-NO-ISEL-LABEL: testfloatslt:
639; CHECK-NO-ISEL:       # %bb.0: # %entry
640; CHECK-NO-ISEL-NEXT:    fcmpu 0, 3, 4
641; CHECK-NO-ISEL-NEXT:    bc 12, 2, .LBB20_3
642; CHECK-NO-ISEL-NEXT:  # %bb.1: # %entry
643; CHECK-NO-ISEL-NEXT:    fcmpu 0, 1, 2
644; CHECK-NO-ISEL-NEXT:    bc 4, 2, .LBB20_3
645; CHECK-NO-ISEL-NEXT:  # %bb.2: # %entry
646; CHECK-NO-ISEL-NEXT:    fmr 1, 5
647; CHECK-NO-ISEL-NEXT:    blr
648; CHECK-NO-ISEL-NEXT:  .LBB20_3: # %entry
649; CHECK-NO-ISEL-NEXT:    fmr 5, 6
650; CHECK-NO-ISEL-NEXT:    fmr 1, 5
651; CHECK-NO-ISEL-NEXT:    blr
652entry:
653  %cmp1 = fcmp oeq float %c3, %c4
654  %cmp3tmp = fcmp oeq float %c1, %c2
655  %cmp3 = icmp slt i1 %cmp3tmp, %cmp1
656  %cond = select i1 %cmp3, float %a1, float %a2
657  ret float %cond
658
659}
660
661define float @testfloatult(float %c1, float %c2, float %c3, float %c4, float %a1, float %a2) #0 {
662; CHECK-LABEL: testfloatult:
663; CHECK:       # %bb.0: # %entry
664; CHECK-NEXT:    fcmpu 0, 3, 4
665; CHECK-NEXT:    bc 4, 2, .LBB21_2
666; CHECK-NEXT:  # %bb.1: # %entry
667; CHECK-NEXT:    fcmpu 0, 1, 2
668; CHECK-NEXT:    bc 4, 2, .LBB21_3
669; CHECK-NEXT:  .LBB21_2: # %entry
670; CHECK-NEXT:    fmr 5, 6
671; CHECK-NEXT:  .LBB21_3: # %entry
672; CHECK-NEXT:    fmr 1, 5
673; CHECK-NEXT:    blr
674;
675; CHECK-NO-ISEL-LABEL: testfloatult:
676; CHECK-NO-ISEL:       # %bb.0: # %entry
677; CHECK-NO-ISEL-NEXT:    fcmpu 0, 3, 4
678; CHECK-NO-ISEL-NEXT:    bc 4, 2, .LBB21_3
679; CHECK-NO-ISEL-NEXT:  # %bb.1: # %entry
680; CHECK-NO-ISEL-NEXT:    fcmpu 0, 1, 2
681; CHECK-NO-ISEL-NEXT:    bc 12, 2, .LBB21_3
682; CHECK-NO-ISEL-NEXT:  # %bb.2: # %entry
683; CHECK-NO-ISEL-NEXT:    fmr 1, 5
684; CHECK-NO-ISEL-NEXT:    blr
685; CHECK-NO-ISEL-NEXT:  .LBB21_3: # %entry
686; CHECK-NO-ISEL-NEXT:    fmr 5, 6
687; CHECK-NO-ISEL-NEXT:    fmr 1, 5
688; CHECK-NO-ISEL-NEXT:    blr
689entry:
690  %cmp1 = fcmp oeq float %c3, %c4
691  %cmp3tmp = fcmp oeq float %c1, %c2
692  %cmp3 = icmp ult i1 %cmp3tmp, %cmp1
693  %cond = select i1 %cmp3, float %a1, float %a2
694  ret float %cond
695
696}
697
698define float @testfloatsle(float %c1, float %c2, float %c3, float %c4, float %a1, float %a2) #0 {
699; CHECK-LABEL: testfloatsle:
700; CHECK:       # %bb.0: # %entry
701; CHECK-NEXT:    fcmpu 0, 3, 4
702; CHECK-NEXT:    bc 4, 2, .LBB22_3
703; CHECK-NEXT:  # %bb.1: # %entry
704; CHECK-NEXT:    fcmpu 0, 1, 2
705; CHECK-NEXT:    bc 12, 2, .LBB22_3
706; CHECK-NEXT:  # %bb.2: # %entry
707; CHECK-NEXT:    fmr 5, 6
708; CHECK-NEXT:  .LBB22_3: # %entry
709; CHECK-NEXT:    fmr 1, 5
710; CHECK-NEXT:    blr
711;
712; CHECK-NO-ISEL-LABEL: testfloatsle:
713; CHECK-NO-ISEL:       # %bb.0: # %entry
714; CHECK-NO-ISEL-NEXT:    fcmpu 0, 3, 4
715; CHECK-NO-ISEL-NEXT:    bc 4, 2, .LBB22_3
716; CHECK-NO-ISEL-NEXT:  # %bb.1: # %entry
717; CHECK-NO-ISEL-NEXT:    fcmpu 0, 1, 2
718; CHECK-NO-ISEL-NEXT:    bc 12, 2, .LBB22_3
719; CHECK-NO-ISEL-NEXT:  # %bb.2: # %entry
720; CHECK-NO-ISEL-NEXT:    fmr 5, 6
721; CHECK-NO-ISEL-NEXT:  .LBB22_3: # %entry
722; CHECK-NO-ISEL-NEXT:    fmr 1, 5
723; CHECK-NO-ISEL-NEXT:    blr
724entry:
725  %cmp1 = fcmp oeq float %c3, %c4
726  %cmp3tmp = fcmp oeq float %c1, %c2
727  %cmp3 = icmp sle i1 %cmp3tmp, %cmp1
728  %cond = select i1 %cmp3, float %a1, float %a2
729  ret float %cond
730
731}
732
733define float @testfloatule(float %c1, float %c2, float %c3, float %c4, float %a1, float %a2) #0 {
734; CHECK-LABEL: testfloatule:
735; CHECK:       # %bb.0: # %entry
736; CHECK-NEXT:    fcmpu 0, 3, 4
737; CHECK-NEXT:    bc 12, 2, .LBB23_3
738; CHECK-NEXT:  # %bb.1: # %entry
739; CHECK-NEXT:    fcmpu 0, 1, 2
740; CHECK-NEXT:    bc 4, 2, .LBB23_3
741; CHECK-NEXT:  # %bb.2: # %entry
742; CHECK-NEXT:    fmr 5, 6
743; CHECK-NEXT:  .LBB23_3: # %entry
744; CHECK-NEXT:    fmr 1, 5
745; CHECK-NEXT:    blr
746;
747; CHECK-NO-ISEL-LABEL: testfloatule:
748; CHECK-NO-ISEL:       # %bb.0: # %entry
749; CHECK-NO-ISEL-NEXT:    fcmpu 0, 3, 4
750; CHECK-NO-ISEL-NEXT:    bc 12, 2, .LBB23_3
751; CHECK-NO-ISEL-NEXT:  # %bb.1: # %entry
752; CHECK-NO-ISEL-NEXT:    fcmpu 0, 1, 2
753; CHECK-NO-ISEL-NEXT:    bc 4, 2, .LBB23_3
754; CHECK-NO-ISEL-NEXT:  # %bb.2: # %entry
755; CHECK-NO-ISEL-NEXT:    fmr 5, 6
756; CHECK-NO-ISEL-NEXT:  .LBB23_3: # %entry
757; CHECK-NO-ISEL-NEXT:    fmr 1, 5
758; CHECK-NO-ISEL-NEXT:    blr
759entry:
760  %cmp1 = fcmp oeq float %c3, %c4
761  %cmp3tmp = fcmp oeq float %c1, %c2
762  %cmp3 = icmp ule i1 %cmp3tmp, %cmp1
763  %cond = select i1 %cmp3, float %a1, float %a2
764  ret float %cond
765
766}
767
768define float @testfloateq(float %c1, float %c2, float %c3, float %c4, float %a1, float %a2) #0 {
769; CHECK-LABEL: testfloateq:
770; CHECK:       # %bb.0: # %entry
771; CHECK-NEXT:    fcmpu 0, 3, 4
772; CHECK-NEXT:    fcmpu 1, 1, 2
773; CHECK-NEXT:    creqv 20, 6, 2
774; CHECK-NEXT:    bc 12, 20, .LBB24_2
775; CHECK-NEXT:  # %bb.1: # %entry
776; CHECK-NEXT:    fmr 5, 6
777; CHECK-NEXT:  .LBB24_2: # %entry
778; CHECK-NEXT:    fmr 1, 5
779; CHECK-NEXT:    blr
780;
781; CHECK-NO-ISEL-LABEL: testfloateq:
782; CHECK-NO-ISEL:       # %bb.0: # %entry
783; CHECK-NO-ISEL-NEXT:    fcmpu 0, 3, 4
784; CHECK-NO-ISEL-NEXT:    fcmpu 1, 1, 2
785; CHECK-NO-ISEL-NEXT:    creqv 20, 6, 2
786; CHECK-NO-ISEL-NEXT:    bc 12, 20, .LBB24_2
787; CHECK-NO-ISEL-NEXT:  # %bb.1: # %entry
788; CHECK-NO-ISEL-NEXT:    fmr 5, 6
789; CHECK-NO-ISEL-NEXT:  .LBB24_2: # %entry
790; CHECK-NO-ISEL-NEXT:    fmr 1, 5
791; CHECK-NO-ISEL-NEXT:    blr
792entry:
793  %cmp1 = fcmp oeq float %c3, %c4
794  %cmp3tmp = fcmp oeq float %c1, %c2
795  %cmp3 = icmp eq i1 %cmp3tmp, %cmp1
796  %cond = select i1 %cmp3, float %a1, float %a2
797  ret float %cond
798
799}
800
801define float @testfloatsge(float %c1, float %c2, float %c3, float %c4, float %a1, float %a2) #0 {
802; CHECK-LABEL: testfloatsge:
803; CHECK:       # %bb.0: # %entry
804; CHECK-NEXT:    fcmpu 0, 3, 4
805; CHECK-NEXT:    bc 12, 2, .LBB25_3
806; CHECK-NEXT:  # %bb.1: # %entry
807; CHECK-NEXT:    fcmpu 0, 1, 2
808; CHECK-NEXT:    bc 4, 2, .LBB25_3
809; CHECK-NEXT:  # %bb.2: # %entry
810; CHECK-NEXT:    fmr 5, 6
811; CHECK-NEXT:  .LBB25_3: # %entry
812; CHECK-NEXT:    fmr 1, 5
813; CHECK-NEXT:    blr
814;
815; CHECK-NO-ISEL-LABEL: testfloatsge:
816; CHECK-NO-ISEL:       # %bb.0: # %entry
817; CHECK-NO-ISEL-NEXT:    fcmpu 0, 3, 4
818; CHECK-NO-ISEL-NEXT:    bc 12, 2, .LBB25_3
819; CHECK-NO-ISEL-NEXT:  # %bb.1: # %entry
820; CHECK-NO-ISEL-NEXT:    fcmpu 0, 1, 2
821; CHECK-NO-ISEL-NEXT:    bc 4, 2, .LBB25_3
822; CHECK-NO-ISEL-NEXT:  # %bb.2: # %entry
823; CHECK-NO-ISEL-NEXT:    fmr 5, 6
824; CHECK-NO-ISEL-NEXT:  .LBB25_3: # %entry
825; CHECK-NO-ISEL-NEXT:    fmr 1, 5
826; CHECK-NO-ISEL-NEXT:    blr
827entry:
828  %cmp1 = fcmp oeq float %c3, %c4
829  %cmp3tmp = fcmp oeq float %c1, %c2
830  %cmp3 = icmp sge i1 %cmp3tmp, %cmp1
831  %cond = select i1 %cmp3, float %a1, float %a2
832  ret float %cond
833
834}
835
836define float @testfloatuge(float %c1, float %c2, float %c3, float %c4, float %a1, float %a2) #0 {
837; CHECK-LABEL: testfloatuge:
838; CHECK:       # %bb.0: # %entry
839; CHECK-NEXT:    fcmpu 0, 3, 4
840; CHECK-NEXT:    bc 4, 2, .LBB26_3
841; CHECK-NEXT:  # %bb.1: # %entry
842; CHECK-NEXT:    fcmpu 0, 1, 2
843; CHECK-NEXT:    bc 12, 2, .LBB26_3
844; CHECK-NEXT:  # %bb.2: # %entry
845; CHECK-NEXT:    fmr 5, 6
846; CHECK-NEXT:  .LBB26_3: # %entry
847; CHECK-NEXT:    fmr 1, 5
848; CHECK-NEXT:    blr
849;
850; CHECK-NO-ISEL-LABEL: testfloatuge:
851; CHECK-NO-ISEL:       # %bb.0: # %entry
852; CHECK-NO-ISEL-NEXT:    fcmpu 0, 3, 4
853; CHECK-NO-ISEL-NEXT:    bc 4, 2, .LBB26_3
854; CHECK-NO-ISEL-NEXT:  # %bb.1: # %entry
855; CHECK-NO-ISEL-NEXT:    fcmpu 0, 1, 2
856; CHECK-NO-ISEL-NEXT:    bc 12, 2, .LBB26_3
857; CHECK-NO-ISEL-NEXT:  # %bb.2: # %entry
858; CHECK-NO-ISEL-NEXT:    fmr 5, 6
859; CHECK-NO-ISEL-NEXT:  .LBB26_3: # %entry
860; CHECK-NO-ISEL-NEXT:    fmr 1, 5
861; CHECK-NO-ISEL-NEXT:    blr
862entry:
863  %cmp1 = fcmp oeq float %c3, %c4
864  %cmp3tmp = fcmp oeq float %c1, %c2
865  %cmp3 = icmp uge i1 %cmp3tmp, %cmp1
866  %cond = select i1 %cmp3, float %a1, float %a2
867  ret float %cond
868
869}
870
871define float @testfloatsgt(float %c1, float %c2, float %c3, float %c4, float %a1, float %a2) #0 {
872; CHECK-LABEL: testfloatsgt:
873; CHECK:       # %bb.0: # %entry
874; CHECK-NEXT:    fcmpu 0, 3, 4
875; CHECK-NEXT:    bc 4, 2, .LBB27_2
876; CHECK-NEXT:  # %bb.1: # %entry
877; CHECK-NEXT:    fcmpu 0, 1, 2
878; CHECK-NEXT:    bc 4, 2, .LBB27_3
879; CHECK-NEXT:  .LBB27_2: # %entry
880; CHECK-NEXT:    fmr 5, 6
881; CHECK-NEXT:  .LBB27_3: # %entry
882; CHECK-NEXT:    fmr 1, 5
883; CHECK-NEXT:    blr
884;
885; CHECK-NO-ISEL-LABEL: testfloatsgt:
886; CHECK-NO-ISEL:       # %bb.0: # %entry
887; CHECK-NO-ISEL-NEXT:    fcmpu 0, 3, 4
888; CHECK-NO-ISEL-NEXT:    bc 4, 2, .LBB27_3
889; CHECK-NO-ISEL-NEXT:  # %bb.1: # %entry
890; CHECK-NO-ISEL-NEXT:    fcmpu 0, 1, 2
891; CHECK-NO-ISEL-NEXT:    bc 12, 2, .LBB27_3
892; CHECK-NO-ISEL-NEXT:  # %bb.2: # %entry
893; CHECK-NO-ISEL-NEXT:    fmr 1, 5
894; CHECK-NO-ISEL-NEXT:    blr
895; CHECK-NO-ISEL-NEXT:  .LBB27_3: # %entry
896; CHECK-NO-ISEL-NEXT:    fmr 5, 6
897; CHECK-NO-ISEL-NEXT:    fmr 1, 5
898; CHECK-NO-ISEL-NEXT:    blr
899entry:
900  %cmp1 = fcmp oeq float %c3, %c4
901  %cmp3tmp = fcmp oeq float %c1, %c2
902  %cmp3 = icmp sgt i1 %cmp3tmp, %cmp1
903  %cond = select i1 %cmp3, float %a1, float %a2
904  ret float %cond
905
906}
907
908define float @testfloatugt(float %c1, float %c2, float %c3, float %c4, float %a1, float %a2) #0 {
909; CHECK-LABEL: testfloatugt:
910; CHECK:       # %bb.0: # %entry
911; CHECK-NEXT:    fcmpu 0, 3, 4
912; CHECK-NEXT:    bc 12, 2, .LBB28_2
913; CHECK-NEXT:  # %bb.1: # %entry
914; CHECK-NEXT:    fcmpu 0, 1, 2
915; CHECK-NEXT:    bc 12, 2, .LBB28_3
916; CHECK-NEXT:  .LBB28_2: # %entry
917; CHECK-NEXT:    fmr 5, 6
918; CHECK-NEXT:  .LBB28_3: # %entry
919; CHECK-NEXT:    fmr 1, 5
920; CHECK-NEXT:    blr
921;
922; CHECK-NO-ISEL-LABEL: testfloatugt:
923; CHECK-NO-ISEL:       # %bb.0: # %entry
924; CHECK-NO-ISEL-NEXT:    fcmpu 0, 3, 4
925; CHECK-NO-ISEL-NEXT:    bc 12, 2, .LBB28_3
926; CHECK-NO-ISEL-NEXT:  # %bb.1: # %entry
927; CHECK-NO-ISEL-NEXT:    fcmpu 0, 1, 2
928; CHECK-NO-ISEL-NEXT:    bc 4, 2, .LBB28_3
929; CHECK-NO-ISEL-NEXT:  # %bb.2: # %entry
930; CHECK-NO-ISEL-NEXT:    fmr 1, 5
931; CHECK-NO-ISEL-NEXT:    blr
932; CHECK-NO-ISEL-NEXT:  .LBB28_3: # %entry
933; CHECK-NO-ISEL-NEXT:    fmr 5, 6
934; CHECK-NO-ISEL-NEXT:    fmr 1, 5
935; CHECK-NO-ISEL-NEXT:    blr
936entry:
937  %cmp1 = fcmp oeq float %c3, %c4
938  %cmp3tmp = fcmp oeq float %c1, %c2
939  %cmp3 = icmp ugt i1 %cmp3tmp, %cmp1
940  %cond = select i1 %cmp3, float %a1, float %a2
941  ret float %cond
942
943}
944
945define float @testfloatne(float %c1, float %c2, float %c3, float %c4, float %a1, float %a2) #0 {
946; CHECK-LABEL: testfloatne:
947; CHECK:       # %bb.0: # %entry
948; CHECK-NEXT:    fcmpu 0, 3, 4
949; CHECK-NEXT:    fcmpu 1, 1, 2
950; CHECK-NEXT:    crxor 20, 6, 2
951; CHECK-NEXT:    bc 12, 20, .LBB29_2
952; CHECK-NEXT:  # %bb.1: # %entry
953; CHECK-NEXT:    fmr 5, 6
954; CHECK-NEXT:  .LBB29_2: # %entry
955; CHECK-NEXT:    fmr 1, 5
956; CHECK-NEXT:    blr
957;
958; CHECK-NO-ISEL-LABEL: testfloatne:
959; CHECK-NO-ISEL:       # %bb.0: # %entry
960; CHECK-NO-ISEL-NEXT:    fcmpu 0, 3, 4
961; CHECK-NO-ISEL-NEXT:    fcmpu 1, 1, 2
962; CHECK-NO-ISEL-NEXT:    crxor 20, 6, 2
963; CHECK-NO-ISEL-NEXT:    bc 12, 20, .LBB29_2
964; CHECK-NO-ISEL-NEXT:  # %bb.1: # %entry
965; CHECK-NO-ISEL-NEXT:    fmr 5, 6
966; CHECK-NO-ISEL-NEXT:  .LBB29_2: # %entry
967; CHECK-NO-ISEL-NEXT:    fmr 1, 5
968; CHECK-NO-ISEL-NEXT:    blr
969entry:
970  %cmp1 = fcmp oeq float %c3, %c4
971  %cmp3tmp = fcmp oeq float %c1, %c2
972  %cmp3 = icmp ne i1 %cmp3tmp, %cmp1
973  %cond = select i1 %cmp3, float %a1, float %a2
974  ret float %cond
975
976}
977
978define double @testdoubleslt(double %c1, double %c2, double %c3, double %c4, double %a1, double %a2) #0 {
979; CHECK-LABEL: testdoubleslt:
980; CHECK:       # %bb.0: # %entry
981; CHECK-NEXT:    fcmpu 0, 3, 4
982; CHECK-NEXT:    bc 12, 2, .LBB30_2
983; CHECK-NEXT:  # %bb.1: # %entry
984; CHECK-NEXT:    fcmpu 0, 1, 2
985; CHECK-NEXT:    bc 12, 2, .LBB30_3
986; CHECK-NEXT:  .LBB30_2: # %entry
987; CHECK-NEXT:    fmr 5, 6
988; CHECK-NEXT:  .LBB30_3: # %entry
989; CHECK-NEXT:    fmr 1, 5
990; CHECK-NEXT:    blr
991;
992; CHECK-NO-ISEL-LABEL: testdoubleslt:
993; CHECK-NO-ISEL:       # %bb.0: # %entry
994; CHECK-NO-ISEL-NEXT:    fcmpu 0, 3, 4
995; CHECK-NO-ISEL-NEXT:    bc 12, 2, .LBB30_3
996; CHECK-NO-ISEL-NEXT:  # %bb.1: # %entry
997; CHECK-NO-ISEL-NEXT:    fcmpu 0, 1, 2
998; CHECK-NO-ISEL-NEXT:    bc 4, 2, .LBB30_3
999; CHECK-NO-ISEL-NEXT:  # %bb.2: # %entry
1000; CHECK-NO-ISEL-NEXT:    fmr 1, 5
1001; CHECK-NO-ISEL-NEXT:    blr
1002; CHECK-NO-ISEL-NEXT:  .LBB30_3: # %entry
1003; CHECK-NO-ISEL-NEXT:    fmr 5, 6
1004; CHECK-NO-ISEL-NEXT:    fmr 1, 5
1005; CHECK-NO-ISEL-NEXT:    blr
1006entry:
1007  %cmp1 = fcmp oeq double %c3, %c4
1008  %cmp3tmp = fcmp oeq double %c1, %c2
1009  %cmp3 = icmp slt i1 %cmp3tmp, %cmp1
1010  %cond = select i1 %cmp3, double %a1, double %a2
1011  ret double %cond
1012
1013}
1014
1015define double @testdoubleult(double %c1, double %c2, double %c3, double %c4, double %a1, double %a2) #0 {
1016; CHECK-LABEL: testdoubleult:
1017; CHECK:       # %bb.0: # %entry
1018; CHECK-NEXT:    fcmpu 0, 3, 4
1019; CHECK-NEXT:    bc 4, 2, .LBB31_2
1020; CHECK-NEXT:  # %bb.1: # %entry
1021; CHECK-NEXT:    fcmpu 0, 1, 2
1022; CHECK-NEXT:    bc 4, 2, .LBB31_3
1023; CHECK-NEXT:  .LBB31_2: # %entry
1024; CHECK-NEXT:    fmr 5, 6
1025; CHECK-NEXT:  .LBB31_3: # %entry
1026; CHECK-NEXT:    fmr 1, 5
1027; CHECK-NEXT:    blr
1028;
1029; CHECK-NO-ISEL-LABEL: testdoubleult:
1030; CHECK-NO-ISEL:       # %bb.0: # %entry
1031; CHECK-NO-ISEL-NEXT:    fcmpu 0, 3, 4
1032; CHECK-NO-ISEL-NEXT:    bc 4, 2, .LBB31_3
1033; CHECK-NO-ISEL-NEXT:  # %bb.1: # %entry
1034; CHECK-NO-ISEL-NEXT:    fcmpu 0, 1, 2
1035; CHECK-NO-ISEL-NEXT:    bc 12, 2, .LBB31_3
1036; CHECK-NO-ISEL-NEXT:  # %bb.2: # %entry
1037; CHECK-NO-ISEL-NEXT:    fmr 1, 5
1038; CHECK-NO-ISEL-NEXT:    blr
1039; CHECK-NO-ISEL-NEXT:  .LBB31_3: # %entry
1040; CHECK-NO-ISEL-NEXT:    fmr 5, 6
1041; CHECK-NO-ISEL-NEXT:    fmr 1, 5
1042; CHECK-NO-ISEL-NEXT:    blr
1043entry:
1044  %cmp1 = fcmp oeq double %c3, %c4
1045  %cmp3tmp = fcmp oeq double %c1, %c2
1046  %cmp3 = icmp ult i1 %cmp3tmp, %cmp1
1047  %cond = select i1 %cmp3, double %a1, double %a2
1048  ret double %cond
1049
1050}
1051
1052define double @testdoublesle(double %c1, double %c2, double %c3, double %c4, double %a1, double %a2) #0 {
1053; CHECK-LABEL: testdoublesle:
1054; CHECK:       # %bb.0: # %entry
1055; CHECK-NEXT:    fcmpu 0, 3, 4
1056; CHECK-NEXT:    bc 4, 2, .LBB32_3
1057; CHECK-NEXT:  # %bb.1: # %entry
1058; CHECK-NEXT:    fcmpu 0, 1, 2
1059; CHECK-NEXT:    bc 12, 2, .LBB32_3
1060; CHECK-NEXT:  # %bb.2: # %entry
1061; CHECK-NEXT:    fmr 5, 6
1062; CHECK-NEXT:  .LBB32_3: # %entry
1063; CHECK-NEXT:    fmr 1, 5
1064; CHECK-NEXT:    blr
1065;
1066; CHECK-NO-ISEL-LABEL: testdoublesle:
1067; CHECK-NO-ISEL:       # %bb.0: # %entry
1068; CHECK-NO-ISEL-NEXT:    fcmpu 0, 3, 4
1069; CHECK-NO-ISEL-NEXT:    bc 4, 2, .LBB32_3
1070; CHECK-NO-ISEL-NEXT:  # %bb.1: # %entry
1071; CHECK-NO-ISEL-NEXT:    fcmpu 0, 1, 2
1072; CHECK-NO-ISEL-NEXT:    bc 12, 2, .LBB32_3
1073; CHECK-NO-ISEL-NEXT:  # %bb.2: # %entry
1074; CHECK-NO-ISEL-NEXT:    fmr 5, 6
1075; CHECK-NO-ISEL-NEXT:  .LBB32_3: # %entry
1076; CHECK-NO-ISEL-NEXT:    fmr 1, 5
1077; CHECK-NO-ISEL-NEXT:    blr
1078entry:
1079  %cmp1 = fcmp oeq double %c3, %c4
1080  %cmp3tmp = fcmp oeq double %c1, %c2
1081  %cmp3 = icmp sle i1 %cmp3tmp, %cmp1
1082  %cond = select i1 %cmp3, double %a1, double %a2
1083  ret double %cond
1084
1085}
1086
1087define double @testdoubleule(double %c1, double %c2, double %c3, double %c4, double %a1, double %a2) #0 {
1088; CHECK-LABEL: testdoubleule:
1089; CHECK:       # %bb.0: # %entry
1090; CHECK-NEXT:    fcmpu 0, 3, 4
1091; CHECK-NEXT:    bc 12, 2, .LBB33_3
1092; CHECK-NEXT:  # %bb.1: # %entry
1093; CHECK-NEXT:    fcmpu 0, 1, 2
1094; CHECK-NEXT:    bc 4, 2, .LBB33_3
1095; CHECK-NEXT:  # %bb.2: # %entry
1096; CHECK-NEXT:    fmr 5, 6
1097; CHECK-NEXT:  .LBB33_3: # %entry
1098; CHECK-NEXT:    fmr 1, 5
1099; CHECK-NEXT:    blr
1100;
1101; CHECK-NO-ISEL-LABEL: testdoubleule:
1102; CHECK-NO-ISEL:       # %bb.0: # %entry
1103; CHECK-NO-ISEL-NEXT:    fcmpu 0, 3, 4
1104; CHECK-NO-ISEL-NEXT:    bc 12, 2, .LBB33_3
1105; CHECK-NO-ISEL-NEXT:  # %bb.1: # %entry
1106; CHECK-NO-ISEL-NEXT:    fcmpu 0, 1, 2
1107; CHECK-NO-ISEL-NEXT:    bc 4, 2, .LBB33_3
1108; CHECK-NO-ISEL-NEXT:  # %bb.2: # %entry
1109; CHECK-NO-ISEL-NEXT:    fmr 5, 6
1110; CHECK-NO-ISEL-NEXT:  .LBB33_3: # %entry
1111; CHECK-NO-ISEL-NEXT:    fmr 1, 5
1112; CHECK-NO-ISEL-NEXT:    blr
1113entry:
1114  %cmp1 = fcmp oeq double %c3, %c4
1115  %cmp3tmp = fcmp oeq double %c1, %c2
1116  %cmp3 = icmp ule i1 %cmp3tmp, %cmp1
1117  %cond = select i1 %cmp3, double %a1, double %a2
1118  ret double %cond
1119
1120}
1121
1122define double @testdoubleeq(double %c1, double %c2, double %c3, double %c4, double %a1, double %a2) #0 {
1123; CHECK-LABEL: testdoubleeq:
1124; CHECK:       # %bb.0: # %entry
1125; CHECK-NEXT:    fcmpu 0, 3, 4
1126; CHECK-NEXT:    fcmpu 1, 1, 2
1127; CHECK-NEXT:    creqv 20, 6, 2
1128; CHECK-NEXT:    bc 12, 20, .LBB34_2
1129; CHECK-NEXT:  # %bb.1: # %entry
1130; CHECK-NEXT:    fmr 5, 6
1131; CHECK-NEXT:  .LBB34_2: # %entry
1132; CHECK-NEXT:    fmr 1, 5
1133; CHECK-NEXT:    blr
1134;
1135; CHECK-NO-ISEL-LABEL: testdoubleeq:
1136; CHECK-NO-ISEL:       # %bb.0: # %entry
1137; CHECK-NO-ISEL-NEXT:    fcmpu 0, 3, 4
1138; CHECK-NO-ISEL-NEXT:    fcmpu 1, 1, 2
1139; CHECK-NO-ISEL-NEXT:    creqv 20, 6, 2
1140; CHECK-NO-ISEL-NEXT:    bc 12, 20, .LBB34_2
1141; CHECK-NO-ISEL-NEXT:  # %bb.1: # %entry
1142; CHECK-NO-ISEL-NEXT:    fmr 5, 6
1143; CHECK-NO-ISEL-NEXT:  .LBB34_2: # %entry
1144; CHECK-NO-ISEL-NEXT:    fmr 1, 5
1145; CHECK-NO-ISEL-NEXT:    blr
1146entry:
1147  %cmp1 = fcmp oeq double %c3, %c4
1148  %cmp3tmp = fcmp oeq double %c1, %c2
1149  %cmp3 = icmp eq i1 %cmp3tmp, %cmp1
1150  %cond = select i1 %cmp3, double %a1, double %a2
1151  ret double %cond
1152
1153}
1154
1155define double @testdoublesge(double %c1, double %c2, double %c3, double %c4, double %a1, double %a2) #0 {
1156; CHECK-LABEL: testdoublesge:
1157; CHECK:       # %bb.0: # %entry
1158; CHECK-NEXT:    fcmpu 0, 3, 4
1159; CHECK-NEXT:    bc 12, 2, .LBB35_3
1160; CHECK-NEXT:  # %bb.1: # %entry
1161; CHECK-NEXT:    fcmpu 0, 1, 2
1162; CHECK-NEXT:    bc 4, 2, .LBB35_3
1163; CHECK-NEXT:  # %bb.2: # %entry
1164; CHECK-NEXT:    fmr 5, 6
1165; CHECK-NEXT:  .LBB35_3: # %entry
1166; CHECK-NEXT:    fmr 1, 5
1167; CHECK-NEXT:    blr
1168;
1169; CHECK-NO-ISEL-LABEL: testdoublesge:
1170; CHECK-NO-ISEL:       # %bb.0: # %entry
1171; CHECK-NO-ISEL-NEXT:    fcmpu 0, 3, 4
1172; CHECK-NO-ISEL-NEXT:    bc 12, 2, .LBB35_3
1173; CHECK-NO-ISEL-NEXT:  # %bb.1: # %entry
1174; CHECK-NO-ISEL-NEXT:    fcmpu 0, 1, 2
1175; CHECK-NO-ISEL-NEXT:    bc 4, 2, .LBB35_3
1176; CHECK-NO-ISEL-NEXT:  # %bb.2: # %entry
1177; CHECK-NO-ISEL-NEXT:    fmr 5, 6
1178; CHECK-NO-ISEL-NEXT:  .LBB35_3: # %entry
1179; CHECK-NO-ISEL-NEXT:    fmr 1, 5
1180; CHECK-NO-ISEL-NEXT:    blr
1181entry:
1182  %cmp1 = fcmp oeq double %c3, %c4
1183  %cmp3tmp = fcmp oeq double %c1, %c2
1184  %cmp3 = icmp sge i1 %cmp3tmp, %cmp1
1185  %cond = select i1 %cmp3, double %a1, double %a2
1186  ret double %cond
1187
1188}
1189
1190define double @testdoubleuge(double %c1, double %c2, double %c3, double %c4, double %a1, double %a2) #0 {
1191; CHECK-LABEL: testdoubleuge:
1192; CHECK:       # %bb.0: # %entry
1193; CHECK-NEXT:    fcmpu 0, 3, 4
1194; CHECK-NEXT:    bc 4, 2, .LBB36_3
1195; CHECK-NEXT:  # %bb.1: # %entry
1196; CHECK-NEXT:    fcmpu 0, 1, 2
1197; CHECK-NEXT:    bc 12, 2, .LBB36_3
1198; CHECK-NEXT:  # %bb.2: # %entry
1199; CHECK-NEXT:    fmr 5, 6
1200; CHECK-NEXT:  .LBB36_3: # %entry
1201; CHECK-NEXT:    fmr 1, 5
1202; CHECK-NEXT:    blr
1203;
1204; CHECK-NO-ISEL-LABEL: testdoubleuge:
1205; CHECK-NO-ISEL:       # %bb.0: # %entry
1206; CHECK-NO-ISEL-NEXT:    fcmpu 0, 3, 4
1207; CHECK-NO-ISEL-NEXT:    bc 4, 2, .LBB36_3
1208; CHECK-NO-ISEL-NEXT:  # %bb.1: # %entry
1209; CHECK-NO-ISEL-NEXT:    fcmpu 0, 1, 2
1210; CHECK-NO-ISEL-NEXT:    bc 12, 2, .LBB36_3
1211; CHECK-NO-ISEL-NEXT:  # %bb.2: # %entry
1212; CHECK-NO-ISEL-NEXT:    fmr 5, 6
1213; CHECK-NO-ISEL-NEXT:  .LBB36_3: # %entry
1214; CHECK-NO-ISEL-NEXT:    fmr 1, 5
1215; CHECK-NO-ISEL-NEXT:    blr
1216entry:
1217  %cmp1 = fcmp oeq double %c3, %c4
1218  %cmp3tmp = fcmp oeq double %c1, %c2
1219  %cmp3 = icmp uge i1 %cmp3tmp, %cmp1
1220  %cond = select i1 %cmp3, double %a1, double %a2
1221  ret double %cond
1222
1223}
1224
1225define double @testdoublesgt(double %c1, double %c2, double %c3, double %c4, double %a1, double %a2) #0 {
1226; CHECK-LABEL: testdoublesgt:
1227; CHECK:       # %bb.0: # %entry
1228; CHECK-NEXT:    fcmpu 0, 3, 4
1229; CHECK-NEXT:    bc 4, 2, .LBB37_2
1230; CHECK-NEXT:  # %bb.1: # %entry
1231; CHECK-NEXT:    fcmpu 0, 1, 2
1232; CHECK-NEXT:    bc 4, 2, .LBB37_3
1233; CHECK-NEXT:  .LBB37_2: # %entry
1234; CHECK-NEXT:    fmr 5, 6
1235; CHECK-NEXT:  .LBB37_3: # %entry
1236; CHECK-NEXT:    fmr 1, 5
1237; CHECK-NEXT:    blr
1238;
1239; CHECK-NO-ISEL-LABEL: testdoublesgt:
1240; CHECK-NO-ISEL:       # %bb.0: # %entry
1241; CHECK-NO-ISEL-NEXT:    fcmpu 0, 3, 4
1242; CHECK-NO-ISEL-NEXT:    bc 4, 2, .LBB37_3
1243; CHECK-NO-ISEL-NEXT:  # %bb.1: # %entry
1244; CHECK-NO-ISEL-NEXT:    fcmpu 0, 1, 2
1245; CHECK-NO-ISEL-NEXT:    bc 12, 2, .LBB37_3
1246; CHECK-NO-ISEL-NEXT:  # %bb.2: # %entry
1247; CHECK-NO-ISEL-NEXT:    fmr 1, 5
1248; CHECK-NO-ISEL-NEXT:    blr
1249; CHECK-NO-ISEL-NEXT:  .LBB37_3: # %entry
1250; CHECK-NO-ISEL-NEXT:    fmr 5, 6
1251; CHECK-NO-ISEL-NEXT:    fmr 1, 5
1252; CHECK-NO-ISEL-NEXT:    blr
1253entry:
1254  %cmp1 = fcmp oeq double %c3, %c4
1255  %cmp3tmp = fcmp oeq double %c1, %c2
1256  %cmp3 = icmp sgt i1 %cmp3tmp, %cmp1
1257  %cond = select i1 %cmp3, double %a1, double %a2
1258  ret double %cond
1259
1260}
1261
1262define double @testdoubleugt(double %c1, double %c2, double %c3, double %c4, double %a1, double %a2) #0 {
1263; CHECK-LABEL: testdoubleugt:
1264; CHECK:       # %bb.0: # %entry
1265; CHECK-NEXT:    fcmpu 0, 3, 4
1266; CHECK-NEXT:    bc 12, 2, .LBB38_2
1267; CHECK-NEXT:  # %bb.1: # %entry
1268; CHECK-NEXT:    fcmpu 0, 1, 2
1269; CHECK-NEXT:    bc 12, 2, .LBB38_3
1270; CHECK-NEXT:  .LBB38_2: # %entry
1271; CHECK-NEXT:    fmr 5, 6
1272; CHECK-NEXT:  .LBB38_3: # %entry
1273; CHECK-NEXT:    fmr 1, 5
1274; CHECK-NEXT:    blr
1275;
1276; CHECK-NO-ISEL-LABEL: testdoubleugt:
1277; CHECK-NO-ISEL:       # %bb.0: # %entry
1278; CHECK-NO-ISEL-NEXT:    fcmpu 0, 3, 4
1279; CHECK-NO-ISEL-NEXT:    bc 12, 2, .LBB38_3
1280; CHECK-NO-ISEL-NEXT:  # %bb.1: # %entry
1281; CHECK-NO-ISEL-NEXT:    fcmpu 0, 1, 2
1282; CHECK-NO-ISEL-NEXT:    bc 4, 2, .LBB38_3
1283; CHECK-NO-ISEL-NEXT:  # %bb.2: # %entry
1284; CHECK-NO-ISEL-NEXT:    fmr 1, 5
1285; CHECK-NO-ISEL-NEXT:    blr
1286; CHECK-NO-ISEL-NEXT:  .LBB38_3: # %entry
1287; CHECK-NO-ISEL-NEXT:    fmr 5, 6
1288; CHECK-NO-ISEL-NEXT:    fmr 1, 5
1289; CHECK-NO-ISEL-NEXT:    blr
1290entry:
1291  %cmp1 = fcmp oeq double %c3, %c4
1292  %cmp3tmp = fcmp oeq double %c1, %c2
1293  %cmp3 = icmp ugt i1 %cmp3tmp, %cmp1
1294  %cond = select i1 %cmp3, double %a1, double %a2
1295  ret double %cond
1296
1297}
1298
1299define double @testdoublene(double %c1, double %c2, double %c3, double %c4, double %a1, double %a2) #0 {
1300; CHECK-LABEL: testdoublene:
1301; CHECK:       # %bb.0: # %entry
1302; CHECK-NEXT:    fcmpu 0, 3, 4
1303; CHECK-NEXT:    fcmpu 1, 1, 2
1304; CHECK-NEXT:    crxor 20, 6, 2
1305; CHECK-NEXT:    bc 12, 20, .LBB39_2
1306; CHECK-NEXT:  # %bb.1: # %entry
1307; CHECK-NEXT:    fmr 5, 6
1308; CHECK-NEXT:  .LBB39_2: # %entry
1309; CHECK-NEXT:    fmr 1, 5
1310; CHECK-NEXT:    blr
1311;
1312; CHECK-NO-ISEL-LABEL: testdoublene:
1313; CHECK-NO-ISEL:       # %bb.0: # %entry
1314; CHECK-NO-ISEL-NEXT:    fcmpu 0, 3, 4
1315; CHECK-NO-ISEL-NEXT:    fcmpu 1, 1, 2
1316; CHECK-NO-ISEL-NEXT:    crxor 20, 6, 2
1317; CHECK-NO-ISEL-NEXT:    bc 12, 20, .LBB39_2
1318; CHECK-NO-ISEL-NEXT:  # %bb.1: # %entry
1319; CHECK-NO-ISEL-NEXT:    fmr 5, 6
1320; CHECK-NO-ISEL-NEXT:  .LBB39_2: # %entry
1321; CHECK-NO-ISEL-NEXT:    fmr 1, 5
1322; CHECK-NO-ISEL-NEXT:    blr
1323entry:
1324  %cmp1 = fcmp oeq double %c3, %c4
1325  %cmp3tmp = fcmp oeq double %c1, %c2
1326  %cmp3 = icmp ne i1 %cmp3tmp, %cmp1
1327  %cond = select i1 %cmp3, double %a1, double %a2
1328  ret double %cond
1329
1330}
1331
1332define <4 x float> @testv4floatslt(float %c1, float %c2, float %c3, float %c4, <4 x float> %a1, <4 x float> %a2) #0 {
1333; CHECK-LABEL: testv4floatslt:
1334; CHECK:       # %bb.0: # %entry
1335; CHECK-NEXT:    fcmpu 0, 3, 4
1336; CHECK-NEXT:    bc 12, 2, .LBB40_2
1337; CHECK-NEXT:  # %bb.1: # %entry
1338; CHECK-NEXT:    fcmpu 0, 1, 2
1339; CHECK-NEXT:    bclr 12, 2, 0
1340; CHECK-NEXT:  .LBB40_2: # %select.false
1341; CHECK-NEXT:    vmr 2, 3
1342; CHECK-NEXT:    blr
1343;
1344; CHECK-NO-ISEL-LABEL: testv4floatslt:
1345; CHECK-NO-ISEL:       # %bb.0: # %entry
1346; CHECK-NO-ISEL-NEXT:    fcmpu 0, 3, 4
1347; CHECK-NO-ISEL-NEXT:    bc 12, 2, .LBB40_2
1348; CHECK-NO-ISEL-NEXT:  # %bb.1: # %entry
1349; CHECK-NO-ISEL-NEXT:    fcmpu 0, 1, 2
1350; CHECK-NO-ISEL-NEXT:    bclr 12, 2, 0
1351; CHECK-NO-ISEL-NEXT:  .LBB40_2: # %select.false
1352; CHECK-NO-ISEL-NEXT:    vmr 2, 3
1353; CHECK-NO-ISEL-NEXT:    blr
1354entry:
1355  %cmp1 = fcmp oeq float %c3, %c4
1356  %cmp3tmp = fcmp oeq float %c1, %c2
1357  %cmp3 = icmp slt i1 %cmp3tmp, %cmp1
1358  %cond = select i1 %cmp3, <4 x float> %a1, <4 x float> %a2
1359  ret <4 x float> %cond
1360
1361}
1362
1363define <4 x float> @testv4floatult(float %c1, float %c2, float %c3, float %c4, <4 x float> %a1, <4 x float> %a2) #0 {
1364; CHECK-LABEL: testv4floatult:
1365; CHECK:       # %bb.0: # %entry
1366; CHECK-NEXT:    fcmpu 0, 3, 4
1367; CHECK-NEXT:    bc 4, 2, .LBB41_2
1368; CHECK-NEXT:  # %bb.1: # %entry
1369; CHECK-NEXT:    fcmpu 0, 1, 2
1370; CHECK-NEXT:    bclr 4, 2, 0
1371; CHECK-NEXT:  .LBB41_2: # %select.false
1372; CHECK-NEXT:    vmr 2, 3
1373; CHECK-NEXT:    blr
1374;
1375; CHECK-NO-ISEL-LABEL: testv4floatult:
1376; CHECK-NO-ISEL:       # %bb.0: # %entry
1377; CHECK-NO-ISEL-NEXT:    fcmpu 0, 3, 4
1378; CHECK-NO-ISEL-NEXT:    bc 4, 2, .LBB41_2
1379; CHECK-NO-ISEL-NEXT:  # %bb.1: # %entry
1380; CHECK-NO-ISEL-NEXT:    fcmpu 0, 1, 2
1381; CHECK-NO-ISEL-NEXT:    bclr 4, 2, 0
1382; CHECK-NO-ISEL-NEXT:  .LBB41_2: # %select.false
1383; CHECK-NO-ISEL-NEXT:    vmr 2, 3
1384; CHECK-NO-ISEL-NEXT:    blr
1385entry:
1386  %cmp1 = fcmp oeq float %c3, %c4
1387  %cmp3tmp = fcmp oeq float %c1, %c2
1388  %cmp3 = icmp ult i1 %cmp3tmp, %cmp1
1389  %cond = select i1 %cmp3, <4 x float> %a1, <4 x float> %a2
1390  ret <4 x float> %cond
1391
1392}
1393
1394define <4 x float> @testv4floatsle(float %c1, float %c2, float %c3, float %c4, <4 x float> %a1, <4 x float> %a2) #0 {
1395; CHECK-LABEL: testv4floatsle:
1396; CHECK:       # %bb.0: # %entry
1397; CHECK-NEXT:    fcmpu 0, 3, 4
1398; CHECK-NEXT:    bclr 4, 2, 0
1399; CHECK-NEXT:  # %bb.1: # %entry
1400; CHECK-NEXT:    fcmpu 0, 1, 2
1401; CHECK-NEXT:    bclr 12, 2, 0
1402; CHECK-NEXT:  # %bb.2: # %select.false
1403; CHECK-NEXT:    vmr 2, 3
1404; CHECK-NEXT:    blr
1405;
1406; CHECK-NO-ISEL-LABEL: testv4floatsle:
1407; CHECK-NO-ISEL:       # %bb.0: # %entry
1408; CHECK-NO-ISEL-NEXT:    fcmpu 0, 3, 4
1409; CHECK-NO-ISEL-NEXT:    bclr 4, 2, 0
1410; CHECK-NO-ISEL-NEXT:  # %bb.1: # %entry
1411; CHECK-NO-ISEL-NEXT:    fcmpu 0, 1, 2
1412; CHECK-NO-ISEL-NEXT:    bclr 12, 2, 0
1413; CHECK-NO-ISEL-NEXT:  # %bb.2: # %select.false
1414; CHECK-NO-ISEL-NEXT:    vmr 2, 3
1415; CHECK-NO-ISEL-NEXT:    blr
1416entry:
1417  %cmp1 = fcmp oeq float %c3, %c4
1418  %cmp3tmp = fcmp oeq float %c1, %c2
1419  %cmp3 = icmp sle i1 %cmp3tmp, %cmp1
1420  %cond = select i1 %cmp3, <4 x float> %a1, <4 x float> %a2
1421  ret <4 x float> %cond
1422
1423}
1424
1425define <4 x float> @testv4floatule(float %c1, float %c2, float %c3, float %c4, <4 x float> %a1, <4 x float> %a2) #0 {
1426; CHECK-LABEL: testv4floatule:
1427; CHECK:       # %bb.0: # %entry
1428; CHECK-NEXT:    fcmpu 0, 3, 4
1429; CHECK-NEXT:    bclr 12, 2, 0
1430; CHECK-NEXT:  # %bb.1: # %entry
1431; CHECK-NEXT:    fcmpu 0, 1, 2
1432; CHECK-NEXT:    bclr 4, 2, 0
1433; CHECK-NEXT:  # %bb.2: # %select.false
1434; CHECK-NEXT:    vmr 2, 3
1435; CHECK-NEXT:    blr
1436;
1437; CHECK-NO-ISEL-LABEL: testv4floatule:
1438; CHECK-NO-ISEL:       # %bb.0: # %entry
1439; CHECK-NO-ISEL-NEXT:    fcmpu 0, 3, 4
1440; CHECK-NO-ISEL-NEXT:    bclr 12, 2, 0
1441; CHECK-NO-ISEL-NEXT:  # %bb.1: # %entry
1442; CHECK-NO-ISEL-NEXT:    fcmpu 0, 1, 2
1443; CHECK-NO-ISEL-NEXT:    bclr 4, 2, 0
1444; CHECK-NO-ISEL-NEXT:  # %bb.2: # %select.false
1445; CHECK-NO-ISEL-NEXT:    vmr 2, 3
1446; CHECK-NO-ISEL-NEXT:    blr
1447entry:
1448  %cmp1 = fcmp oeq float %c3, %c4
1449  %cmp3tmp = fcmp oeq float %c1, %c2
1450  %cmp3 = icmp ule i1 %cmp3tmp, %cmp1
1451  %cond = select i1 %cmp3, <4 x float> %a1, <4 x float> %a2
1452  ret <4 x float> %cond
1453
1454}
1455
1456define <4 x float> @testv4floateq(float %c1, float %c2, float %c3, float %c4, <4 x float> %a1, <4 x float> %a2) #0 {
1457; CHECK-LABEL: testv4floateq:
1458; CHECK:       # %bb.0: # %entry
1459; CHECK-NEXT:    fcmpu 0, 3, 4
1460; CHECK-NEXT:    fcmpu 1, 1, 2
1461; CHECK-NEXT:    creqv 20, 6, 2
1462; CHECK-NEXT:    bclr 12, 20, 0
1463; CHECK-NEXT:  # %bb.1: # %select.false
1464; CHECK-NEXT:    vmr 2, 3
1465; CHECK-NEXT:    blr
1466;
1467; CHECK-NO-ISEL-LABEL: testv4floateq:
1468; CHECK-NO-ISEL:       # %bb.0: # %entry
1469; CHECK-NO-ISEL-NEXT:    fcmpu 0, 3, 4
1470; CHECK-NO-ISEL-NEXT:    fcmpu 1, 1, 2
1471; CHECK-NO-ISEL-NEXT:    creqv 20, 6, 2
1472; CHECK-NO-ISEL-NEXT:    bclr 12, 20, 0
1473; CHECK-NO-ISEL-NEXT:  # %bb.1: # %select.false
1474; CHECK-NO-ISEL-NEXT:    vmr 2, 3
1475; CHECK-NO-ISEL-NEXT:    blr
1476entry:
1477  %cmp1 = fcmp oeq float %c3, %c4
1478  %cmp3tmp = fcmp oeq float %c1, %c2
1479  %cmp3 = icmp eq i1 %cmp3tmp, %cmp1
1480  %cond = select i1 %cmp3, <4 x float> %a1, <4 x float> %a2
1481  ret <4 x float> %cond
1482
1483}
1484
1485define <4 x float> @testv4floatsge(float %c1, float %c2, float %c3, float %c4, <4 x float> %a1, <4 x float> %a2) #0 {
1486; CHECK-LABEL: testv4floatsge:
1487; CHECK:       # %bb.0: # %entry
1488; CHECK-NEXT:    fcmpu 0, 3, 4
1489; CHECK-NEXT:    bclr 12, 2, 0
1490; CHECK-NEXT:  # %bb.1: # %entry
1491; CHECK-NEXT:    fcmpu 0, 1, 2
1492; CHECK-NEXT:    bclr 4, 2, 0
1493; CHECK-NEXT:  # %bb.2: # %select.false
1494; CHECK-NEXT:    vmr 2, 3
1495; CHECK-NEXT:    blr
1496;
1497; CHECK-NO-ISEL-LABEL: testv4floatsge:
1498; CHECK-NO-ISEL:       # %bb.0: # %entry
1499; CHECK-NO-ISEL-NEXT:    fcmpu 0, 3, 4
1500; CHECK-NO-ISEL-NEXT:    bclr 12, 2, 0
1501; CHECK-NO-ISEL-NEXT:  # %bb.1: # %entry
1502; CHECK-NO-ISEL-NEXT:    fcmpu 0, 1, 2
1503; CHECK-NO-ISEL-NEXT:    bclr 4, 2, 0
1504; CHECK-NO-ISEL-NEXT:  # %bb.2: # %select.false
1505; CHECK-NO-ISEL-NEXT:    vmr 2, 3
1506; CHECK-NO-ISEL-NEXT:    blr
1507entry:
1508  %cmp1 = fcmp oeq float %c3, %c4
1509  %cmp3tmp = fcmp oeq float %c1, %c2
1510  %cmp3 = icmp sge i1 %cmp3tmp, %cmp1
1511  %cond = select i1 %cmp3, <4 x float> %a1, <4 x float> %a2
1512  ret <4 x float> %cond
1513
1514}
1515
1516define <4 x float> @testv4floatuge(float %c1, float %c2, float %c3, float %c4, <4 x float> %a1, <4 x float> %a2) #0 {
1517; CHECK-LABEL: testv4floatuge:
1518; CHECK:       # %bb.0: # %entry
1519; CHECK-NEXT:    fcmpu 0, 3, 4
1520; CHECK-NEXT:    bclr 4, 2, 0
1521; CHECK-NEXT:  # %bb.1: # %entry
1522; CHECK-NEXT:    fcmpu 0, 1, 2
1523; CHECK-NEXT:    bclr 12, 2, 0
1524; CHECK-NEXT:  # %bb.2: # %select.false
1525; CHECK-NEXT:    vmr 2, 3
1526; CHECK-NEXT:    blr
1527;
1528; CHECK-NO-ISEL-LABEL: testv4floatuge:
1529; CHECK-NO-ISEL:       # %bb.0: # %entry
1530; CHECK-NO-ISEL-NEXT:    fcmpu 0, 3, 4
1531; CHECK-NO-ISEL-NEXT:    bclr 4, 2, 0
1532; CHECK-NO-ISEL-NEXT:  # %bb.1: # %entry
1533; CHECK-NO-ISEL-NEXT:    fcmpu 0, 1, 2
1534; CHECK-NO-ISEL-NEXT:    bclr 12, 2, 0
1535; CHECK-NO-ISEL-NEXT:  # %bb.2: # %select.false
1536; CHECK-NO-ISEL-NEXT:    vmr 2, 3
1537; CHECK-NO-ISEL-NEXT:    blr
1538entry:
1539  %cmp1 = fcmp oeq float %c3, %c4
1540  %cmp3tmp = fcmp oeq float %c1, %c2
1541  %cmp3 = icmp uge i1 %cmp3tmp, %cmp1
1542  %cond = select i1 %cmp3, <4 x float> %a1, <4 x float> %a2
1543  ret <4 x float> %cond
1544
1545}
1546
1547define <4 x float> @testv4floatsgt(float %c1, float %c2, float %c3, float %c4, <4 x float> %a1, <4 x float> %a2) #0 {
1548; CHECK-LABEL: testv4floatsgt:
1549; CHECK:       # %bb.0: # %entry
1550; CHECK-NEXT:    fcmpu 0, 3, 4
1551; CHECK-NEXT:    bc 4, 2, .LBB47_2
1552; CHECK-NEXT:  # %bb.1: # %entry
1553; CHECK-NEXT:    fcmpu 0, 1, 2
1554; CHECK-NEXT:    bclr 4, 2, 0
1555; CHECK-NEXT:  .LBB47_2: # %select.false
1556; CHECK-NEXT:    vmr 2, 3
1557; CHECK-NEXT:    blr
1558;
1559; CHECK-NO-ISEL-LABEL: testv4floatsgt:
1560; CHECK-NO-ISEL:       # %bb.0: # %entry
1561; CHECK-NO-ISEL-NEXT:    fcmpu 0, 3, 4
1562; CHECK-NO-ISEL-NEXT:    bc 4, 2, .LBB47_2
1563; CHECK-NO-ISEL-NEXT:  # %bb.1: # %entry
1564; CHECK-NO-ISEL-NEXT:    fcmpu 0, 1, 2
1565; CHECK-NO-ISEL-NEXT:    bclr 4, 2, 0
1566; CHECK-NO-ISEL-NEXT:  .LBB47_2: # %select.false
1567; CHECK-NO-ISEL-NEXT:    vmr 2, 3
1568; CHECK-NO-ISEL-NEXT:    blr
1569entry:
1570  %cmp1 = fcmp oeq float %c3, %c4
1571  %cmp3tmp = fcmp oeq float %c1, %c2
1572  %cmp3 = icmp sgt i1 %cmp3tmp, %cmp1
1573  %cond = select i1 %cmp3, <4 x float> %a1, <4 x float> %a2
1574  ret <4 x float> %cond
1575
1576}
1577
1578define <4 x float> @testv4floatugt(float %c1, float %c2, float %c3, float %c4, <4 x float> %a1, <4 x float> %a2) #0 {
1579; CHECK-LABEL: testv4floatugt:
1580; CHECK:       # %bb.0: # %entry
1581; CHECK-NEXT:    fcmpu 0, 3, 4
1582; CHECK-NEXT:    bc 12, 2, .LBB48_2
1583; CHECK-NEXT:  # %bb.1: # %entry
1584; CHECK-NEXT:    fcmpu 0, 1, 2
1585; CHECK-NEXT:    bclr 12, 2, 0
1586; CHECK-NEXT:  .LBB48_2: # %select.false
1587; CHECK-NEXT:    vmr 2, 3
1588; CHECK-NEXT:    blr
1589;
1590; CHECK-NO-ISEL-LABEL: testv4floatugt:
1591; CHECK-NO-ISEL:       # %bb.0: # %entry
1592; CHECK-NO-ISEL-NEXT:    fcmpu 0, 3, 4
1593; CHECK-NO-ISEL-NEXT:    bc 12, 2, .LBB48_2
1594; CHECK-NO-ISEL-NEXT:  # %bb.1: # %entry
1595; CHECK-NO-ISEL-NEXT:    fcmpu 0, 1, 2
1596; CHECK-NO-ISEL-NEXT:    bclr 12, 2, 0
1597; CHECK-NO-ISEL-NEXT:  .LBB48_2: # %select.false
1598; CHECK-NO-ISEL-NEXT:    vmr 2, 3
1599; CHECK-NO-ISEL-NEXT:    blr
1600entry:
1601  %cmp1 = fcmp oeq float %c3, %c4
1602  %cmp3tmp = fcmp oeq float %c1, %c2
1603  %cmp3 = icmp ugt i1 %cmp3tmp, %cmp1
1604  %cond = select i1 %cmp3, <4 x float> %a1, <4 x float> %a2
1605  ret <4 x float> %cond
1606
1607}
1608
1609define <4 x float> @testv4floatne(float %c1, float %c2, float %c3, float %c4, <4 x float> %a1, <4 x float> %a2) #0 {
1610; CHECK-LABEL: testv4floatne:
1611; CHECK:       # %bb.0: # %entry
1612; CHECK-NEXT:    fcmpu 0, 3, 4
1613; CHECK-NEXT:    fcmpu 1, 1, 2
1614; CHECK-NEXT:    crxor 20, 6, 2
1615; CHECK-NEXT:    bclr 12, 20, 0
1616; CHECK-NEXT:  # %bb.1: # %select.false
1617; CHECK-NEXT:    vmr 2, 3
1618; CHECK-NEXT:    blr
1619;
1620; CHECK-NO-ISEL-LABEL: testv4floatne:
1621; CHECK-NO-ISEL:       # %bb.0: # %entry
1622; CHECK-NO-ISEL-NEXT:    fcmpu 0, 3, 4
1623; CHECK-NO-ISEL-NEXT:    fcmpu 1, 1, 2
1624; CHECK-NO-ISEL-NEXT:    crxor 20, 6, 2
1625; CHECK-NO-ISEL-NEXT:    bclr 12, 20, 0
1626; CHECK-NO-ISEL-NEXT:  # %bb.1: # %select.false
1627; CHECK-NO-ISEL-NEXT:    vmr 2, 3
1628; CHECK-NO-ISEL-NEXT:    blr
1629entry:
1630  %cmp1 = fcmp oeq float %c3, %c4
1631  %cmp3tmp = fcmp oeq float %c1, %c2
1632  %cmp3 = icmp ne i1 %cmp3tmp, %cmp1
1633  %cond = select i1 %cmp3, <4 x float> %a1, <4 x float> %a2
1634  ret <4 x float> %cond
1635
1636}
1637
1638define ppc_fp128 @testppc_fp128eq(ppc_fp128 %c1, ppc_fp128 %c2, ppc_fp128 %c3, ppc_fp128 %c4, ppc_fp128 %a1, ppc_fp128 %a2) #0 {
1639; CHECK-LABEL: testppc_fp128eq:
1640; CHECK:       # %bb.0: # %entry
1641; CHECK-NEXT:    fcmpu 0, 6, 8
1642; CHECK-NEXT:    fcmpu 1, 5, 7
1643; CHECK-NEXT:    crand 20, 6, 2
1644; CHECK-NEXT:    fcmpu 0, 2, 4
1645; CHECK-NEXT:    fcmpu 1, 1, 3
1646; CHECK-NEXT:    crand 21, 6, 2
1647; CHECK-NEXT:    crxor 20, 21, 20
1648; CHECK-NEXT:    bc 12, 20, .LBB50_2
1649; CHECK-NEXT:  # %bb.1: # %entry
1650; CHECK-NEXT:    fmr 11, 9
1651; CHECK-NEXT:  .LBB50_2: # %entry
1652; CHECK-NEXT:    bc 12, 20, .LBB50_4
1653; CHECK-NEXT:  # %bb.3: # %entry
1654; CHECK-NEXT:    fmr 12, 10
1655; CHECK-NEXT:  .LBB50_4: # %entry
1656; CHECK-NEXT:    fmr 1, 11
1657; CHECK-NEXT:    fmr 2, 12
1658; CHECK-NEXT:    blr
1659;
1660; CHECK-NO-ISEL-LABEL: testppc_fp128eq:
1661; CHECK-NO-ISEL:       # %bb.0: # %entry
1662; CHECK-NO-ISEL-NEXT:    fcmpu 0, 6, 8
1663; CHECK-NO-ISEL-NEXT:    fcmpu 1, 5, 7
1664; CHECK-NO-ISEL-NEXT:    crand 20, 6, 2
1665; CHECK-NO-ISEL-NEXT:    fcmpu 0, 2, 4
1666; CHECK-NO-ISEL-NEXT:    fcmpu 1, 1, 3
1667; CHECK-NO-ISEL-NEXT:    crand 21, 6, 2
1668; CHECK-NO-ISEL-NEXT:    crxor 20, 21, 20
1669; CHECK-NO-ISEL-NEXT:    bc 12, 20, .LBB50_2
1670; CHECK-NO-ISEL-NEXT:  # %bb.1: # %entry
1671; CHECK-NO-ISEL-NEXT:    fmr 11, 9
1672; CHECK-NO-ISEL-NEXT:  .LBB50_2: # %entry
1673; CHECK-NO-ISEL-NEXT:    bc 12, 20, .LBB50_4
1674; CHECK-NO-ISEL-NEXT:  # %bb.3: # %entry
1675; CHECK-NO-ISEL-NEXT:    fmr 12, 10
1676; CHECK-NO-ISEL-NEXT:  .LBB50_4: # %entry
1677; CHECK-NO-ISEL-NEXT:    fmr 1, 11
1678; CHECK-NO-ISEL-NEXT:    fmr 2, 12
1679; CHECK-NO-ISEL-NEXT:    blr
1680entry:
1681  %cmp1 = fcmp oeq ppc_fp128 %c3, %c4
1682  %cmp3tmp = fcmp oeq ppc_fp128 %c1, %c2
1683  %cmp3 = icmp eq i1 %cmp3tmp, %cmp1
1684  %cond = select i1 %cmp3, ppc_fp128 %a1, ppc_fp128 %a2
1685  ret ppc_fp128 %cond
1686
1687; FIXME: Because of the way that the late SELECT_* pseudo-instruction expansion
1688; works, we end up with two blocks with the same predicate. These could be
1689; combined.
1690
1691}
1692
1693define <2 x double> @testv2doubleslt(float %c1, float %c2, float %c3, float %c4, <2 x double> %a1, <2 x double> %a2) #0 {
1694; CHECK-LABEL: testv2doubleslt:
1695; CHECK:       # %bb.0: # %entry
1696; CHECK-NEXT:    fcmpu 0, 3, 4
1697; CHECK-NEXT:    bc 12, 2, .LBB51_2
1698; CHECK-NEXT:  # %bb.1: # %entry
1699; CHECK-NEXT:    fcmpu 0, 1, 2
1700; CHECK-NEXT:    bclr 12, 2, 0
1701; CHECK-NEXT:  .LBB51_2: # %select.false
1702; CHECK-NEXT:    vmr 2, 3
1703; CHECK-NEXT:    blr
1704;
1705; CHECK-NO-ISEL-LABEL: testv2doubleslt:
1706; CHECK-NO-ISEL:       # %bb.0: # %entry
1707; CHECK-NO-ISEL-NEXT:    fcmpu 0, 3, 4
1708; CHECK-NO-ISEL-NEXT:    bc 12, 2, .LBB51_2
1709; CHECK-NO-ISEL-NEXT:  # %bb.1: # %entry
1710; CHECK-NO-ISEL-NEXT:    fcmpu 0, 1, 2
1711; CHECK-NO-ISEL-NEXT:    bclr 12, 2, 0
1712; CHECK-NO-ISEL-NEXT:  .LBB51_2: # %select.false
1713; CHECK-NO-ISEL-NEXT:    vmr 2, 3
1714; CHECK-NO-ISEL-NEXT:    blr
1715entry:
1716  %cmp1 = fcmp oeq float %c3, %c4
1717  %cmp3tmp = fcmp oeq float %c1, %c2
1718  %cmp3 = icmp slt i1 %cmp3tmp, %cmp1
1719  %cond = select i1 %cmp3, <2 x double> %a1, <2 x double> %a2
1720  ret <2 x double> %cond
1721
1722}
1723
1724define <2 x double> @testv2doubleult(float %c1, float %c2, float %c3, float %c4, <2 x double> %a1, <2 x double> %a2) #0 {
1725; CHECK-LABEL: testv2doubleult:
1726; CHECK:       # %bb.0: # %entry
1727; CHECK-NEXT:    fcmpu 0, 3, 4
1728; CHECK-NEXT:    bc 4, 2, .LBB52_2
1729; CHECK-NEXT:  # %bb.1: # %entry
1730; CHECK-NEXT:    fcmpu 0, 1, 2
1731; CHECK-NEXT:    bclr 4, 2, 0
1732; CHECK-NEXT:  .LBB52_2: # %select.false
1733; CHECK-NEXT:    vmr 2, 3
1734; CHECK-NEXT:    blr
1735;
1736; CHECK-NO-ISEL-LABEL: testv2doubleult:
1737; CHECK-NO-ISEL:       # %bb.0: # %entry
1738; CHECK-NO-ISEL-NEXT:    fcmpu 0, 3, 4
1739; CHECK-NO-ISEL-NEXT:    bc 4, 2, .LBB52_2
1740; CHECK-NO-ISEL-NEXT:  # %bb.1: # %entry
1741; CHECK-NO-ISEL-NEXT:    fcmpu 0, 1, 2
1742; CHECK-NO-ISEL-NEXT:    bclr 4, 2, 0
1743; CHECK-NO-ISEL-NEXT:  .LBB52_2: # %select.false
1744; CHECK-NO-ISEL-NEXT:    vmr 2, 3
1745; CHECK-NO-ISEL-NEXT:    blr
1746entry:
1747  %cmp1 = fcmp oeq float %c3, %c4
1748  %cmp3tmp = fcmp oeq float %c1, %c2
1749  %cmp3 = icmp ult i1 %cmp3tmp, %cmp1
1750  %cond = select i1 %cmp3, <2 x double> %a1, <2 x double> %a2
1751  ret <2 x double> %cond
1752
1753}
1754
1755define <2 x double> @testv2doublesle(float %c1, float %c2, float %c3, float %c4, <2 x double> %a1, <2 x double> %a2) #0 {
1756; CHECK-LABEL: testv2doublesle:
1757; CHECK:       # %bb.0: # %entry
1758; CHECK-NEXT:    fcmpu 0, 3, 4
1759; CHECK-NEXT:    bclr 4, 2, 0
1760; CHECK-NEXT:  # %bb.1: # %entry
1761; CHECK-NEXT:    fcmpu 0, 1, 2
1762; CHECK-NEXT:    bclr 12, 2, 0
1763; CHECK-NEXT:  # %bb.2: # %select.false
1764; CHECK-NEXT:    vmr 2, 3
1765; CHECK-NEXT:    blr
1766;
1767; CHECK-NO-ISEL-LABEL: testv2doublesle:
1768; CHECK-NO-ISEL:       # %bb.0: # %entry
1769; CHECK-NO-ISEL-NEXT:    fcmpu 0, 3, 4
1770; CHECK-NO-ISEL-NEXT:    bclr 4, 2, 0
1771; CHECK-NO-ISEL-NEXT:  # %bb.1: # %entry
1772; CHECK-NO-ISEL-NEXT:    fcmpu 0, 1, 2
1773; CHECK-NO-ISEL-NEXT:    bclr 12, 2, 0
1774; CHECK-NO-ISEL-NEXT:  # %bb.2: # %select.false
1775; CHECK-NO-ISEL-NEXT:    vmr 2, 3
1776; CHECK-NO-ISEL-NEXT:    blr
1777entry:
1778  %cmp1 = fcmp oeq float %c3, %c4
1779  %cmp3tmp = fcmp oeq float %c1, %c2
1780  %cmp3 = icmp sle i1 %cmp3tmp, %cmp1
1781  %cond = select i1 %cmp3, <2 x double> %a1, <2 x double> %a2
1782  ret <2 x double> %cond
1783
1784}
1785
1786define <2 x double> @testv2doubleule(float %c1, float %c2, float %c3, float %c4, <2 x double> %a1, <2 x double> %a2) #0 {
1787; CHECK-LABEL: testv2doubleule:
1788; CHECK:       # %bb.0: # %entry
1789; CHECK-NEXT:    fcmpu 0, 3, 4
1790; CHECK-NEXT:    bclr 12, 2, 0
1791; CHECK-NEXT:  # %bb.1: # %entry
1792; CHECK-NEXT:    fcmpu 0, 1, 2
1793; CHECK-NEXT:    bclr 4, 2, 0
1794; CHECK-NEXT:  # %bb.2: # %select.false
1795; CHECK-NEXT:    vmr 2, 3
1796; CHECK-NEXT:    blr
1797;
1798; CHECK-NO-ISEL-LABEL: testv2doubleule:
1799; CHECK-NO-ISEL:       # %bb.0: # %entry
1800; CHECK-NO-ISEL-NEXT:    fcmpu 0, 3, 4
1801; CHECK-NO-ISEL-NEXT:    bclr 12, 2, 0
1802; CHECK-NO-ISEL-NEXT:  # %bb.1: # %entry
1803; CHECK-NO-ISEL-NEXT:    fcmpu 0, 1, 2
1804; CHECK-NO-ISEL-NEXT:    bclr 4, 2, 0
1805; CHECK-NO-ISEL-NEXT:  # %bb.2: # %select.false
1806; CHECK-NO-ISEL-NEXT:    vmr 2, 3
1807; CHECK-NO-ISEL-NEXT:    blr
1808entry:
1809  %cmp1 = fcmp oeq float %c3, %c4
1810  %cmp3tmp = fcmp oeq float %c1, %c2
1811  %cmp3 = icmp ule i1 %cmp3tmp, %cmp1
1812  %cond = select i1 %cmp3, <2 x double> %a1, <2 x double> %a2
1813  ret <2 x double> %cond
1814
1815}
1816
1817define <2 x double> @testv2doubleeq(float %c1, float %c2, float %c3, float %c4, <2 x double> %a1, <2 x double> %a2) #0 {
1818; CHECK-LABEL: testv2doubleeq:
1819; CHECK:       # %bb.0: # %entry
1820; CHECK-NEXT:    fcmpu 0, 3, 4
1821; CHECK-NEXT:    fcmpu 1, 1, 2
1822; CHECK-NEXT:    creqv 20, 6, 2
1823; CHECK-NEXT:    bclr 12, 20, 0
1824; CHECK-NEXT:  # %bb.1: # %select.false
1825; CHECK-NEXT:    vmr 2, 3
1826; CHECK-NEXT:    blr
1827;
1828; CHECK-NO-ISEL-LABEL: testv2doubleeq:
1829; CHECK-NO-ISEL:       # %bb.0: # %entry
1830; CHECK-NO-ISEL-NEXT:    fcmpu 0, 3, 4
1831; CHECK-NO-ISEL-NEXT:    fcmpu 1, 1, 2
1832; CHECK-NO-ISEL-NEXT:    creqv 20, 6, 2
1833; CHECK-NO-ISEL-NEXT:    bclr 12, 20, 0
1834; CHECK-NO-ISEL-NEXT:  # %bb.1: # %select.false
1835; CHECK-NO-ISEL-NEXT:    vmr 2, 3
1836; CHECK-NO-ISEL-NEXT:    blr
1837entry:
1838  %cmp1 = fcmp oeq float %c3, %c4
1839  %cmp3tmp = fcmp oeq float %c1, %c2
1840  %cmp3 = icmp eq i1 %cmp3tmp, %cmp1
1841  %cond = select i1 %cmp3, <2 x double> %a1, <2 x double> %a2
1842  ret <2 x double> %cond
1843
1844}
1845
1846define <2 x double> @testv2doublesge(float %c1, float %c2, float %c3, float %c4, <2 x double> %a1, <2 x double> %a2) #0 {
1847; CHECK-LABEL: testv2doublesge:
1848; CHECK:       # %bb.0: # %entry
1849; CHECK-NEXT:    fcmpu 0, 3, 4
1850; CHECK-NEXT:    bclr 12, 2, 0
1851; CHECK-NEXT:  # %bb.1: # %entry
1852; CHECK-NEXT:    fcmpu 0, 1, 2
1853; CHECK-NEXT:    bclr 4, 2, 0
1854; CHECK-NEXT:  # %bb.2: # %select.false
1855; CHECK-NEXT:    vmr 2, 3
1856; CHECK-NEXT:    blr
1857;
1858; CHECK-NO-ISEL-LABEL: testv2doublesge:
1859; CHECK-NO-ISEL:       # %bb.0: # %entry
1860; CHECK-NO-ISEL-NEXT:    fcmpu 0, 3, 4
1861; CHECK-NO-ISEL-NEXT:    bclr 12, 2, 0
1862; CHECK-NO-ISEL-NEXT:  # %bb.1: # %entry
1863; CHECK-NO-ISEL-NEXT:    fcmpu 0, 1, 2
1864; CHECK-NO-ISEL-NEXT:    bclr 4, 2, 0
1865; CHECK-NO-ISEL-NEXT:  # %bb.2: # %select.false
1866; CHECK-NO-ISEL-NEXT:    vmr 2, 3
1867; CHECK-NO-ISEL-NEXT:    blr
1868entry:
1869  %cmp1 = fcmp oeq float %c3, %c4
1870  %cmp3tmp = fcmp oeq float %c1, %c2
1871  %cmp3 = icmp sge i1 %cmp3tmp, %cmp1
1872  %cond = select i1 %cmp3, <2 x double> %a1, <2 x double> %a2
1873  ret <2 x double> %cond
1874
1875}
1876
1877define <2 x double> @testv2doubleuge(float %c1, float %c2, float %c3, float %c4, <2 x double> %a1, <2 x double> %a2) #0 {
1878; CHECK-LABEL: testv2doubleuge:
1879; CHECK:       # %bb.0: # %entry
1880; CHECK-NEXT:    fcmpu 0, 3, 4
1881; CHECK-NEXT:    bclr 4, 2, 0
1882; CHECK-NEXT:  # %bb.1: # %entry
1883; CHECK-NEXT:    fcmpu 0, 1, 2
1884; CHECK-NEXT:    bclr 12, 2, 0
1885; CHECK-NEXT:  # %bb.2: # %select.false
1886; CHECK-NEXT:    vmr 2, 3
1887; CHECK-NEXT:    blr
1888;
1889; CHECK-NO-ISEL-LABEL: testv2doubleuge:
1890; CHECK-NO-ISEL:       # %bb.0: # %entry
1891; CHECK-NO-ISEL-NEXT:    fcmpu 0, 3, 4
1892; CHECK-NO-ISEL-NEXT:    bclr 4, 2, 0
1893; CHECK-NO-ISEL-NEXT:  # %bb.1: # %entry
1894; CHECK-NO-ISEL-NEXT:    fcmpu 0, 1, 2
1895; CHECK-NO-ISEL-NEXT:    bclr 12, 2, 0
1896; CHECK-NO-ISEL-NEXT:  # %bb.2: # %select.false
1897; CHECK-NO-ISEL-NEXT:    vmr 2, 3
1898; CHECK-NO-ISEL-NEXT:    blr
1899entry:
1900  %cmp1 = fcmp oeq float %c3, %c4
1901  %cmp3tmp = fcmp oeq float %c1, %c2
1902  %cmp3 = icmp uge i1 %cmp3tmp, %cmp1
1903  %cond = select i1 %cmp3, <2 x double> %a1, <2 x double> %a2
1904  ret <2 x double> %cond
1905
1906}
1907
1908define <2 x double> @testv2doublesgt(float %c1, float %c2, float %c3, float %c4, <2 x double> %a1, <2 x double> %a2) #0 {
1909; CHECK-LABEL: testv2doublesgt:
1910; CHECK:       # %bb.0: # %entry
1911; CHECK-NEXT:    fcmpu 0, 3, 4
1912; CHECK-NEXT:    bc 4, 2, .LBB58_2
1913; CHECK-NEXT:  # %bb.1: # %entry
1914; CHECK-NEXT:    fcmpu 0, 1, 2
1915; CHECK-NEXT:    bclr 4, 2, 0
1916; CHECK-NEXT:  .LBB58_2: # %select.false
1917; CHECK-NEXT:    vmr 2, 3
1918; CHECK-NEXT:    blr
1919;
1920; CHECK-NO-ISEL-LABEL: testv2doublesgt:
1921; CHECK-NO-ISEL:       # %bb.0: # %entry
1922; CHECK-NO-ISEL-NEXT:    fcmpu 0, 3, 4
1923; CHECK-NO-ISEL-NEXT:    bc 4, 2, .LBB58_2
1924; CHECK-NO-ISEL-NEXT:  # %bb.1: # %entry
1925; CHECK-NO-ISEL-NEXT:    fcmpu 0, 1, 2
1926; CHECK-NO-ISEL-NEXT:    bclr 4, 2, 0
1927; CHECK-NO-ISEL-NEXT:  .LBB58_2: # %select.false
1928; CHECK-NO-ISEL-NEXT:    vmr 2, 3
1929; CHECK-NO-ISEL-NEXT:    blr
1930entry:
1931  %cmp1 = fcmp oeq float %c3, %c4
1932  %cmp3tmp = fcmp oeq float %c1, %c2
1933  %cmp3 = icmp sgt i1 %cmp3tmp, %cmp1
1934  %cond = select i1 %cmp3, <2 x double> %a1, <2 x double> %a2
1935  ret <2 x double> %cond
1936
1937}
1938
1939define <2 x double> @testv2doubleugt(float %c1, float %c2, float %c3, float %c4, <2 x double> %a1, <2 x double> %a2) #0 {
1940; CHECK-LABEL: testv2doubleugt:
1941; CHECK:       # %bb.0: # %entry
1942; CHECK-NEXT:    fcmpu 0, 3, 4
1943; CHECK-NEXT:    bc 12, 2, .LBB59_2
1944; CHECK-NEXT:  # %bb.1: # %entry
1945; CHECK-NEXT:    fcmpu 0, 1, 2
1946; CHECK-NEXT:    bclr 12, 2, 0
1947; CHECK-NEXT:  .LBB59_2: # %select.false
1948; CHECK-NEXT:    vmr 2, 3
1949; CHECK-NEXT:    blr
1950;
1951; CHECK-NO-ISEL-LABEL: testv2doubleugt:
1952; CHECK-NO-ISEL:       # %bb.0: # %entry
1953; CHECK-NO-ISEL-NEXT:    fcmpu 0, 3, 4
1954; CHECK-NO-ISEL-NEXT:    bc 12, 2, .LBB59_2
1955; CHECK-NO-ISEL-NEXT:  # %bb.1: # %entry
1956; CHECK-NO-ISEL-NEXT:    fcmpu 0, 1, 2
1957; CHECK-NO-ISEL-NEXT:    bclr 12, 2, 0
1958; CHECK-NO-ISEL-NEXT:  .LBB59_2: # %select.false
1959; CHECK-NO-ISEL-NEXT:    vmr 2, 3
1960; CHECK-NO-ISEL-NEXT:    blr
1961entry:
1962  %cmp1 = fcmp oeq float %c3, %c4
1963  %cmp3tmp = fcmp oeq float %c1, %c2
1964  %cmp3 = icmp ugt i1 %cmp3tmp, %cmp1
1965  %cond = select i1 %cmp3, <2 x double> %a1, <2 x double> %a2
1966  ret <2 x double> %cond
1967
1968}
1969
1970define <2 x double> @testv2doublene(float %c1, float %c2, float %c3, float %c4, <2 x double> %a1, <2 x double> %a2) #0 {
1971; CHECK-LABEL: testv2doublene:
1972; CHECK:       # %bb.0: # %entry
1973; CHECK-NEXT:    fcmpu 0, 3, 4
1974; CHECK-NEXT:    fcmpu 1, 1, 2
1975; CHECK-NEXT:    crxor 20, 6, 2
1976; CHECK-NEXT:    bclr 12, 20, 0
1977; CHECK-NEXT:  # %bb.1: # %select.false
1978; CHECK-NEXT:    vmr 2, 3
1979; CHECK-NEXT:    blr
1980;
1981; CHECK-NO-ISEL-LABEL: testv2doublene:
1982; CHECK-NO-ISEL:       # %bb.0: # %entry
1983; CHECK-NO-ISEL-NEXT:    fcmpu 0, 3, 4
1984; CHECK-NO-ISEL-NEXT:    fcmpu 1, 1, 2
1985; CHECK-NO-ISEL-NEXT:    crxor 20, 6, 2
1986; CHECK-NO-ISEL-NEXT:    bclr 12, 20, 0
1987; CHECK-NO-ISEL-NEXT:  # %bb.1: # %select.false
1988; CHECK-NO-ISEL-NEXT:    vmr 2, 3
1989; CHECK-NO-ISEL-NEXT:    blr
1990entry:
1991  %cmp1 = fcmp oeq float %c3, %c4
1992  %cmp3tmp = fcmp oeq float %c1, %c2
1993  %cmp3 = icmp ne i1 %cmp3tmp, %cmp1
1994  %cond = select i1 %cmp3, <2 x double> %a1, <2 x double> %a2
1995  ret <2 x double> %cond
1996
1997}
1998
1999attributes #0 = { nounwind readnone "target-cpu"="pwr7" }
2000
2001