1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mcpu=pwr8 -mtriple=powerpc64-unknown-unknown %s -o - | FileCheck %s 3 4define i32 @xori64i32(i64 %a) { 5; CHECK-LABEL: xori64i32: 6; CHECK: # %bb.0: 7; CHECK-NEXT: sradi 3, 3, 63 8; CHECK-NEXT: xori 3, 3, 65535 9; CHECK-NEXT: xoris 3, 3, 32767 10; CHECK-NEXT: blr 11 %shr4 = ashr i64 %a, 63 12 %conv5 = trunc i64 %shr4 to i32 13 %xor = xor i32 %conv5, 2147483647 14 ret i32 %xor 15} 16 17define i64 @selecti64i64(i64 %a) { 18; CHECK-LABEL: selecti64i64: 19; CHECK: # %bb.0: 20; CHECK-NEXT: sradi 3, 3, 63 21; CHECK-NEXT: xori 3, 3, 65535 22; CHECK-NEXT: xoris 3, 3, 32767 23; CHECK-NEXT: blr 24 %c = icmp sgt i64 %a, -1 25 %s = select i1 %c, i64 2147483647, i64 -2147483648 26 ret i64 %s 27} 28 29define i32 @selecti64i32(i64 %a) { 30; CHECK-LABEL: selecti64i32: 31; CHECK: # %bb.0: 32; CHECK-NEXT: sradi 3, 3, 63 33; CHECK-NEXT: xori 3, 3, 65535 34; CHECK-NEXT: xoris 3, 3, 32767 35; CHECK-NEXT: blr 36 %c = icmp sgt i64 %a, -1 37 %s = select i1 %c, i32 2147483647, i32 -2147483648 38 ret i32 %s 39} 40 41define i64 @selecti32i64(i32 %a) { 42; CHECK-LABEL: selecti32i64: 43; CHECK: # %bb.0: 44; CHECK-NEXT: srawi 3, 3, 31 45; CHECK-NEXT: xori 3, 3, 65535 46; CHECK-NEXT: xoris 3, 3, 32767 47; CHECK-NEXT: blr 48 %c = icmp sgt i32 %a, -1 49 %s = select i1 %c, i64 2147483647, i64 -2147483648 50 ret i64 %s 51} 52 53 54 55define i8 @xori32i8(i32 %a) { 56; CHECK-LABEL: xori32i8: 57; CHECK: # %bb.0: 58; CHECK-NEXT: srawi 3, 3, 31 59; CHECK-NEXT: xori 3, 3, 84 60; CHECK-NEXT: blr 61 %shr4 = ashr i32 %a, 31 62 %conv5 = trunc i32 %shr4 to i8 63 %xor = xor i8 %conv5, 84 64 ret i8 %xor 65} 66 67define i32 @selecti32i32(i32 %a) { 68; CHECK-LABEL: selecti32i32: 69; CHECK: # %bb.0: 70; CHECK-NEXT: srawi 3, 3, 31 71; CHECK-NEXT: xori 3, 3, 84 72; CHECK-NEXT: blr 73 %c = icmp sgt i32 %a, -1 74 %s = select i1 %c, i32 84, i32 -85 75 ret i32 %s 76} 77 78define i8 @selecti32i8(i32 %a) { 79; CHECK-LABEL: selecti32i8: 80; CHECK: # %bb.0: 81; CHECK-NEXT: srawi 3, 3, 31 82; CHECK-NEXT: xori 3, 3, 84 83; CHECK-NEXT: blr 84 %c = icmp sgt i32 %a, -1 85 %s = select i1 %c, i8 84, i8 -85 86 ret i8 %s 87} 88 89define i32 @selecti8i32(i8 %a) { 90; CHECK-LABEL: selecti8i32: 91; CHECK: # %bb.0: 92; CHECK-NEXT: extsb 3, 3 93; CHECK-NEXT: srawi 3, 3, 7 94; CHECK-NEXT: xori 3, 3, 84 95; CHECK-NEXT: blr 96 %c = icmp sgt i8 %a, -1 97 %s = select i1 %c, i32 84, i32 -85 98 ret i32 %s 99} 100 101define i32 @icmpasreq(i32 %input, i32 %a, i32 %b) { 102; CHECK-LABEL: icmpasreq: 103; CHECK: # %bb.0: 104; CHECK-NEXT: cmpwi 3, 0 105; CHECK-NEXT: isellt 3, 4, 5 106; CHECK-NEXT: blr 107 %sh = ashr i32 %input, 31 108 %c = icmp eq i32 %sh, -1 109 %s = select i1 %c, i32 %a, i32 %b 110 ret i32 %s 111} 112 113define i32 @icmpasrne(i32 %input, i32 %a, i32 %b) { 114; CHECK-LABEL: icmpasrne: 115; CHECK: # %bb.0: 116; CHECK-NEXT: cmpwi 3, -1 117; CHECK-NEXT: iselgt 3, 4, 5 118; CHECK-NEXT: blr 119 %sh = ashr i32 %input, 31 120 %c = icmp ne i32 %sh, -1 121 %s = select i1 %c, i32 %a, i32 %b 122 ret i32 %s 123} 124 125define i32 @oneusecmp(i32 %a, i32 %b, i32 %d) { 126; CHECK-LABEL: oneusecmp: 127; CHECK: # %bb.0: 128; CHECK-NEXT: cmpwi 3, 0 129; CHECK-NEXT: srawi 6, 3, 31 130; CHECK-NEXT: xori 6, 6, 127 131; CHECK-NEXT: isellt 3, 5, 4 132; CHECK-NEXT: add 3, 6, 3 133; CHECK-NEXT: blr 134 %c = icmp sle i32 %a, -1 135 %s = select i1 %c, i32 -128, i32 127 136 %s2 = select i1 %c, i32 %d, i32 %b 137 %x = add i32 %s, %s2 138 ret i32 %x 139} 140