xref: /llvm-project/llvm/test/CodeGen/PowerPC/scheduling-mem-dependency.ll (revision b922a3621116b404d868af8b74cab25ab78555be)
1; REQUIRES: asserts
2; RUN: llc < %s -mtriple=powerpc64le-unknown-linux-gnu -verify-misched -debug-only=machine-scheduler -o - 2>&1 > /dev/null | FileCheck %s
3; RUN: llc < %s -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr9 -verify-misched -debug-only=machine-scheduler -o - 2>&1 > /dev/null | FileCheck %s --check-prefix=CHECK-P9
4
5define i64 @store_disjoint_memory(ptr nocapture %P, i64 %v) {
6entry:
7; CHECK: ********** MI Scheduling **********
8; CHECK-LABEL: store_disjoint_memory:%bb.0
9; CHECK:SU([[REG2:[0-9]+]]):   STD renamable $x{{[0-9]+}}, 24, renamable $x[[REG5:[0-9]+]]
10; CHECK-NOT: Predecessors:
11; CHECK: Successors:
12; CHECK-NOT:    SU([[REG3]]): Ord  Latency=0 Memory
13; CHECK:SU([[REG3:[0-9]+]]):   STD renamable $x{{[0-9]+}}, 16, renamable $x[[REG5]]
14; CHECK-NOT: Predecessors:
15; CHECK: Successors:
16; CHECK-NOT:    SU([[REG2]]): Ord  Latency=0 Memory
17  %arrayidx = getelementptr inbounds i64, ptr %P, i64 3
18  store i64 %v, ptr %arrayidx
19  %arrayidx1 = getelementptr inbounds i64, ptr %P, i64 2
20  store i64 %v, ptr %arrayidx1
21  ret i64 %v
22}
23
24; LXSD is an instruction that can be modeled.
25@gd = external local_unnamed_addr global [500 x double], align 8
26@gf = external local_unnamed_addr global [500 x float], align 4
27
28define double @test_lxsd_no_barrier(double %a, double %b, double %c, double %d, double %e, double %f, double %g, double %h, double %i, double %j, double %k, double %l, double %m) {
29entry:
30  %0 = load double, ptr getelementptr inbounds ([500 x double], ptr @gd, i64 0, i64 10), align 8
31  %1 = load double, ptr getelementptr inbounds ([500 x double], ptr @gd, i64 0, i64 17), align 8
32  %2 = load double, ptr getelementptr inbounds ([500 x double], ptr @gd, i64 0, i64 87), align 8
33  %3 = load double, ptr getelementptr inbounds ([500 x double], ptr @gd, i64 0, i64 97), align 8
34  %4 = load double, ptr getelementptr inbounds ([500 x double], ptr @gd, i64 0, i64 77), align 8
35  %add = fadd double %a, %b
36  %add1 = fadd double %add, %c
37  %add2 = fadd double %add1, %d
38  %add3 = fadd double %add2, %e
39  %add4 = fadd double %add3, %f
40  %add5 = fadd double %add4, %g
41  %add6 = fadd double %add5, %h
42  %add7 = fadd double %add6, %i
43  %add8 = fadd double %add7, %j
44  %add9 = fadd double %add8, %k
45  %add10 = fadd double %add9, %l
46  %add11 = fadd double %add10, %m
47  %add12 = fadd double %add11, %0
48  %add13 = fadd double %add12, %1
49  %add14 = fadd double %add13, %2
50  %add15 = fadd double %add14, %3
51  %add16 = fadd double %add15, %4
52  ret double %add16
53; CHECK-P9: ********** MI Scheduling **********
54; CHECK-P9-LABEL: test_lxsd_no_barrier:%bb.0 entry
55; CHECK-P9-NOT:Global memory object and new barrier chain: SU({{[0-9]+}}).
56; CHECK-P9:SU({{[0-9]+}}):   renamable $vf{{[0-9]+}} = LXSD 136
57; CHECK-P9:SU({{[0-9]+}}):   renamable $vf{{[0-9]+}} = LXSD 696
58; CHECK-P9:SU({{[0-9]+}}):   renamable $vf{{[0-9]+}} = LXSD 776
59; CHECK-P9:SU({{[0-9]+}}):   renamable $vf{{[0-9]+}} = LXSD 616
60}
61