1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mcpu=pwr9 -verify-machineinstrs -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names \ 3; RUN: -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s --check-prefix=P9LE 4; RUN: llc -mcpu=pwr9 -verify-machineinstrs -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names \ 5; RUN: -mtriple=powerpc64-unknown-linux-gnu < %s | FileCheck %s --check-prefix=P9BE 6; RUN: llc -mcpu=pwr8 -verify-machineinstrs -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names \ 7; RUN: -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s --check-prefix=P8LE 8; RUN: llc -mcpu=pwr8 -verify-machineinstrs -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names \ 9; RUN: -mtriple=powerpc64-unknown-linux-gnu < %s | FileCheck %s --check-prefix=P8BE 10 11; Function Attrs: norecurse nounwind readonly 12define <2 x i64> @s2v_test1(ptr nocapture readonly %int32, <2 x i64> %vec) { 13; P9LE-LABEL: s2v_test1: 14; P9LE: # %bb.0: # %entry 15; P9LE-NEXT: lfiwax f0, 0, r3 16; P9LE-NEXT: xxmrghd v2, v2, vs0 17; P9LE-NEXT: blr 18; 19; P9BE-LABEL: s2v_test1: 20; P9BE: # %bb.0: # %entry 21; P9BE-NEXT: lfiwax f0, 0, r3 22; P9BE-NEXT: xxpermdi v2, vs0, v2, 1 23; P9BE-NEXT: blr 24; 25; P8LE-LABEL: s2v_test1: 26; P8LE: # %bb.0: # %entry 27; P8LE-NEXT: lfiwax f0, 0, r3 28; P8LE-NEXT: xxmrghd v2, v2, vs0 29; P8LE-NEXT: blr 30; 31; P8BE-LABEL: s2v_test1: 32; P8BE: # %bb.0: # %entry 33; P8BE-NEXT: lfiwax f0, 0, r3 34; P8BE-NEXT: xxpermdi v2, vs0, v2, 1 35; P8BE-NEXT: blr 36 37 38 39entry: 40 %0 = load i32, ptr %int32, align 4 41 %conv = sext i32 %0 to i64 42 %vecins = insertelement <2 x i64> %vec, i64 %conv, i32 0 43 ret <2 x i64> %vecins 44} 45 46; Function Attrs: norecurse nounwind readonly 47define <2 x i64> @s2v_test2(ptr nocapture readonly %int32, <2 x i64> %vec) { 48; P9LE-LABEL: s2v_test2: 49; P9LE: # %bb.0: # %entry 50; P9LE-NEXT: addi r3, r3, 4 51; P9LE-NEXT: lfiwax f0, 0, r3 52; P9LE-NEXT: xxmrghd v2, v2, vs0 53; P9LE-NEXT: blr 54; 55; P9BE-LABEL: s2v_test2: 56; P9BE: # %bb.0: # %entry 57; P9BE-NEXT: addi r3, r3, 4 58; P9BE-NEXT: lfiwax f0, 0, r3 59; P9BE-NEXT: xxpermdi v2, vs0, v2, 1 60; P9BE-NEXT: blr 61; 62; P8LE-LABEL: s2v_test2: 63; P8LE: # %bb.0: # %entry 64; P8LE-NEXT: addi r3, r3, 4 65; P8LE-NEXT: lfiwax f0, 0, r3 66; P8LE-NEXT: xxmrghd v2, v2, vs0 67; P8LE-NEXT: blr 68; 69; P8BE-LABEL: s2v_test2: 70; P8BE: # %bb.0: # %entry 71; P8BE-NEXT: addi r3, r3, 4 72; P8BE-NEXT: lfiwax f0, 0, r3 73; P8BE-NEXT: xxpermdi v2, vs0, v2, 1 74; P8BE-NEXT: blr 75 76 77 78entry: 79 %arrayidx = getelementptr inbounds i32, ptr %int32, i64 1 80 %0 = load i32, ptr %arrayidx, align 4 81 %conv = sext i32 %0 to i64 82 %vecins = insertelement <2 x i64> %vec, i64 %conv, i32 0 83 ret <2 x i64> %vecins 84} 85 86; Function Attrs: norecurse nounwind readonly 87define <2 x i64> @s2v_test3(ptr nocapture readonly %int32, <2 x i64> %vec, i32 signext %Idx) { 88; P9LE-LABEL: s2v_test3: 89; P9LE: # %bb.0: # %entry 90; P9LE-NEXT: sldi r4, r7, 2 91; P9LE-NEXT: lfiwax f0, r3, r4 92; P9LE-NEXT: xxmrghd v2, v2, vs0 93; P9LE-NEXT: blr 94; 95; P9BE-LABEL: s2v_test3: 96; P9BE: # %bb.0: # %entry 97; P9BE-NEXT: sldi r4, r7, 2 98; P9BE-NEXT: lfiwax f0, r3, r4 99; P9BE-NEXT: xxpermdi v2, vs0, v2, 1 100; P9BE-NEXT: blr 101; 102; P8LE-LABEL: s2v_test3: 103; P8LE: # %bb.0: # %entry 104; P8LE-NEXT: sldi r4, r7, 2 105; P8LE-NEXT: lfiwax f0, r3, r4 106; P8LE-NEXT: xxmrghd v2, v2, vs0 107; P8LE-NEXT: blr 108; 109; P8BE-LABEL: s2v_test3: 110; P8BE: # %bb.0: # %entry 111; P8BE-NEXT: sldi r4, r7, 2 112; P8BE-NEXT: lfiwax f0, r3, r4 113; P8BE-NEXT: xxpermdi v2, vs0, v2, 1 114; P8BE-NEXT: blr 115 116 117 118entry: 119 %idxprom = sext i32 %Idx to i64 120 %arrayidx = getelementptr inbounds i32, ptr %int32, i64 %idxprom 121 %0 = load i32, ptr %arrayidx, align 4 122 %conv = sext i32 %0 to i64 123 %vecins = insertelement <2 x i64> %vec, i64 %conv, i32 0 124 ret <2 x i64> %vecins 125} 126 127; Function Attrs: norecurse nounwind readonly 128define <2 x i64> @s2v_test4(ptr nocapture readonly %int32, <2 x i64> %vec) { 129; P9LE-LABEL: s2v_test4: 130; P9LE: # %bb.0: # %entry 131; P9LE-NEXT: addi r3, r3, 4 132; P9LE-NEXT: lfiwax f0, 0, r3 133; P9LE-NEXT: xxmrghd v2, v2, vs0 134; P9LE-NEXT: blr 135; 136; P9BE-LABEL: s2v_test4: 137; P9BE: # %bb.0: # %entry 138; P9BE-NEXT: addi r3, r3, 4 139; P9BE-NEXT: lfiwax f0, 0, r3 140; P9BE-NEXT: xxpermdi v2, vs0, v2, 1 141; P9BE-NEXT: blr 142; 143; P8LE-LABEL: s2v_test4: 144; P8LE: # %bb.0: # %entry 145; P8LE-NEXT: addi r3, r3, 4 146; P8LE-NEXT: lfiwax f0, 0, r3 147; P8LE-NEXT: xxmrghd v2, v2, vs0 148; P8LE-NEXT: blr 149; 150; P8BE-LABEL: s2v_test4: 151; P8BE: # %bb.0: # %entry 152; P8BE-NEXT: addi r3, r3, 4 153; P8BE-NEXT: lfiwax f0, 0, r3 154; P8BE-NEXT: xxpermdi v2, vs0, v2, 1 155; P8BE-NEXT: blr 156 157 158 159entry: 160 %arrayidx = getelementptr inbounds i32, ptr %int32, i64 1 161 %0 = load i32, ptr %arrayidx, align 4 162 %conv = sext i32 %0 to i64 163 %vecins = insertelement <2 x i64> %vec, i64 %conv, i32 0 164 ret <2 x i64> %vecins 165} 166 167; Function Attrs: norecurse nounwind readonly 168define <2 x i64> @s2v_test5(<2 x i64> %vec, ptr nocapture readonly %ptr1) { 169; P9LE-LABEL: s2v_test5: 170; P9LE: # %bb.0: # %entry 171; P9LE-NEXT: lfiwax f0, 0, r5 172; P9LE-NEXT: xxmrghd v2, v2, vs0 173; P9LE-NEXT: blr 174; 175; P9BE-LABEL: s2v_test5: 176; P9BE: # %bb.0: # %entry 177; P9BE-NEXT: lfiwax f0, 0, r5 178; P9BE-NEXT: xxpermdi v2, vs0, v2, 1 179; P9BE-NEXT: blr 180; 181; P8LE-LABEL: s2v_test5: 182; P8LE: # %bb.0: # %entry 183; P8LE-NEXT: lfiwax f0, 0, r5 184; P8LE-NEXT: xxmrghd v2, v2, vs0 185; P8LE-NEXT: blr 186; 187; P8BE-LABEL: s2v_test5: 188; P8BE: # %bb.0: # %entry 189; P8BE-NEXT: lfiwax f0, 0, r5 190; P8BE-NEXT: xxpermdi v2, vs0, v2, 1 191; P8BE-NEXT: blr 192 193 194 195entry: 196 %0 = load i32, ptr %ptr1, align 4 197 %conv = sext i32 %0 to i64 198 %vecins = insertelement <2 x i64> %vec, i64 %conv, i32 0 199 ret <2 x i64> %vecins 200} 201 202; Function Attrs: norecurse nounwind readonly 203define <2 x i64> @s2v_test6(ptr nocapture readonly %ptr) { 204; P9LE-LABEL: s2v_test6: 205; P9LE: # %bb.0: # %entry 206; P9LE-NEXT: lfiwax f0, 0, r3 207; P9LE-NEXT: xxspltd v2, f0, 0 208; P9LE-NEXT: blr 209; 210; P9BE-LABEL: s2v_test6: 211; P9BE: # %bb.0: # %entry 212; P9BE-NEXT: lfiwax f0, 0, r3 213; P9BE-NEXT: xxspltd v2, f0, 0 214; P9BE-NEXT: blr 215; 216; P8LE-LABEL: s2v_test6: 217; P8LE: # %bb.0: # %entry 218; P8LE-NEXT: lfiwax f0, 0, r3 219; P8LE-NEXT: xxspltd v2, f0, 0 220; P8LE-NEXT: blr 221; 222; P8BE-LABEL: s2v_test6: 223; P8BE: # %bb.0: # %entry 224; P8BE-NEXT: lfiwax f0, 0, r3 225; P8BE-NEXT: xxspltd v2, f0, 0 226; P8BE-NEXT: blr 227 228 229 230entry: 231 %0 = load i32, ptr %ptr, align 4 232 %conv = sext i32 %0 to i64 233 %splat.splatinsert = insertelement <2 x i64> undef, i64 %conv, i32 0 234 %splat.splat = shufflevector <2 x i64> %splat.splatinsert, <2 x i64> undef, <2 x i32> zeroinitializer 235 ret <2 x i64> %splat.splat 236} 237 238; Function Attrs: norecurse nounwind readonly 239define <2 x i64> @s2v_test7(ptr nocapture readonly %ptr) { 240; P9LE-LABEL: s2v_test7: 241; P9LE: # %bb.0: # %entry 242; P9LE-NEXT: lfiwax f0, 0, r3 243; P9LE-NEXT: xxspltd v2, f0, 0 244; P9LE-NEXT: blr 245; 246; P9BE-LABEL: s2v_test7: 247; P9BE: # %bb.0: # %entry 248; P9BE-NEXT: lfiwax f0, 0, r3 249; P9BE-NEXT: xxspltd v2, f0, 0 250; P9BE-NEXT: blr 251; 252; P8LE-LABEL: s2v_test7: 253; P8LE: # %bb.0: # %entry 254; P8LE-NEXT: lfiwax f0, 0, r3 255; P8LE-NEXT: xxspltd v2, f0, 0 256; P8LE-NEXT: blr 257; 258; P8BE-LABEL: s2v_test7: 259; P8BE: # %bb.0: # %entry 260; P8BE-NEXT: lfiwax f0, 0, r3 261; P8BE-NEXT: xxspltd v2, f0, 0 262; P8BE-NEXT: blr 263 264 265 266entry: 267 %0 = load i32, ptr %ptr, align 4 268 %conv = sext i32 %0 to i64 269 %splat.splatinsert = insertelement <2 x i64> undef, i64 %conv, i32 0 270 %splat.splat = shufflevector <2 x i64> %splat.splatinsert, <2 x i64> undef, <2 x i32> zeroinitializer 271 ret <2 x i64> %splat.splat 272} 273 274