1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4 2; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64le-unknown-linux-gnu | FileCheck %s 3 4define i32 @test1(i32 %x, i32 %y) { 5; CHECK-LABEL: test1: 6; CHECK: # %bb.0: # %entry 7; CHECK-NEXT: rlwimi 4, 3, 16, 0, 15 8; CHECK-NEXT: mr 3, 4 9; CHECK-NEXT: blr 10entry: 11 %tmp.3 = shl i32 %x, 16 12 %tmp.7 = and i32 %y, 65535 13 %tmp.9 = or i32 %tmp.7, %tmp.3 14 ret i32 %tmp.9 15} 16 17define i32 @test2(i32 %x, i32 %y) { 18; CHECK-LABEL: test2: 19; CHECK: # %bb.0: # %entry 20; CHECK-NEXT: rlwimi 3, 4, 16, 0, 15 21; CHECK-NEXT: blr 22entry: 23 %tmp.7 = and i32 %x, 65535 24 %tmp.3 = shl i32 %y, 16 25 %tmp.9 = or i32 %tmp.7, %tmp.3 26 ret i32 %tmp.9 27} 28 29define i32 @test3(i32 %x, i32 %y) { 30; CHECK-LABEL: test3: 31; CHECK: # %bb.0: # %entry 32; CHECK-NEXT: rlwimi 4, 3, 16, 16, 31 33; CHECK-NEXT: mr 3, 4 34; CHECK-NEXT: blr 35entry: 36 %tmp.3 = lshr i32 %x, 16 37 %tmp.6 = and i32 %y, -65536 38 %tmp.7 = or i32 %tmp.6, %tmp.3 39 ret i32 %tmp.7 40} 41 42define i32 @test4(i32 %x, i32 %y) { 43; CHECK-LABEL: test4: 44; CHECK: # %bb.0: # %entry 45; CHECK-NEXT: rlwimi 3, 4, 16, 16, 31 46; CHECK-NEXT: blr 47entry: 48 %tmp.6 = and i32 %x, -65536 49 %tmp.3 = lshr i32 %y, 16 50 %tmp.7 = or i32 %tmp.6, %tmp.3 51 ret i32 %tmp.7 52} 53 54define i32 @test5(i32 %x, i32 %y) { 55; CHECK-LABEL: test5: 56; CHECK: # %bb.0: # %entry 57; CHECK-NEXT: rlwimi 4, 3, 1, 0, 15 58; CHECK-NEXT: mr 3, 4 59; CHECK-NEXT: blr 60entry: 61 %tmp.3 = shl i32 %x, 1 62 %tmp.4 = and i32 %tmp.3, -65536 63 %tmp.7 = and i32 %y, 65535 64 %tmp.9 = or i32 %tmp.4, %tmp.7 65 ret i32 %tmp.9 66} 67 68define i32 @test6(i32 %x, i32 %y) { 69; CHECK-LABEL: test6: 70; CHECK: # %bb.0: # %entry 71; CHECK-NEXT: rlwimi 3, 4, 1, 0, 15 72; CHECK-NEXT: blr 73entry: 74 %tmp.7 = and i32 %x, 65535 75 %tmp.3 = shl i32 %y, 1 76 %tmp.4 = and i32 %tmp.3, -65536 77 %tmp.9 = or i32 %tmp.4, %tmp.7 78 ret i32 %tmp.9 79} 80 81define i32 @test7(i32 %x, i32 %y) { 82; CHECK-LABEL: test7: 83; CHECK: # %bb.0: # %entry 84; CHECK-NEXT: andis. 3, 3, 65535 85; CHECK-NEXT: rldimi 3, 4, 0, 48 86; CHECK-NEXT: blr 87entry: 88 %tmp.2 = and i32 %x, -65536 89 %tmp.5 = and i32 %y, 65535 90 %tmp.7 = or i32 %tmp.5, %tmp.2 91 ret i32 %tmp.7 92} 93 94define i32 @test8(i32 %bar) { 95; CHECK-LABEL: test8: 96; CHECK: # %bb.0: # %entry 97; CHECK-NEXT: rlwimi 3, 3, 1, 30, 30 98; CHECK-NEXT: blr 99entry: 100 %tmp.3 = shl i32 %bar, 1 101 %tmp.4 = and i32 %tmp.3, 2 102 %tmp.6 = and i32 %bar, -3 103 %tmp.7 = or i32 %tmp.4, %tmp.6 104 ret i32 %tmp.7 105} 106 107define i32 @test9(i32 %a, i32 %b) { 108; CHECK-LABEL: test9: 109; CHECK: # %bb.0: # %entry 110; CHECK-NEXT: rlwimi 4, 3, 8, 20, 26 111; CHECK-NEXT: mr 3, 4 112; CHECK-NEXT: blr 113entry: 114 %r = call i32 @llvm.ppc.rlwimi(i32 %a, i32 %b, i32 8, i32 4064) 115 ret i32 %r 116} 117 118define i32 @test10(i32 %a, i32 %b) { 119; CHECK-LABEL: test10: 120; CHECK: # %bb.0: # %entry 121; CHECK-NEXT: blr 122entry: 123 %r = call i32 @llvm.ppc.rlwimi(i32 %a, i32 %b, i32 0, i32 -1) 124 ret i32 %r 125} 126 127define i32 @test11(i32 %a, i32 %b) { 128; CHECK-LABEL: test11: 129; CHECK: # %bb.0: # %entry 130; CHECK-NEXT: rotlwi 3, 3, 8 131; CHECK-NEXT: blr 132entry: 133 %r = call i32 @llvm.ppc.rlwimi(i32 %a, i32 %b, i32 8, i32 -1) 134 ret i32 %r 135} 136 137define i32 @test12(i32 %a, i32 %b) { 138; CHECK-LABEL: test12: 139; CHECK: # %bb.0: # %entry 140; CHECK-NEXT: mr 3, 4 141; CHECK-NEXT: blr 142entry: 143 %r = call i32 @llvm.ppc.rlwimi(i32 %a, i32 %b, i32 0, i32 0) 144 ret i32 %r 145} 146 147define i32 @test13(i32 %a, i32 %b) { 148; CHECK-LABEL: test13: 149; CHECK: # %bb.0: # %entry 150; CHECK-NEXT: rlwimi 3, 4, 0, 27, 19 151; CHECK-NEXT: blr 152entry: 153 %r = call i32 @llvm.ppc.rlwimi(i32 %a, i32 %b, i32 0, i32 4064) 154 ret i32 %r 155} 156 157declare i32 @llvm.ppc.rlwimi(i32, i32, i32 immarg, i32 immarg) 158