1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -ppc-asm-full-reg-names -verify-machineinstrs \ 3; RUN: -mtriple=powerpc64le-linux-gnu < %s | FileCheck \ 4; RUN: -check-prefix=CHECK-LE %s 5; RUN: llc -ppc-asm-full-reg-names -verify-machineinstrs \ 6; RUN: -mcpu=ppc -mtriple=powerpc64-linux-gnu < %s | FileCheck \ 7; RUN: -check-prefix=CHECK-BE %s 8 9define i8 @_Z1f1c(i24 %x) #0 { 10; CHECK-LE-LABEL: _Z1f1c: 11; CHECK-LE: # %bb.0: 12; CHECK-LE-NEXT: clrlwi r3, r3, 8 13; CHECK-LE-NEXT: mtfprwz f0, r3 14; CHECK-LE-NEXT: addis r3, r2, .LCPI0_0@toc@ha 15; CHECK-LE-NEXT: lfd f1, .LCPI0_0@toc@l(r3) 16; CHECK-LE-NEXT: xscvuxddp f0, f0 17; CHECK-LE-NEXT: xsmuldp f0, f0, f1 18; CHECK-LE-NEXT: xscvdpsxws f0, f0 19; CHECK-LE-NEXT: mffprwz r3, f0 20; CHECK-LE-NEXT: blr 21; 22; CHECK-BE-LABEL: _Z1f1c: 23; CHECK-BE: # %bb.0: 24; CHECK-BE-NEXT: clrldi r3, r3, 40 25; CHECK-BE-NEXT: std r3, -16(r1) 26; CHECK-BE-NEXT: addis r3, r2, .LCPI0_0@toc@ha 27; CHECK-BE-NEXT: lfd f0, -16(r1) 28; CHECK-BE-NEXT: lfd f1, .LCPI0_0@toc@l(r3) 29; CHECK-BE-NEXT: fcfid f0, f0 30; CHECK-BE-NEXT: fmul f0, f0, f1 31; CHECK-BE-NEXT: fctiwz f0, f0 32; CHECK-BE-NEXT: stfd f0, -8(r1) 33; CHECK-BE-NEXT: lwz r3, -4(r1) 34; CHECK-BE-NEXT: blr 35 %conv1 = uitofp i24 %x to double 36 %mul = fmul double 0.1, %conv1 37 %r = fptoui double %mul to i8 38 ret i8 %r 39} 40 41attributes #0 = { "use-soft-float"="false" } 42