xref: /llvm-project/llvm/test/CodeGen/PowerPC/pr40922.ll (revision e345b9ca7ad2c6ff00479723a5974c969510f312)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
2; RUN: llc -verify-machineinstrs -mtriple=powerpc-unknown-linux-gnu < %s | FileCheck %s
3
4; Test case adapted from PR40922.
5
6@a.b = internal global i32 0, align 4
7
8define i32 @a() {
9; CHECK-LABEL: a:
10; CHECK:       # %bb.0: # %entry
11; CHECK-NEXT:    mflr 0
12; CHECK-NEXT:    stwu 1, -32(1)
13; CHECK-NEXT:    stw 0, 36(1)
14; CHECK-NEXT:    .cfi_def_cfa_offset 32
15; CHECK-NEXT:    .cfi_offset lr, 4
16; CHECK-NEXT:    .cfi_offset r29, -12
17; CHECK-NEXT:    .cfi_offset r30, -8
18; CHECK-NEXT:    stw 29, 20(1) # 4-byte Folded Spill
19; CHECK-NEXT:    stw 30, 24(1) # 4-byte Folded Spill
20; CHECK-NEXT:    bl d
21; CHECK-NEXT:    lis 29, a.b@ha
22; CHECK-NEXT:    lwz 4, a.b@l(29)
23; CHECK-NEXT:    li 5, 0
24; CHECK-NEXT:    mr 30, 3
25; CHECK-NEXT:    addic 6, 4, 6
26; CHECK-NEXT:    addze 5, 5
27; CHECK-NEXT:    rlwinm 6, 6, 0, 28, 26
28; CHECK-NEXT:    andi. 5, 5, 1
29; CHECK-NEXT:    cmplw 1, 6, 4
30; CHECK-NEXT:    crorc 20, 1, 4
31; CHECK-NEXT:    bc 12, 20, .LBB0_2
32; CHECK-NEXT:  # %bb.1: # %if.then
33; CHECK-NEXT:    bl e
34; CHECK-NEXT:  .LBB0_2: # %if.end
35; CHECK-NEXT:    stw 30, a.b@l(29)
36; CHECK-NEXT:    lwz 30, 24(1) # 4-byte Folded Reload
37; CHECK-NEXT:    lwz 29, 20(1) # 4-byte Folded Reload
38; CHECK-NEXT:    lwz 0, 36(1)
39; CHECK-NEXT:    addi 1, 1, 32
40; CHECK-NEXT:    mtlr 0
41; CHECK-NEXT:    blr
42entry:
43  %call = tail call i32 @d()
44  %0 = load i32, ptr @a.b, align 4
45  %conv = zext i32 %0 to i64
46  %add = add nuw nsw i64 %conv, 6
47  %and = and i64 %add, 8589934575
48  %cmp = icmp ult i64 %and, %conv
49  br i1 %cmp, label %if.then, label %if.end
50
51if.then:                                          ; preds = %entry
52  %call3 = tail call i32 @e()
53  br label %if.end
54
55if.end:                                           ; preds = %if.then, %entry
56  store i32 %call, ptr @a.b, align 4
57  ret i32 undef
58}
59
60declare i32 @d(...)
61
62declare i32 @e(...)
63