xref: /llvm-project/llvm/test/CodeGen/PowerPC/pr30451.ll (revision 5403c59c608c08c8ecd4303763f08eb046eb5e4d) 
1; RUN: llc < %s -mcpu=pwr8 -mtriple=powerpc64le-unknown-unknown | FileCheck %s
2define i8 @atomic_min_i8() {
3    top:
4      %0 = alloca i8, align 2
5      call void @llvm.lifetime.start.p0(i64 2, ptr %0)
6      store i8 -1, ptr %0, align 2
7      %1 = atomicrmw min ptr %0, i8 0 acq_rel
8      %2 = load atomic i8, ptr %0 acquire, align 8
9      call void @llvm.lifetime.end.p0(i64 2, ptr %0)
10      ret i8 %2
11; CHECK-LABEL: atomic_min_i8
12; CHECK: lbarx [[DST:[0-9]+]],
13; CHECK-NEXT: extsb [[EXT:[0-9]+]], [[DST]]
14; CHECK-NEXT: cmpw [[EXT]], {{[0-9]+}}
15; CHECK-NEXT: blt 0
16}
17define i16 @atomic_min_i16() {
18    top:
19      %0 = alloca i16, align 2
20      call void @llvm.lifetime.start.p0(i64 2, ptr %0)
21      store i16 -1, ptr %0, align 2
22      %1 = atomicrmw min ptr %0, i16 0 acq_rel
23      %2 = load atomic i16, ptr %0 acquire, align 8
24      call void @llvm.lifetime.end.p0(i64 2, ptr %0)
25      ret i16 %2
26; CHECK-LABEL: atomic_min_i16
27; CHECK: lharx [[DST:[0-9]+]],
28; CHECK-NEXT: extsh [[EXT:[0-9]+]], [[DST]]
29; CHECK-NEXT: cmpw [[EXT]], {{[0-9]+}}
30; CHECK-NEXT: blt 0
31}
32
33define i8 @atomic_max_i8() {
34    top:
35      %0 = alloca i8, align 2
36      call void @llvm.lifetime.start.p0(i64 2, ptr %0)
37      store i8 -1, ptr %0, align 2
38      %1 = atomicrmw max ptr %0, i8 0 acq_rel
39      %2 = load atomic i8, ptr %0 acquire, align 8
40      call void @llvm.lifetime.end.p0(i64 2, ptr %0)
41      ret i8 %2
42; CHECK-LABEL: atomic_max_i8
43; CHECK: lbarx [[DST:[0-9]+]],
44; CHECK-NEXT: extsb [[EXT:[0-9]+]], [[DST]]
45; CHECK-NEXT: cmpw [[EXT]], {{[0-9]+}}
46; CHECK-NEXT: bgt 0
47}
48define i16 @atomic_max_i16() {
49    top:
50      %0 = alloca i16, align 2
51      call void @llvm.lifetime.start.p0(i64 2, ptr %0)
52      store i16 -1, ptr %0, align 2
53      %1 = atomicrmw max ptr %0, i16 0 acq_rel
54      %2 = load atomic i16, ptr %0 acquire, align 8
55      call void @llvm.lifetime.end.p0(i64 2, ptr %0)
56      ret i16 %2
57; CHECK-LABEL: atomic_max_i16
58; CHECK: lharx [[DST:[0-9]+]],
59; CHECK-NEXT: extsh [[EXT:[0-9]+]], [[DST]]
60; CHECK-NEXT: cmpw [[EXT]], {{[0-9]+}}
61; CHECK-NEXT: bgt 0
62}
63
64declare void @llvm.lifetime.start.p0(i64, ptr)
65declare void @llvm.lifetime.end.p0(i64, ptr)
66